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2020-07-27arm64: dts: qcom: Add Xiaomi Libra (Mi 4C) device treeKonrad Dybcio
This commit adds support for the Xiaomi Libra (Mi 4C) smartphone. It's based on the Qualcomm msm8992 SoC. It currently supports: * Screen console from bootloader * SDHCI * Regulator configuration * Serial console * I2C Signed-off-by: Konrad Dybcio <konradybcio@gmail.com> Link: https://lore.kernel.org/r/20200625182118.131476-13-konradybcio@gmail.com Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
2020-07-27arm64: dts: qcom: msm8992: Add RPMCC nodeKonrad Dybcio
This lets us use clocks provided by RPM. Signed-off-by: Konrad Dybcio <konradybcio@gmail.com> Link: https://lore.kernel.org/r/20200625182118.131476-12-konradybcio@gmail.com Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
2020-07-27arm64: dts: qcom: msm8992: Add PSCI support.Konrad Dybcio
This SoC's firmware does not fully support the PSCI spec, but it's good enough to bring the cores up. Signed-off-by: Konrad Dybcio <konradybcio@gmail.com> Link: https://lore.kernel.org/r/20200625182118.131476-11-konradybcio@gmail.com Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
2020-07-27arm64: dts: qcom: msm8992: Add PMU nodeKonrad Dybcio
Add the PMU so we can get proper perf event support on this SoC. Signed-off-by: Konrad Dybcio <konradybcio@gmail.com> Link: https://lore.kernel.org/r/20200625182118.131476-10-konradybcio@gmail.com Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
2020-07-27arm64: dts: qcom: msm8992: Add BLSP2_UART2 and I2C nodesKonrad Dybcio
Add support for I2C to enable support for peripherals such as touchscreens or sensors. Also add BLSP_UART2 interface. Please note that the naming scheme follows downstream and as abominable as it is, that's what we get. Signed-off-by: Konrad Dybcio <konradybcio@gmail.com> Link: https://lore.kernel.org/r/20200625182118.131476-9-konradybcio@gmail.com Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
2020-07-27arm64: dts: qcom: msm8992: Add SPMI PMIC arbiter deviceKonrad Dybcio
Add SPMI PMIC arbiter device to communicate with PMICs attached to SPMI bus. Signed-off-by: Konrad Dybcio <konradybcio@gmail.com> Link: https://lore.kernel.org/r/20200625182118.131476-8-konradybcio@gmail.com Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
2020-07-27arm64: dts: qcom: msm8992: Add a SCM nodeKonrad Dybcio
Signed-off-by: Konrad Dybcio <konradybcio@gmail.com> Link: https://lore.kernel.org/r/20200625182118.131476-7-konradybcio@gmail.com Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
2020-07-27arm64: dts: qcom: msm8992: Add a proper CPU mapKonrad Dybcio
This commit adds cpu nodes for all 6 cores present on this SoC and the cpu-map. Signed-off-by: Konrad Dybcio <konradybcio@gmail.com> Link: https://lore.kernel.org/r/20200625182118.131476-6-konradybcio@gmail.com Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
2020-07-27arm64: dts: qcom: bullhead: Move UART pinctrl to SoCKonrad Dybcio
This pinout is common for every 8992-based device and should therefore reside in the SoC device tree. Also convert addresses into phandles. Signed-off-by: Konrad Dybcio <konradybcio@gmail.com> Link: https://lore.kernel.org/r/20200625182118.131476-5-konradybcio@gmail.com Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
2020-07-27arm64: dts: qcom: bullhead: Add qcom,msm-idKonrad Dybcio
Add the property required for the bootloader to select the correct device tree blob. It has been removed from the SoC device tree as it should be set on a per-device basis. Signed-off-by: Konrad Dybcio <konradybcio@gmail.com> Link: https://lore.kernel.org/r/20200625182118.131476-4-konradybcio@gmail.com Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
2020-07-27arm64: dts: qcom: msm8992: Fix SDHCI1Konrad Dybcio
This commit ensures the correct IRQ type is set and disables the device by default. The mmc-hs400-1_8v property is also moved to Bullhead as it might not be present on all boards. The node has been renamed to sdhci@ instead of mmc@ and the phandle was changed to sdhc_1 to comply with the newer DTS style. Signed-off-by: Konrad Dybcio <konradybcio@gmail.com> Link: https://lore.kernel.org/r/20200625182118.131476-3-konradybcio@gmail.com Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
2020-07-27arm64: dts: qcom: msm8992: Modernize the DTS styleKonrad Dybcio
Following changes have been made: - remove name, compatible and msm-id - wrap clocks in clocks{} - order nodes by name and by address - clock_gcc -> gcc - msmgpio -> tlmm - retire msm8992-pins.dtsi - add some of the missing pins - make comments C-style - make apcs a mailbox Signed-off-by: Konrad Dybcio <konradybcio@gmail.com> Link: https://lore.kernel.org/r/20200625182118.131476-2-konradybcio@gmail.com Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
2020-07-27arm64: dts: qcom: Add support for Sony Xperia Z5 (SoMC Sumire-RoW)Konrad Dybcio
Add device tree support for the Sony Xperia Z5 smartphone. It's based on Sony Kitakami platform (msm8994) and hence a Kitakami-common DTSI has been created so as to reduce clutter when remaining devices are added. The board currently supports * Serial * SDHCI * I2C * Regulator configuration * pstore log dump * GPIO keys Signed-off-by: Konrad Dybcio <konradybcio@gmail.com> Link: https://lore.kernel.org/r/20200624150107.76234-9-konradybcio@gmail.com [bjorn: Changed vendor identifier in board compatible from somc to sony] Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
2020-07-27arm64: dts: qcom: Move msm8994-smd-rpm contents to lg-bullhead.Konrad Dybcio
This was the only device using that dtsi, so no point keeping it separate AND with a confusing name (bullhead is based on msm8992 and the file contains regulator values for that specific board). Signed-off-by: Konrad Dybcio <konradybcio@gmail.com> Link: https://lore.kernel.org/r/20200624150107.76234-8-konradybcio@gmail.com [bjorn: Squashed with change that remove regulators from msm8992.dtsi] Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
2020-07-27arm64: dts: qcom: msm8994: Add support for SMD RPMKonrad Dybcio
Add support for SMD RPM, including pm8994 and pmi8994 regulators. Signed-off-by: Konrad Dybcio <konradybcio@gmail.com> Link: https://lore.kernel.org/r/20200624150107.76234-7-konradybcio@gmail.com Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
2020-07-27arm64: dts: qcom: msm8992: Add a label to rpm-requestsKonrad Dybcio
This enables the node to be referenced directly from other DTs. Signed-off-by: Konrad Dybcio <konradybcio@gmail.com> Link: https://lore.kernel.org/r/20200624150107.76234-4-konradybcio@gmail.com Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
2020-07-27arm64: dts: qcom: msm8994: Add SCM nodeKonrad Dybcio
Signed-off-by: Konrad Dybcio <konradybcio@gmail.com> Link: https://lore.kernel.org/r/20200624150107.76234-3-konradybcio@gmail.com Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
2020-07-27arm64: dts: qcom: sdm845-db845c: Add hdmi bridge nodesBjorn Andersson
Enable MDSS and DSI and add the LT9611 HDMI bridge. Also add the HDMI audio nodes. Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org> Co-developed-by: Srinivas Kandagatla <srinivas.kandagatla@linaro.org> Signed-off-by: Srinivas Kandagatla <srinivas.kandagatla@linaro.org> Signed-off-by: Vinod Koul <vkoul@kernel.org> Link: https://lore.kernel.org/r/20200727075532.1932134-1-vkoul@kernel.org Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
2020-07-27arm64: dts: qcom: add sm8250 GPU nodesJonathan Marek
This brings up the GPU. Tested on HDK865 by running vulkan CTS. Signed-off-by: Jonathan Marek <jonathan@marek.ca> Link: https://lore.kernel.org/r/20200709135251.643-15-jonathan@marek.ca Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
2020-07-27arm64: dts: qcom: add sm8150 GPU nodesJonathan Marek
This brings up the GPU. Tested on HDK855 by running vulkan CTS. Signed-off-by: Jonathan Marek <jonathan@marek.ca> Link: https://lore.kernel.org/r/20200709135251.643-14-jonathan@marek.ca Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
2020-07-27dt-bindings: power: Add missing rpmpd rpmh regulator levelJonathan Marek
Add RPMH_REGULATOR_LEVEL_SVS_L0, used by sm8250. Acked-by: Rob Herring <robh@kernel.org> Signed-off-by: Jonathan Marek <jonathan@marek.ca> Link: https://lore.kernel.org/r/20200709135251.643-13-jonathan@marek.ca Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
2020-07-27arm64: dts: qcom: sc7180: Add opp-peak-kBps to GPU oppSharat Masetty
Add opp-peak-kBps bindings to the GPU opp table, listing the peak GPU -> DDR bandwidth requirement for each opp level. This will be used to scale the DDR bandwidth along with the GPU frequency dynamically. Signed-off-by: Sharat Masetty <smasetty@codeaurora.org> Reviewed-by: Matthias Kaehlcke <mka@chromium.org> Signed-off-by: Akhil P Oommen <akhilpo@codeaurora.org> Link: https://lore.kernel.org/r/1594992579-20662-7-git-send-email-akhilpo@codeaurora.org Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
2020-07-27arm64: dts: qcom: sc7180: Add interconnects property for GPUSharat Masetty
This patch adds the interconnects property to the GPU node. This enables the GPU->DDR path bandwidth voting. Signed-off-by: Sharat Masetty <smasetty@codeaurora.org> Signed-off-by: Akhil P Oommen <akhilpo@codeaurora.org> Link: https://lore.kernel.org/r/1594992579-20662-6-git-send-email-akhilpo@codeaurora.org Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
2020-07-27arm64: dts: qcom: SDM845: Enable GPU DDR bw scalingSharat Masetty
This patch adds the interconnects property for the gpu node and the opp-peak-kBps property to the opps of the gpu opp table. This should help enable DDR bandwidth scaling dynamically and proportionally to the GPU frequency. Signed-off-by: Sharat Masetty <smasetty@codeaurora.org> Signed-off-by: Akhil P Oommen <akhilpo@codeaurora.org> Link: https://lore.kernel.org/r/1594992579-20662-5-git-send-email-akhilpo@codeaurora.org Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
2020-07-27arm64: dts: qcom: sc7180: Add support for context losing replicatorSai Prakash Ranjan
Add "qcom,replicator-loses-context" property to the replicator in Always-on domain in SC7180 SoC to enable coresight replicator driver to handle this variation of replicator designs. Reviewed-by: Mathieu Poirier <mathieu.poirier@linaro.org> Signed-off-by: Sai Prakash Ranjan <saiprakash.ranjan@codeaurora.org> Link: https://lore.kernel.org/r/5072d94849cfaee46748d26ac997212fb2d783c2.1591708204.git.saiprakash.ranjan@codeaurora.org Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
2020-07-27soc: qcom: pdr: Reorder the PD state indication ackSibi Sankar
The Protection Domains (PD) have a mechanism to keep its resources enabled until the PD down indication is acked. Reorder the PD state indication ack so that clients get to release the relevant resources before the PD goes down. Reviewed-by: Bjorn Andersson <bjorn.andersson@linaro.org> Reviewed-by: Rishabh Bhatnagar <rishabhb@codeaurora.org> Fixes: fbe639b44a82 ("soc: qcom: Introduce Protection Domain Restart helpers") Reported-by: Rishabh Bhatnagar <rishabhb@codeaurora.org> Signed-off-by: Sibi Sankar <sibis@codeaurora.org> Link: https://lore.kernel.org/r/20200701195954.9007-1-sibis@codeaurora.org Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
2020-07-28xfrm: esp6: fix the location of the transport header with encapsulationSabrina Dubroca
commit 17175d1a27c6 ("xfrm: esp6: fix encapsulation header offset computation") changed esp6_input_done2 to correctly find the size of the IPv6 header that precedes the TCP/UDP encapsulation header, but didn't adjust the final call to skb_set_transport_header, which I assumed was correct in using skb_network_header_len. Xiumei Mu reported that when we create xfrm states that include port numbers in the selector, traffic from the user sockets is dropped. It turns out that we get a state mismatch in __xfrm_policy_check, because we end up trying to compare the encapsulation header's ports with the selector that's based on user traffic ports. Fixes: 0146dca70b87 ("xfrm: add support for UDPv6 encapsulation of ESP") Fixes: 26333c37fc28 ("xfrm: add IPv6 support for espintcp") Reported-by: Xiumei Mu <xmu@redhat.com> Signed-off-by: Sabrina Dubroca <sd@queasysnail.net> Signed-off-by: Steffen Klassert <steffen.klassert@secunet.com>
2020-07-27Merge tag 'sh-for-5.8-part2' of git://git.libc.org/linux-sh into masterLinus Torvalds
Pull arch/sh fixes from Rich Felker: "Two last-minute fixes: one is for a boot regression (mmu code broken) and the other fixes a long-standing broken syscall number bounds check" * tag 'sh-for-5.8-part2' of git://git.libc.org/linux-sh: sh: Fix validation of system call number sh/tlb: Fix PGTABLE_LEVELS > 2
2020-07-28ARM: dts: Aspeed: tacoma: Enable EHCI controllerEddie James
Enable the second EHCI controller on the AST2600. Also add a line-name for the GPIO that controls power to the USB port. The power control is in place to allow the port to be disabled, for those that are worried about rogue USB sticks. Signed-off-by: Eddie James <eajames@linux.ibm.com> Signed-off-by: Joel Stanley <joel@jms.id.au>
2020-07-28ARM: dts: aspeed: rainier: Enable EHCI controllerEddie James
Enable the second EHCI controller on the AST2600. Also add a line-name for the GPIO that controls power to the USB port. The power control is in place to allow the port to be disabled, for those that are worried about rogue USB sticks. Signed-off-by: Eddie James <eajames@linux.ibm.com> Signed-off-by: Joel Stanley <joel@jms.id.au>
2020-07-28ARM: dts: aspeed: rainier: Switch OCCs to P10Eddie James
Rainier uses the P10 processor so the OCC binding should reflect that. Signed-off-by: Eddie James <eajames@linux.ibm.com> Signed-off-by: Joel Stanley <joel@jms.id.au>
2020-07-28ARM: dts: aspeed: rainier: Add FSI I2C mastersJoel Stanley
The host processor contains i2c masters on each cfam. Signed-off-by: Joel Stanley <joel@jms.id.au>
2020-07-28ARM: dts: aspeed: rainier: Add CFAM SPI controllersEddie James
Add the four SPI masters on each CFAM. Each master has four 128KB EEPROM devices attached to it. Signed-off-by: Eddie James <eajames@linux.ibm.com> Signed-off-by: Joel Stanley <joel@jms.id.au>
2020-07-28ARM: dts: aspeed: rainier: Add I2C buses for NVMe useJet Li
Adding pca9552 exposes the presence detect lines for the cards and tca9554 exposes the presence details for the cards. Signed-off-by: Jet Li <Jet.Li@ibm.com> Signed-off-by: Joel Stanley <joel@jms.id.au>
2020-07-28ARM: dts: aspeed: Initial device tree for AMD EthanolXSupreeth Venkatesh
Initial introduction of AMD EthanolX platform equipped with an Aspeed ast2500 BMC manufactured by AMD. AMD EthanolX platform is an AMD customer reference board with an Aspeed ast2500 BMC manufactured by AMD. This adds AMD EthanolX device tree file including the flash layout used by EthanolX BMC machines. Signed-off-by: Supreeth Venkatesh <supreeth.venkatesh@amd.com> Signed-off-by: Joel Stanley <joel@jms.id.au>
2020-07-28ARM: dts: rainier: Describe GPIO mux on I2C3Andrew Jeffery
We have a 4-bus mux whose output is selected by two GPIO inputs. Wire it up in the devicetree and ensure the output is enabled by hogging the appropriate line. Signed-off-by: Andrew Jeffery <andrew@aj.id.au> Signed-off-by: Joel Stanley <joel@jms.id.au>
2020-07-27doc/zh_CN: add cpu-load Chinese versionTao Zhou
Add cpu-load Chinese version and link it into admin-guide. Based on Alex's recent thread: https://lkml.kernel.org/r/20200713115807.56362-1-alex.shi@linux.alibaba.com Reviewed-by: Alex Shi <alex.shi@linux.alibaba.com> Signed-off-by: Tao Zhou <ouwen210@hotmail.com> Link: https://lore.kernel.org/r/BL0PR14MB37798BBF2307910DE73EF6D49A770@BL0PR14MB3779.namprd14.prod.outlook.com Signed-off-by: Jonathan Corbet <corbet@lwn.net>
2020-07-27Documentation/admin-guide: tainted-kernels: fix spelling mistakeYue Hu
Fix typo "tis" -> "this". Signed-off-by: Yue Hu <huyue2@yulong.com> Link: https://lore.kernel.org/r/20200725022444.10976-1-zbestahu@gmail.com Signed-off-by: Jonathan Corbet <corbet@lwn.net>
2020-07-27MAINTAINERS: adjust kprobes.rst entry to new locationLukas Bulwahn
Commit 2165b82fde82 ("docs: Move kprobes.rst from staging/ to trace/") moved kprobes.rst, but missed to adjust the MAINTAINERS entry. Hence, ./scripts/get_maintainer.pl --self-test=patterns complains: warning: no file matches F: Documentation/staging/kprobes.rst Adjust the entry to the new file location. Signed-off-by: Lukas Bulwahn <lukas.bulwahn@gmail.com> Acked-by: Naveen N. Rao <naveen.n.rao@linux.vnet.ibm.com> Link: https://lore.kernel.org/r/20200726055843.10783-1-lukas.bulwahn@gmail.com Signed-off-by: Jonathan Corbet <corbet@lwn.net>
2020-07-27devices.txt: document rfkill allocationPavel Machek
Document rfkill allocation. Signed-off-by: Pavel Machek (CIP) <pavel@denx.de> Link: https://lore.kernel.org/r/20200726075327.GA25647@duo.ucw.cz Signed-off-by: Jonathan Corbet <corbet@lwn.net>
2020-07-27PCI: correct flag nameJulia Lawall
RESOURCE_IO does not exist. Rename to IORESOURCE_IO. Signed-off-by: Julia Lawall <Julia.Lawall@inria.fr> Link: https://lore.kernel.org/r/1595778455-12132-1-git-send-email-Julia.Lawall@inria.fr Signed-off-by: Jonathan Corbet <corbet@lwn.net>
2020-07-27docs: filesystems: vfs: correct flag nameJulia Lawall
There is no flag REMAP_CAN_SHORTEN. Commit eca3654e3cc7 ("vfs: enable remap callers that can handle short operations") that introduces this text also introduces the flag REMAP_FILE_CAN_SHORTEN. Change the name in the documentation accordingly. Signed-off-by: Julia Lawall <Julia.Lawall@inria.fr> Fixes: eca3654e3cc7 ("vfs: enable remap callers that can handle short operations") Link: https://lore.kernel.org/r/1595789020-12941-1-git-send-email-Julia.Lawall@inria.fr Signed-off-by: Jonathan Corbet <corbet@lwn.net>
2020-07-27docs: filesystems: vfs: correct sync_mode flag namesJulia Lawall
Change the nonexistent flag names WBC_SYNC_ALL and WBC_SYNC_NONE to WB_SYNC_ALL and WB_SYNC_NONE, respectively, as used in the code with wbc->sync_mode. Signed-off-by: Julia Lawall <Julia.Lawall@inria.fr> Link: https://lore.kernel.org/r/1595791341-13209-1-git-send-email-Julia.Lawall@inria.fr Signed-off-by: Jonathan Corbet <corbet@lwn.net>
2020-07-27docs: path-lookup: markup fixes for emphasisVegard Nossum
Underscores were being used for emphasis, but these are rendered verbatim in HTML output. reStructuredText uses asterisks for emphasis. I *think* I caught all of them. Signed-off-by: Vegard Nossum <vegard.nossum@oracle.com> Link: https://lore.kernel.org/r/20200727121525.28103-2-vegard.nossum@oracle.com Signed-off-by: Jonathan Corbet <corbet@lwn.net>
2020-07-27docs: path-lookup: more markup fixesVegard Nossum
"xxx``at``" makes the `` appear verbatim in the HTML output. I've opted for changing this into ``*at()`` to harmonise this with the use of * seen later in the same document (and add the parentheses to clarify that this is a system/function call). ``path_``* also makes `` appear in the HTML output, but we can fix it by moving the * into the ``. Also add the parantheses here. Signed-off-by: Vegard Nossum <vegard.nossum@oracle.com> Link: https://lore.kernel.org/r/20200727121525.28103-1-vegard.nossum@oracle.com Signed-off-by: Jonathan Corbet <corbet@lwn.net>
2020-07-27docs: path-lookup: fix HTML entity mojibakeVegard Nossum
Two cases of "<" somehow turned into "&lt;". I noticed it on <https://www.kernel.org/doc/html/latest/filesystems/path-lookup.html>. I've verified that the HTML output is correct with this patch. Signed-off-by: Vegard Nossum <vegard.nossum@oracle.com> Link: https://lore.kernel.org/r/20200727114527.23944-1-vegard.nossum@oracle.com Signed-off-by: Jonathan Corbet <corbet@lwn.net>
2020-07-27sched: Fix a typo in a comment王文虎
Change the comment typo: "direcly" -> "directly". Signed-off-by: Wang Wenhu <wenhu.wang@vivo.com> Signed-off-by: Ingo Molnar <mingo@kernel.org> Link: https://lore.kernel.org/r/AAcAXwBTDSpsKN-5iyIOtaqk.1.1595857191899.Hmail.wenhu.wang@vivo.com
2020-07-27arm64: dts: qcom: sc7180: Add iommus property to ETRSai Prakash Ranjan
Define iommus property for Coresight ETR component in SC7180 SoC with the SID and mask to enable SMMU translation for this master. Signed-off-by: Sai Prakash Ranjan <saiprakash.ranjan@codeaurora.org> Link: https://lore.kernel.org/r/2312c9a10e7251d69e31e4f51c0f1d70e6f2f2f5.1591708204.git.saiprakash.ranjan@codeaurora.org Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
2020-07-27arm64: dts: qcom: sc7180: Add support to skip powering up of ETMSai Prakash Ranjan
Add "qcom,skip-power-up" property to skip powering up ETM on SC7180 SoC to workaround a hardware errata where CPU watchdog counter is stopped when ETM power up bit is set (i.e., when TRCPDCR.PU = 1). Reviewed-by: Mathieu Poirier <mathieu.poirier@linaro.org> Signed-off-by: Sai Prakash Ranjan <saiprakash.ranjan@codeaurora.org> Link: https://lore.kernel.org/r/8c5ff297d8c89d9d451352f189baf26c8938842a.1591708204.git.saiprakash.ranjan@codeaurora.org Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
2020-07-27arm64: dts: qcom: sc7180: Add properties to qfprom for fuse blowingRavi Kumar Bokka
This patch adds properties to the qfprom node to enable fuse blowing. Signed-off-by: Ravi Kumar Bokka <rbokka@codeaurora.org> Signed-off-by: Douglas Anderson <dianders@chromium.org> Link: https://lore.kernel.org/r/20200710073439.v5.4.I70c17309f8b433e900656d7c53a2e6b61888bb68@changeid Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
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