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git://git.kernel.org/pub/scm/linux/kernel/git/tegra/linux into next/dt2
Pull "ARM: tegra: Device tree changes for v3.19" from Thierry Reding:
The bulk of these changes add memory controller nodes for Tegra30,
Tegra114 and Tegra124. The memory controller implements an IOMMU that
the display controllers are attached to. This allows them to scan out
physically non-contiguous framebuffers and removes one of the primary
users of CMA.
The only other change adds a new MIPI pad control bank to the pin
controller on Tegra124. The corresponding driver patch for this went
into v3.18 as:
3ccc11f6b82c pinctrl: tegra: Add MIPI pad control
* tag 'tegra-for-3.19-dt' of git://git.kernel.org/pub/scm/linux/kernel/git/tegra/linux:
ARM: tegra: Enable IOMMU for display controllers on Tegra124
ARM: tegra: Enable IOMMU for display controllers on Tegra114
ARM: tegra: Enable IOMMU for display controllers on Tegra30
ARM: tegra: Add memory controller support for Tegra124
ARM: tegra: Add memory controller support for Tegra114
ARM: tegra: Add memory controller support for Tegra30
ARM: tegra: Add APB_MISC_GP as a MIPI pad control bank
These additional commits are merged as dependencies:
memory: Add NVIDIA Tegra memory controller support
of: Add NVIDIA Tegra memory controller binding
ARM: tegra: Move AHB Kconfig to drivers/amba
amba: Add Kconfig file
clk: tegra: Implement memory-controller clock
powerpc/iommu: Rename iommu_[un]map_sg functions
iommu: Improve error handling when setting bus iommu
iommu: Do more input validation in iommu_map_sg()
iommu: Add iommu_map_sg() function
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
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Add iommus properties to the device tree nodes for the two display
controllers found on Tegra124. This will allow the display controllers
to map physically non-contiguous buffers to I/O virtual contiguous
address spaces so that they can be used for scan-out.
Signed-off-by: Thierry Reding <treding@nvidia.com>
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Add iommus properties to the device tree nodes for the two display
controllers found on Tegra114. This will allow the display controllers
to map physically non-contiguous buffers to I/O virtual contiguous
address spaces so that they can be used for scan-out.
Signed-off-by: Thierry Reding <treding@nvidia.com>
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Add iommus properties to the device tree nodes for the two display
controllers found on Tegra30. This will allow the display controllers to
map physically non-contiguous buffers to I/O virtual contiguous address
spaces so that they can be used for scan-out.
Signed-off-by: Thierry Reding <treding@nvidia.com>
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Add the memory controller and wire up the interrupt that is used to
report errors. Provide a reference to the memory controller clock and
mark the device as being an IOMMU by adding an #iommu-cells property.
Signed-off-by: Thierry Reding <treding@nvidia.com>
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Add the device tree node for the memory controller found on Tegra114
SoCs. The memory controller integrates an IOMMU (called SMMU) as well as
various knobs to tweak memory accesses by the various clients.
The old IOMMU device tree node is collapsed into the memory controller
node to more accurately describe the hardware. While this change is
incompatible, the IOMMU driver has never had any users so the change is
not going to cause any breakage.
Signed-off-by: Thierry Reding <treding@nvidia.com>
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Collapses the old memory-controller and IOMMU device tree nodes into a
single node to more accurately describe the hardware.
While this is an incompatible change there are no users of the IOMMU on
Tegra, even though a driver has existed for some time.
Signed-off-by: Thierry Reding <treding@nvidia.com>
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This patch adds the APB_MISC_GP_MIPI_PAD_CTRL_0 as a pin-control bank on
Tegra124 so the new MIPI pad control group can be muxed between CSI and
DSI_B.
Signed-off-by: Sean Paul <seanpaul@chromium.org>
Acked-by: Stephen Warren <swarren@nvidia.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
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The memory controller on NVIDIA Tegra exposes various knobs that can be
used to tune the behaviour of the clients attached to it.
Currently this driver sets up the latency allowance registers to the HW
defaults. Eventually an API should be exported by this driver (via a
custom API or a generic subsystem) to allow clients to register latency
requirements.
This driver also registers an IOMMU (SMMU) that's implemented by the
memory controller. It is supported on Tegra30, Tegra114 and Tegra124
currently. Tegra20 has a GART instead.
The Tegra SMMU operates on memory clients and SWGROUPs. A memory client
is a unidirectional, special-purpose DMA master. A SWGROUP represents a
set of memory clients that form a logical functional unit corresponding
to a single device. Typically a device has two clients: one client for
read transactions and one client for write transactions, but there are
also devices that have only read clients, but many of them (such as the
display controllers).
Because there is no 1:1 relationship between memory clients and devices
the driver keeps a table of memory clients and the SWGROUPs that they
belong to per SoC. Note that this is an exception and due to the fact
that the SMMU is tightly integrated with the rest of the Tegra SoC. The
use of these tables is discouraged in drivers for generic IOMMU devices
such as the ARM SMMU because the same IOMMU could be used in any number
of SoCs and keeping such tables for each SoC would not scale.
Acked-by: Joerg Roedel <jroedel@suse.de>
Signed-off-by: Thierry Reding <treding@nvidia.com>
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into next/dt2
Pull "mvebu DT changes for v3.19 (round 3)" from Jason Cooper:
- Armada 375
- Add PHY and USB cluster controller support
* tag 'mvebu-dt-usb-phy-3.19-3' of git://git.infradead.org/linux-mvebu:
ARM: mvebu: add PHY support to the dts for the USB controllers on Armada 375
ARM: mvebu: add Device Tree description of USB cluster controller on Armada 375
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
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This is a commit that is shared with Kishon's phy repository.
* tag 'depends/phy-dt-header'
phy: Add PHY header file for DT x Driver defines
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
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Linux 3.18-rc4 is a dependency for the phy-dt-header branch that
is needed for the final mvebu DT changes.
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
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The memory controller on NVIDIA Tegra exposes various knobs that can be
used to tune the behaviour of the clients attached to it.
In addition, the memory controller implements an SMMU (IOMMU) which can
translate I/O virtual addresses to physical addresses for clients. This
is useful for scatter-gather operation on devices that don't support it
natively and for virtualization or process separation.
Signed-off-by: Thierry Reding <treding@nvidia.com>
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This will allow the Kconfig option to be shared among 32-bit and 64-bit
ARM.
Signed-off-by: Thierry Reding <treding@nvidia.com>
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Rather than duplicate the ARM_AMBA Kconfig symbol in both 32-bit and
64-bit ARM architectures, move the common definition to drivers/amba
where dependent drivers will be located.
Signed-off-by: Thierry Reding <treding@nvidia.com>
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The memory controller clock runs either at half or the same frequency as
the EMC clock.
Reviewed-By: Tomeu Vizoso <tomeu.vizoso@collabora.com>
Acked-by: Mike Turquette <mturquette@linaro.org>
Signed-off-by: Thierry Reding <treding@nvidia.com>
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This branch contains a couple of changes that will conflict with the
Tegra SMMU driver rewrite. Since the driver is largely rewritten the
conflict resolution is non-trivial.
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Now that the USB cluster node has been added, use it as a PHY provider
for the USB controller linked to it: the first EHCI and the xHCI.
Signed-off-by: Gregory CLEMENT <gregory.clement@free-electrons.com>
Link: https://lkml.kernel.org/r/1415879269-29711-7-git-send-email-gregory.clement@free-electrons.com
Signed-off-by: Jason Cooper <jason@lakedaemon.net>
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On Armada 375, the USB cluster allows to control the cluster composed
of the USB2 and USB3 host controllers.
Acked-by: Kishon Vijay Abraham I <kishon@ti.com>
Signed-off-by: Gregory CLEMENT <gregory.clement@free-electrons.com>
Link: https://lkml.kernel.org/r/1415879269-29711-6-git-send-email-gregory.clement@free-electrons.com
Signed-off-by: Jason Cooper <jason@lakedaemon.net>
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shared header file which will be referenced from both
PHY driver and its associated Device Tree node(s)
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Synology DS414 is a 4-bay NAS powered by a Marvell Armada XP
(mv78230 dual-core @1.33Ghz). It is very similar on many aspects
to previous 4-bay synology models based on Marvell kirkwood SoC.
Here is a short summary of the device:
- 1GB RAM
- Boot on SPI flash (64Mbit Micron N25Q064)
- 2 GbE interfaces (Armada MAC connected to two Marvell 88E1512
PHY via RGMII)
- 1 front USB 2.0 ports (directly handled by the Armada 370)
- 2 rear USB 3.0 ports (handled by an EtronTech EJ168A XHCI
controller on the PCIe bus)
- 4 internal SATA ports handled by a Marvell 88SX7042 SATA-II
controller on the PCIe bus)
- Seiko S-35390A I2C RTC chip
- UART0 providing serial console
- UART1 used for poweroff (connected to a Microchip PIC16F883)
Additional note: the front LEDs the and the two fans are not directly
connected to the SoC and under its control. The former are presumably
driven by the SATA controller, the latter by the PIC.
[ jac: fixed up s/ge[01]_rgmii_pins/pmx_ge[01]_rgmii/ to match
armada-xp.dtsi ]
Acked-by: Andrew Lunn <andrew@lunn.ch>
Signed-off-by: Arnaud Ebalard <arno@natisbad.org>
Link: https://lkml.kernel.org/r/5b678d6d1f2f42f4bf0d087878b9d8024d463ea7.1416613429.git.arno@natisbad.org
Signed-off-by: Jason Cooper <jason@lakedaemon.net>
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Synology DS213j is a 2-bay NAS powered by a Marvell Armada 370
(88F6710 @1.2Ghz). It is very similar on many aspects to previous
2-bay synology models based on Marvell kirkwood SoC. Here is a
short summary of the device:
- 512MB RAM
- boot on SPI flash (64Mbit Micron N25Q064)
- 1 GbE interface (Armada MAC connected to a Marvell 88E1512
PHY via SGMII)
- 2 rear USB 2.0 ports (directly handled by the Armada 370)
- 2 internal SATA ports handled by the Armada 370: 2 GPIO for
presence, 2 for powering them
- two front amber LED (disk1, disk2) controlled by the SoC
- Seiko S-35390A I2C RTC chip
- UART0 providing serial console
- UART1 used for poweroff (connected to a TI MSP430F2111)
- Fan handled via 4 GPIO (3 for speed, 1 for alarm)
Acked-by: Andrew Lunn <andrew@lunn.ch>
Signed-off-by: Arnaud Ebalard <arno@natisbad.org>
Link: https://lkml.kernel.org/r/20f1a03897df1d825b62abdd525e588a8e39b3ec.1416613429.git.arno@natisbad.org
Signed-off-by: Jason Cooper <jason@lakedaemon.net>
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This patch defines common Armada XP pinctrl settings in armada-xp.dtsi
for the supported SPI interface (MPP36-39) and use it as default
for Armada XP spi interface. That being done, it removes the now
redundant definitions in armada-xp-axpwifiap.dts.
Note: this patch has the potential to break out-of-tree users w/o
specific pinctrl settings for their spi interfaces if the default
above does not match their config (i.e. if they do not use CS0).
Acked-by: Andrew Lunn <andrew@lunn.ch>
Signed-off-by: Arnaud Ebalard <arno@natisbad.org>
Link: https://lkml.kernel.org/r/d404b7abd80ee5a0fd8e8d3586d33cd37740d589.1416613429.git.arno@natisbad.org
Signed-off-by: Jason Cooper <jason@lakedaemon.net>
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This patch defines common Armada XP pinctrl settings for uart2 and
uart3 interfaces (uart0 and uart1 rx/tx do not rely on MPP):
uart2: MPP42-43 as default
uart3: MPP44-45 as default
Suggested-by: Andrew Lunn <andrew@lunn.ch>
Acked-by: Andrew Lunn <andrew@lunn.ch>
Signed-off-by: Arnaud Ebalard <arno@natisbad.org>
Link: https://lkml.kernel.org/r/fd51c080c7139a67ec01df8d797f1e88ce557796.1416613429.git.arno@natisbad.org
Signed-off-by: Jason Cooper <jason@lakedaemon.net>
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This patch defines common Armada 370 pinctrl settings for uart0 and
uart1 interfaces:
uart0: MPP0-1 as default
uart1: MPP41-42 as default
Note: this patch has the potential to break out-of-tree users w/o
specific pinctrl settings for their uart interfaces if the default
above does not match their config.
Suggested-by: Andrew Lunn <andrew@lunn.ch>
Acked-by: Andrew Lunn <andrew@lunn.ch>
Signed-off-by: Arnaud Ebalard <arno@natisbad.org>
Link: https://lkml.kernel.org/r/31412e57955c98bc9cc47b70726b5072af945cc3.1416613429.git.arno@natisbad.org
Signed-off-by: Jason Cooper <jason@lakedaemon.net>
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This patch defines common Armada 370 pinctrl settings for spi0 and spi1
interfaces:
spi0: MPP33-36 as default, MPP32,63-65 as available alternate config
spi1: MPP49-52 as default
Currently, the Armada 370 DB .dts file has no explicit pinctrl info
for the spi0 interface used to access the flash on the board. The
patch fixes that by also adding explicit pinctrl info (MPP32,63-65)
for this SPI interface.
Note: this patch has the potential to break out-of-tree users w/o
specific pinctrl settings for their spi interfaces if the default
above does not match their config.
Suggested-by: Andrew Lunn <andrew@lunn.ch>
Acked-by: Andrew Lunn <andrew@lunn.ch>
Signed-off-by: Arnaud Ebalard <arno@natisbad.org>
Link: https://lkml.kernel.org/r/1e812eb63b37718e273463e22e4d7512f8f0b624.1416613429.git.arno@natisbad.org
Signed-off-by: Jason Cooper <jason@lakedaemon.net>
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What was done by Sebastian in 264a05e19bf5 ("ARM: mvebu: armada-xp:
Add node alias to pinctrl and add base address") and 01c434225ee6
("ARM: mvebu: armada-xp: Use pinctrl node alias") can also be done for
Armada 370, i.e.
- Rename Armada 370 pinctrl node to pin-ctrl with its address encoded
- Add a node alias to access the pinctrl node easily.
- use the newly available alias in existing Armada 370 .dts files
We can even go a bit further by putting the pinctrl node definition in
armada-370-xp.dtsi, with only its reg property defined. This allows us
to then also use the newly defined node alias in armada-xp.dtsi,
armada-370.dtsi.
Suggested-by: Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com>
Suggested-by: Andrew Lunn <andrew@lunn.ch>
Acked-by: Andrew Lunn <andrew@lunn.ch>
Signed-off-by: Arnaud Ebalard <arno@natisbad.org>
Link: https://lkml.kernel.org/r/b54eb45e5242728aace3ce8aef2eae4251f8dea3.1416613429.git.arno@natisbad.org
Signed-off-by: Jason Cooper <jason@lakedaemon.net>
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Now that labels for uartX are available in Marvell Armada .dtsi files,
this patch replaces the "/soc/internal-regs/serial@12000" found in
armada-xp-lenovo-ix4-300d.dts file for stdout-path property by the more
concise &uart0.
Reviewed-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
Suggested-by: Andrew Lunn <andrew@lunn.ch>
Acked-by: Andrew Lunn <andrew@lunn.ch>
Signed-off-by: Arnaud Ebalard <arno@natisbad.org>
Link: https://lkml.kernel.org/r/d1a883510e01f7f212a385e826dccbef903fae42.1416613429.git.arno@natisbad.org
Signed-off-by: Jason Cooper <jason@lakedaemon.net>
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This patch adds uartX labels for Armada SoC serial nodes. This is
a preliminary work to be able to easily reference the serial lines
in Device Tree files. One expected use is when providing stdout-path
property for barebox.
Reviewed-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
Acked-by: Andrew Lunn <andrew@lunn.ch>
Signed-off-by: Arnaud Ebalard <arno@natisbad.org>
Link: https://lkml.kernel.org/r/0683d1a823fe9b75849f3dafcf1cf6ee291cdca6.1416613429.git.arno@natisbad.org
Signed-off-by: Jason Cooper <jason@lakedaemon.net>
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As reported by Andrew, the vendor prefix for Seiko Instruments, Inc.
S-35390A I2C RTC chip in kirkwood-synology.dtsi has a typo (ssi
instead of sii). This patches fixes it.
Note: i2c devices ignore the optional vendor prefix, which explains
why it worked with the typo and also why there is no backward
compatibility issues with the fix.
Reported-by: Andrew Lunn <andrew@lunn.ch>
Acked-by: Andrew Lunn <andrew@lunn.ch>
Signed-off-by: Arnaud Ebalard <arno@natisbad.org>
Link: https://lkml.kernel.org/r/0444140a267d982c3e5f5f2b7b5f2dc41d010e2a.1416613429.git.arno@natisbad.org
Signed-off-by: Jason Cooper <jason@lakedaemon.net>
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Commit a095b1c78a35 ("ARM: mvebu: sort DT nodes by address")
missed placing the system-controller in the correct order.
Fixes: a095b1c78a35 ("ARM: mvebu: sort DT nodes by address")
Signed-off-by: Uwe Kleine-König <u.kleine-koenig@pengutronix.de>
Acked-by: Andrew Lunn <andrew@lunn.ch>
Link: https://lkml.kernel.org/r/20141114204333.GS27002@pengutronix.de
Signed-off-by: Jason Cooper <jason@lakedaemon.net>
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In order to update MAC address entries in the ethernet nodes in Device Tree
both mainline U-Boot and Barebox bootloaders accept the same format of aliases,
which is 'ethernetX', where X stands for an interface number.
Other platforms in the mainline Linux, that comprise ethernet references in
'/aliases' node (like various flavours of imx or sunXi), follow the naming
scheme described above.
This commit ajusts ethernet aliases of Marvell Armada 38x SoC to be properly
recognized by bootloaders' MAC address fixup routines.
Signed-off-by: Marcin Wojtas <mw@semihalf.com>
Reviewed-by: Gregory CLEMENT <gregory.clement@free-electrons.com>
Acked-by: Andrew Lunn <andrew@lunn.ch>
Link: https://lkml.kernel.org/r/1415980652-7429-5-git-send-email-mw@semihalf.com
Signed-off-by: Jason Cooper <jason@lakedaemon.net>
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For proper operation of Armada 38x SDHCI controller proper 'clocks' property
is sufficient. Therefore it is not useful to keep an additional
'clock-frequency' property in SDHCI controller node of board-level Device Tree
file for Armada 385 DB.
This commit gets rid of useless 'clock-frequency' property.
Signed-off-by: Marcin Wojtas <mw@semihalf.com>
Reviewed-by: Gregory CLEMENT <gregory.clement@free-electrons.com>
Acked-by: Andrew Lunn <andrew@lunn.ch>
Link: https://lkml.kernel.org/r/1415980652-7429-4-git-send-email-mw@semihalf.com
Signed-off-by: Jason Cooper <jason@lakedaemon.net>
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The Marvell Armada 38x SoC's SDHCI interface is capable of using 1.8v voltage,
needed for driving "UHS-I" SD cards at their full speed. It is not, however,
possible on the DB board. Due to physical connectivity connector supply is tied
to 3v and any attempt of changing voltage in order to operate in the fastest UHS
modes fails.
This patch enables equivalent SDHCI quirk in order to adjust controller
operation to system capabilities.
Signed-off-by: Marcin Wojtas <mw@semihalf.com>
Reviewed-by: Gregory CLEMENT <gregory.clement@free-electrons.com>
Acked-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
Acked-by: Andrew Lunn <andrew@lunn.ch>
Link: https://lkml.kernel.org/r/1415980652-7429-3-git-send-email-mw@semihalf.com
Signed-off-by: Jason Cooper <jason@lakedaemon.net>
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git://git.kernel.org/pub/scm/linux/kernel/git/nferre/linux-at91 into next/dt2
Pull "Second DT batch for 3.19" from Nicolas Ferre:
- some trivial fixes: macro for IRQ, license wording
- DMA description for sama5d4
- RTT as RTC driver definition plus associated GPBR for several SoCs
- addition of missing nodes: rtc for at91sam9rl, isi for at91sam9g45
* tag 'at91-dt2' of git://git.kernel.org/pub/scm/linux/kernel/git/nferre/linux-at91:
ARM: at91/dt: at91sam9g45: add ISI node
ARM: at91/dt: enable the RTT block on the at91sam9m10g45ek board
ARM: at91/dt: enable the RTT block on the sam9g20ek board
ARM: at91/dt: add GPBR nodes
ARM: at91/dt: add RTT nodes to at91 dtsis
ARM: at91/dt: at91sam9rl: add rtc
ARM: at91: fix GPLv2 wording
ARM: at91/dt: sama5d4: add DMA support
ARM: at91/dt: sama5d4: use macro instead of numeric value
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
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git://git.infradead.org/users/vkoul/slave-dma into next/dt
This is a dependency for the at91 DT support, and marked as a stable branch
by Vinod
* 'topic/at_xdmac' of git://git.infradead.org/users/vkoul/slave-dma:
dmaengine: at_xdmac: Add DMA_PRIVATE
ARM: dts: at_xdmac: fix bad value of dma-cells in documentation
dmaengine: at_xdmac: fix missing spin_unlock
dmaengine: at_xdmac: fix a bug in transfer residue computation
dmaengine: at_xdmac: fix software lockup at_xdmac_tx_status()
dmaengine: at_xdmac: remove chancnt affectation
dmaengine: at_xdmac: prefer usage of readl/writel_relaxed
dmaengine: xdmac: fix print warning on dma_addr_t variable
dmaengine: xdmac: fix print warning on size_t variable
dmaengine: at_xdmac: fix usage of read, write wrappers
dmaengine: at_xdmac: fix semicolon.cocci warnings
MAINTAINERS: add entry for Atmel XDMA driver
ARM: dts: at_xdmac: add bindings documentation
dmaengine: at_xdmac: creation of the atmel eXtended DMA Controller driver
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
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git://git.kernel.org/pub/scm/linux/kernel/git/ssantosh/linux-keystone into next/dt
Pull "Keystone dts updates for 3.19" from Santosh Shilimkar:
- PCIE controller related updates
- 1GBe phy related upates
* tag 'keystone-dts' of git://git.kernel.org/pub/scm/linux/kernel/git/ssantosh/linux-keystone:
ARM: dts: keystone-k2e: add DT bindings for PCI controller for port 1
ARM: dts: keystone: add DT bindings for PCI controller for port 0
ARM: dts: k2l-evm: add 1g ethernet phys nodes
ARM: dts: k2e-evm: add 1g ethernet phys nodes
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
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into next/dt
Pull "Broadcom Cygnus SoC Device Tree changes" from Florian Fainelli:
This pull request contains the Broadcom Cygnus Device Tree changes:
- binding documentation for the SoC and clock
- cygnus SoC and clock dtsi files
- DTS for Cygnus Entreprise phone, BCM911360K and BCM958300K
* tag 'arm-soc/for-3.19/cygnus-dts-v2' of http://github.com/brcm/linux:
ARM: dts: Enable Broadcom Cygnus SoC
dt-bindings: Document Broadcom Cygnus SoC and clocks
[arnd: something went wrong here, we already had pulled an earlier
version of the same patches, which had the wrong license statement.
I've pulled this one over the old pull request and fixed up the
conflicts now]
Conflicts:
arch/arm/boot/dts/bcm-cygnus-clock.dtsi
arch/arm/boot/dts/bcm-cygnus.dtsi
arch/arm/boot/dts/bcm911360_entphn.dts
arch/arm/boot/dts/bcm911360k.dts
arch/arm/boot/dts/bcm958300k.dts
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
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compatible property
This patch corrects the vendor-prefix for isl29028 in the compatible property from
"isil,isl29028" to "isl,isl29028" according to listed vendor-prefixes in
Documentation/devicetree/bindings/vendor-prefixes.txt. Incorrect vendor-prefix "isl"
was reported by checkpatch.pl warning for drivers/staging/iio/light/isl29028.c.
Thus incorrect vendor-prefix "isil" was corrected for every mention of device isl29028.
Signed-off-by: Darshana Padmadas <darshanapadmadas@gmail.com>
Acked-by: Arnd Bergmann <arnd@arndb.de>
Acked-by: Mark Rutland <mark.rutland@arm.com>
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
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This patch adds the correct vendor-prefix for device isl29028 and
maintains deprecated vendor-prefix found by checkpatch warning
for older kernel releases.
Signed-off-by: Darshana Padmadas <darshanapadmadas@gmail.com>
Acked-by: Arnd Bergmann <arnd@arndb.de>
Acked-by: Mark Rutland <mark.rutland@arm.com>
Acked-by: Jonathan Cameron <jic23@kernel.org>
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
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This patch documents deprecated vendor name "isil" to fix warning of
undocumented string for device isl29028 as reported while running checkpatch.pl
on drivers/staging/iio/light/isl29028.c. This is done to maintain compatibility
with older kernels.
Signed-off-by: Darshana Padmadas <darshanapadmadas@gmail.com>
Acked-by: Arnd Bergmann <arnd@arndb.de>
Acked-by: Mark Rutland <mark.rutland@arm.com>
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
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This patch documents the device isl29028 with its vendor-prefix. Undocumented deprecated vendor-prefix
found by checkpatch also documented for compatibility reasons.
Signed-off-by: Darshana Padmadas <darshanapadmadas@gmail.com>
Acked-by: Arnd Bergmann <arnd@arndb.de>
Acked-by: Mark Rutland <mark.rutland@arm.com>
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
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The model B and B+ differ in the GPIO lines for ACT and PWR leds, and the
I2S interface.
Signed-off-by: Matthias Klein <matthias.klein@linux.com>
Tested-by: Stephen Warren <swarren@nvidia.com>
Signed-off-by: Lee Jones <lee@kernel.org>
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
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git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap into next/dt
Pull "Device tree related changes for omaps" from Tony Lindgren:
- Fix currently harmless but wrong sizes for various GPMC connected
devices
- Set up timings for several GPMC connected devices to get rid of
bootloader dependencies in later patches
- Enable various drivers for dra7xx
- Prepare Igep boards to support new variants
- Add intial support for BeagleBoard-X15
* tag 'omap-for-v3.19/dt-part1' of git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap: (37 commits)
ARM: dts: DRA7: Add aliases for all serial ports
ARM: dts: Add am57xx-beagle-x15
ARM: OMAP2+: igep00x0: Add pdata-quirks for the btwilink device.
ARM: dts: omap3-igep00x0: Remove i2c2 node.
ARM: dts: omap3-igep0020-rev-f: Support IGEPv2 Rev. F
ARM: dts: omap3-igep0020-common: Introduce igep0020 common dtsi file.
ARM: dts: omap3-igep0030-rev-g: Support IGEP COM MODULE Rev. G
ARM: dts: omap3-igep0030-common: Introduce igep0030 common dtsi file.
ARM: dts: omap3-igep00x0: Move outside common file the on board Wifi module.
ARM: dts: omap3-igep0020: Specify IGEPv2 revision in device tree.
ARM: dts: omap3-igep0030: Specify IGEP COM revision in device tree.
ARM: dts: omap3-igep00x0: Move NAND configuration to a common place.
ARM: dts: omap3-igep00x0: Fix UART2 pins that aren't common.
ARM: dts: dra7: add labels to DWC3 nodes
ARM: dts: dra72x-evm: Enable CPSW and MDIO
ARM: dts: dra7-evm: Keep all VDD rails always-on
ARM: dts: dra72-evm: Add MMC nodes
ARM: dts: dra72-evm: Add power button node
ARM: dts: dra72-evm: Provide explicit pinmux for TPS PMIC
ARM: dts: dra72-evm: Add regulator information to USB2 PHYs
...
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
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Pull "mvebu DT changes for v3.19" from Jason Cooper:
- mvebu
- ReadyNAS 102 leds, esata
- ReadyNAS 2120 esata
- Add cache-unified for Aurora L2 node
- Add ref clk for timer and watchdog on Armada 375
- Cleanup Armada XP pinctrl for GigE
- Add RGMII pinctrl, i2c eeprom, and fix 74hc595 counter on Lenovo ix4-300d
- kirkwood
- Add DLink DIR665 and it's DSA configuration
* tag 'mvebu-dt-3.19' of git://git.infradead.org/linux-mvebu:
ARM: mvebu: armada-xp: Fix 74hc595 count for Lenovo ix4-300d
ARM: mvebu: armada-xp: Add I2C eeprom on Lenovo ix4-300d
ARM: mvebu: armada-xp: Add RGMII pinctrl to Lenovo ix4-300d
ARM: mvebu: armada-xp: Add GE0 pinctrl settings for GMII
ARM: mvebu: armada-xp: Move GE0/1 pinctrl settings for RGMII
ARM: mvebu: armada-xp: Use pinctrl node alias
ARM: mvebu: armada-xp: Add node alias to pinctrl and add base address
ARM: mvebu: armada-xp: Consolidate pinctrl node
ARM: Kirkwood: DIR665: Instantiate Distributed Switch Architecture
ARM: Kirkwood: Add support for DLink DIR665
ARM: mvebu: Enable rear eSATA ports of NETGEAR ReadyNAS 2120
ARM: mvebu: Enable the reference clock for timer and watchdog on Armada 375 SoC
arm: mvebu: Clarify (e)SATA ports info in NETGEAR ReadyNAS 102 .dts file
arm: mvebu: Fix LED color in NETGEAR ReadyNAS 102 .dts file
ARM: mvebu: Fix the Aurora L2 cache node with the required cache-unified property
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
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into next/dt
Pull "ARM: DT: Hisilicon terminal SoC HiX5HD2 DT updates for 3.19" from Wei Xu:
- Add reboot node, reusing syscon-reboot
- Add I2C nodes Hisilicon IP
- Add IR node based on Hisilicon IP
- Add Watchdog node based on ARM IP
- Add GPIO nodes based on ARM GPIO IP
- Add SATA node based on Hisilicon IP
- Add USB nodes
- Add MMC nodes based on Synopsys IP
- Add GMAC nodes based on Hisilicon IP
* tag 'hix5hd2-dt-for-3.19' of git://github.com/hisilicon/linux-hisi:
ARM: dts: hix5hd2: add reboot node
ARM: dts: hix5hd2: add i2c node
ARM: dts: hix5hd2: add ir node
ARM: dts: hix5hd2: add wdg node
ARM: dts: hix5hd2: add gpio node
ARM: dts: hix5hd2: add sata node
ARM: dts: hix5hd2: add usb node
ARM: dts: hix5hd2: add mmc node
ARM: dts: hix5hd2: add gmac node
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
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git://git.kernel.org/pub/scm/linux/kernel/git/horms/renesas into next/dt
Pull "Third Round of Renesas ARM Based SoC DT Cleanups for v3.19" from Simon Horman:
* Use keyboard as gpio-keys node name
* tag 'renesas-dt-cleanups3-for-v3.19' of git://git.kernel.org/pub/scm/linux/kernel/git/horms/renesas:
ARM: shmobile: kzm9g-reference: Use keyboard as gpio-keys node name
ARM: shmobile: koelsch: Use keyboard as gpio-keys node name
ARM: shmobile: lager: Use keyboard as gpio-keys node name
ARM: shmobile: armadillo800eva: Use keyboard as gpio-keys node name
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
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git://git.kernel.org/pub/scm/linux/kernel/git/horms/renesas into next/dt
Pull "Second Round of Renesas ARM Based SoC DT Cleanups for v3.19" from Simon Horman:
* Drop console= bootargs parameter on alt
* Correct scifb* naming on r8a73a4
* Drop 0x unit-address prefixes
* Remove unnecessary MMC options
* tag 'renesas-dt-cleanups2-for-v3.19' of git://git.kernel.org/pub/scm/linux/kernel/git/horms/renesas:
ARM: shmobile: alt dts: Drop console= bootargs parameter
ARM: shmobile: r8a73a4: fix scifb* naming
ARM: shmobile: kzm9g-reference dts: Drop bogus 0x unit-address prefix
ARM: shmobile: r8a7791 dtsi: Drop bogus 0x unit-address prefix
ARM: shmobile: r8a7790 dtsi: Drop bogus 0x unit-address prefix
ARM: shmobile: r8a7790 dtsi: Remove unnecessary MMC options
ARM: shmobile: r8a7779 dtsi: Remove unnecessary MMC options
ARM: shmobile: r8a7778 dtsi: Remove unnecessary MMC options
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
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git://git.kernel.org/pub/scm/linux/kernel/git/horms/renesas into next/dt
Pull "Renesas ARM Based SoC DT Updates for v3.19" from Simon Horman:
* Add Add SoC-specific SATA compatible property to r8a7779
* Enable DMA for MMCIF on r8a7791 and r8a7790
* Enable USB-PHY, HS-USB and USB3.0 on r8a7791 and r8a7790
* Enable TMU timer via DT on r8a7778
* Enable CMT timer via DT on r8a73a4
* Add MMP and {SR}GX clocks to r8a7791 and r8a7790
* Correct scifa2 clock index on r8a7740
* Add missing INTCA for irqpin on r8a7740
* tag 'renesas-dt-for-v3.19' of git://git.kernel.org/pub/scm/linux/kernel/git/horms/renesas: (34 commits)
ARM: shmobile: r8a7779 dtsi: Add SoC-specific SATA compatible property
ARM: shmobile: r8a7791: Reference DMA channels in MMCIF DT node
ARM: shmobile: r8a7790: Reference DMA channels in MMCIF DT nodes
ARM: shmobile: r8a7791: Add MMCIF0 DT node
ARM: shmobile: r8a7790: Rename mmcif node to mmc
ARM: shmobile: r8a7778: Add SoC-specific TMU compatible property
ARM: shmobile: r8a73a4: Add SoC-specific CMT compatible property
ARM: shmobile: henninger: enable HS-USB
ARM: shmobile: koelsch: enable HS-USB
ARM: shmobile: r8a7791: add HS-USB device node
ARM: shmobile: lager: enable HS-USB
ARM: shmobile: r8a7790: add HS-USB device node
ARM: shmobile: r8a7791: add USB3.0 device node
ARM: shmobile: lager: enable USB3.0
ARM: shmobile: r8a7790: add USB3.0 device node
ARM: shmobile: r8a7794: Add arch_timer to device tree
ARM: shmobile: bockw-reference: Initialise TMU device using DT
ARM: shmobile: r8a7778: Add TMU nodes
ARM: shmobile: armadillo800eva dts: Enable TMU0
ARM: shmobile: r8a7740 dtsi: Add TMU0 and TMU1 device nodes
...
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
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