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2012-03-14crypto: camellia - add assembler implementation for x86_64Jussi Kivilinna
Patch adds x86_64 assembler implementation of Camellia block cipher. Two set of functions are provided. First set is regular 'one-block at time' encrypt/decrypt functions. Second is 'two-block at time' functions that gain performance increase on out-of-order CPUs. Performance of 2-way functions should be equal to 1-way functions with in-order CPUs. Patch has been tested with tcrypt and automated filesystem tests. Tcrypt benchmark results: AMD Phenom II 1055T (fam:16, model:10): camellia-asm vs camellia_generic: 128bit key: (lrw:256bit) (xts:256bit) size ecb-enc ecb-dec cbc-enc cbc-dec ctr-enc ctr-dec lrw-enc lrw-dec xts-enc xts-dec 16B 1.27x 1.22x 1.30x 1.42x 1.30x 1.34x 1.19x 1.05x 1.23x 1.24x 64B 1.74x 1.79x 1.43x 1.87x 1.81x 1.87x 1.48x 1.38x 1.55x 1.62x 256B 1.90x 1.87x 1.43x 1.94x 1.94x 1.95x 1.63x 1.62x 1.67x 1.70x 1024B 1.96x 1.93x 1.43x 1.95x 1.98x 2.01x 1.67x 1.69x 1.74x 1.80x 8192B 1.96x 1.96x 1.39x 1.93x 2.01x 2.03x 1.72x 1.64x 1.71x 1.76x 256bit key: (lrw:384bit) (xts:512bit) size ecb-enc ecb-dec cbc-enc cbc-dec ctr-enc ctr-dec lrw-enc lrw-dec xts-enc xts-dec 16B 1.23x 1.23x 1.33x 1.39x 1.34x 1.38x 1.04x 1.18x 1.21x 1.29x 64B 1.72x 1.69x 1.42x 1.78x 1.81x 1.89x 1.57x 1.52x 1.56x 1.65x 256B 1.85x 1.88x 1.42x 1.86x 1.93x 1.96x 1.69x 1.65x 1.70x 1.75x 1024B 1.88x 1.86x 1.45x 1.95x 1.96x 1.95x 1.77x 1.71x 1.77x 1.78x 8192B 1.91x 1.86x 1.42x 1.91x 2.03x 1.98x 1.73x 1.71x 1.78x 1.76x camellia-asm vs aes-asm (8kB block): 128bit 256bit ecb-enc 1.15x 1.22x ecb-dec 1.16x 1.16x cbc-enc 0.85x 0.90x cbc-dec 1.20x 1.23x ctr-enc 1.28x 1.30x ctr-dec 1.27x 1.28x lrw-enc 1.12x 1.16x lrw-dec 1.08x 1.10x xts-enc 1.11x 1.15x xts-dec 1.14x 1.15x Intel Core2 T8100 (fam:6, model:23, step:6): camellia-asm vs camellia_generic: 128bit key: (lrw:256bit) (xts:256bit) size ecb-enc ecb-dec cbc-enc cbc-dec ctr-enc ctr-dec lrw-enc lrw-dec xts-enc xts-dec 16B 1.10x 1.12x 1.14x 1.16x 1.16x 1.15x 1.02x 1.02x 1.08x 1.08x 64B 1.61x 1.60x 1.17x 1.68x 1.67x 1.66x 1.43x 1.42x 1.44x 1.42x 256B 1.65x 1.73x 1.17x 1.77x 1.81x 1.80x 1.54x 1.53x 1.58x 1.54x 1024B 1.76x 1.74x 1.18x 1.80x 1.85x 1.85x 1.60x 1.59x 1.65x 1.60x 8192B 1.77x 1.75x 1.19x 1.81x 1.85x 1.86x 1.63x 1.61x 1.66x 1.62x 256bit key: (lrw:384bit) (xts:512bit) size ecb-enc ecb-dec cbc-enc cbc-dec ctr-enc ctr-dec lrw-enc lrw-dec xts-enc xts-dec 16B 1.10x 1.07x 1.13x 1.16x 1.11x 1.16x 1.03x 1.02x 1.08x 1.07x 64B 1.61x 1.62x 1.15x 1.66x 1.63x 1.68x 1.47x 1.46x 1.47x 1.44x 256B 1.71x 1.70x 1.16x 1.75x 1.69x 1.79x 1.58x 1.57x 1.59x 1.55x 1024B 1.78x 1.72x 1.17x 1.75x 1.80x 1.80x 1.63x 1.62x 1.65x 1.62x 8192B 1.76x 1.73x 1.17x 1.78x 1.80x 1.81x 1.64x 1.62x 1.68x 1.64x camellia-asm vs aes-asm (8kB block): 128bit 256bit ecb-enc 1.17x 1.21x ecb-dec 1.17x 1.20x cbc-enc 0.80x 0.82x cbc-dec 1.22x 1.24x ctr-enc 1.25x 1.26x ctr-dec 1.25x 1.26x lrw-enc 1.14x 1.18x lrw-dec 1.13x 1.17x xts-enc 1.14x 1.18x xts-dec 1.14x 1.17x Signed-off-by: Jussi Kivilinna <jussi.kivilinna@mbnet.fi> Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
2012-03-14crypto: camellia - rename camellia.c to camellia_generic.cJussi Kivilinna
Signed-off-by: Jussi Kivilinna <jussi.kivilinna@mbnet.fi> Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
2012-03-14crypto: camellia - fix checkpatch warningsJussi Kivilinna
Fix checkpatch warnings before renaming file. Signed-off-by: Jussi Kivilinna <jussi.kivilinna@mbnet.fi> Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
2012-03-14crypto: camellia - rename camellia module to camellia_genericJussi Kivilinna
Rename camellia module to camellia_generic to allow optimized assembler implementations to autoload with module-alias. Signed-off-by: Jussi Kivilinna <jussi.kivilinna@mbnet.fi> Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
2012-03-14crypto: tcrypt - add more camellia testsJussi Kivilinna
Add tests for CTR, LRW and XTS modes. Signed-off-by: Jussi Kivilinna <jussi.kivilinna@mbnet.fi> Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
2012-03-14crypto: testmgr - add more camellia test vectorsJussi Kivilinna
New ECB, CBC, CTR, LRW and XTS test vectors for camellia. Larger ECB/CBC test vectors needed for parallel 2-way camellia implementation. Signed-off-by: Jussi Kivilinna <jussi.kivilinna@mbnet.fi> Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
2012-03-14crypto: camellia - simplify key setup and CAMELLIA_ROUNDSM macroJussi Kivilinna
camellia_setup_tail() applies 'inverse of the last half of P-function' to subkeys, which is unneeded if keys are applied directly to yl/yr in CAMELLIA_ROUNDSM. Patch speeds up key setup and should speed up CAMELLIA_ROUNDSM as applying key to yl/yr early has less register dependencies. Quick tcrypt camellia results: x86_64, AMD Phenom II, ~5% faster x86_64, Intel Core 2, ~0.5% faster i386, Intel Atom N270, ~1% faster Signed-off-by: Jussi Kivilinna <jussi.kivilinna@mbnet.fi> Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
2012-03-14ARM: EXYNOS: add support for EXYNOS5250 SoCKukjin Kim
This patch add support for EXYNOS5250 SoC has two Cortex-A15 cores. Since actually, most codes in mach-exynos/ are used commonly for EXYNOS4 and EXYNOS5 the EXYNOS5/EXYNOS5250 has been implemented in mach-exynos/. Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
2012-03-14ARM: EXYNOS: add support uart for EXYNOS4 and EXYNOS5Kukjin Kim
Actually, the base address of uart is different between EXYNOS4 and EXYNOS5 and this patch enables to support uart for EXYNOS4 and EXYNOS5 SoCs at runtime. Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
2012-03-14ARM: EXYNOS: add initial setup-i2c0 for EXYNOS5Kukjin Kim
In all of Samsung platform, the setup-i2c0.c file for I2C channel 0 is always compiled. So when supporting new SoC,it should be updated for it. Since EXYNOS5 GPIO will be supported after this, there is no setup gpio in there now. It will be implemented with that, of course. Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
2012-03-14ARM: EXYNOS: add clock part for EXYNOS5250 SoCKukjin Kim
This patch adds clock-exynos5.c for EXYNOS5250 now and that can be used for other EXYNOS5 SoCs later. Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
2012-03-14ARM: EXYNOS: use exynos_init_uarts() instead of exynos4_init_uarts()Kukjin Kim
Since exynos4_init_uarts() can be used for EXYNOS5 SoCs, this patch changes the name of function to exynos_init_uarts(). Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
2012-03-14ARM: EXYNOS: to declare static for mach-exynos/common.cKukjin Kim
According to commit cc511b8d84d8 ("ARM: 7257/1: EXYNOS: introduce arch/arm/mach-exynos/common.[ch]"), we don't need to declare extern for exynos4_map_io(), exynos4_init_clocks(), exynos4_init_uarts(), and exynos_init(). And the exynos4210_register_clocks() and exynos4212_register_clocks depend on each SoC not ARCH_EXYNOS4. So this patch fixed above. Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
2012-03-14ARM: EXYNOS: Add clkdev lookup entry for lcd clockTushar Behera
The framebuffer driver needs the clock named 'lcd' as its bus clock but the equivalent clock on Exynos4 is named as 'fimd'. Hence, create a clkdev lookup entry with the name 'lcd' that references the 'fimd' clock. Signed-off-by: Tushar Behera <tushar.behera@linaro.org> Acked-by: Jingoo Han <jg1.han@samsung.com> Reviewed-by: Sylwester Nawrocki <s.nawrocki@samsung.com> [kgene.kim@samsung.com: rebased on top of latest samsung tree] Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
2012-03-14pxa/hx4700: Remove pcmcia platform_device structurePaul Parsons
The existing pcmcia platform_device structure is not used and is not needed by the pending hx4700 PCMCIA/CF support. So let's remove it. Signed-off-by: Paul Parsons <lost.distance@yahoo.com> Acked-by: Philipp Zabel <philipp.zabel@gmail.com> signed-off-by: Haojian Zhuang <haojian.zhuang@gmail.com>
2012-03-14x86/platform: Move APIC ID validity check into platform APIC codeDaniel J Blueman
Move APIC ID validity check into platform APIC code, so it can be overridden when needed. For NumaChip systems, always trust MADT, as it's constructed with high APIC IDs. Behaviour verifies on standard x86 systems and on NumaChip systems with this, and compile-tested with allyesconfig. Signed-off-by: Daniel J Blueman <daniel@numascale-asia.com> Reviewed-by: Steffen Persvold <sp@numascale.com> Cc: Yinghai Lu <yinghai@kernel.org> Cc: H. Peter Anvin <hpa@linux.intel.com> Cc: Suresh Siddha <suresh.b.siddha@intel.com> Link: http://lkml.kernel.org/r/1331709454-27966-1-git-send-email-daniel@numascale-asia.com Signed-off-by: Ingo Molnar <mingo@elte.hu>
2012-03-14Merge tag 'v3.3-rc7' into x86/platformIngo Molnar
Merge reason: Update to the almost-final v3.3 kernel. Signed-off-by: Ingo Molnar <mingo@elte.hu>
2012-03-14ARM: pxa/hx4700: Reduce sleep mode battery discharge by 35%Paul Parsons
Drive the two Bluetooth UART output GPIOs (GPIO43_BTUART_TXD, GPIO45_BTUART_RTS) LOW during sleep mode instead of HIGH. This reduces sleep mode battery discharge from approximately 46 mA to approximately 30 mA. Signed-off-by: Oliver Winker <oliver@oli1170.net> Signed-off-by: Paul Parsons <lost.distance@yahoo.com> Signed-off-by: Haojian Zhuang <haojian.zhuang@gmail.com>
2012-03-14ARM: pxa/hx4700: Remove unwanted request for GPIO105Paul Parsons
GPIO105 (nIR_ON) is requested twice: first in gpio_request_array(), then in pxa_irda_probe(). Consequently the second request fails with EBUSY: pxa2xx-ir: probe of pxa2xx-ir failed with error -16 This patch removes the first request, allowing pxa_irda_probe() to succeed. Signed-off-by: Paul Parsons <lost.distance@yahoo.com> Signed-off-by: Haojian Zhuang <haojian.zhuang@gmail.com>
2012-03-14ixgbe: dcb: use DCB config values for FCoE traffic class on openJohn Fastabend
Disabling and enabling DCB can cause FCoE hardware initialization to occur on the incorrect traffic class when the up2tc mapping has not yet been reconfigured. Fix this by using the DCB configuration maps that are correct and will be pushed at mqprio after DCB driver setup completes successfully. Signed-off-by: John Fastabend <john.r.fastabend@intel.com> Tested-by: Marcus Dennis <marcusx.e.dennis@intel.com> Signed-off-by: Jeff Kirsher <jeffrey.t.kirsher@intel.com>
2012-03-14ixgbe: Fix race condition where RX buffer could become corrupted.Atita Shirwaikar
There was a race condition in the reset path where the RX buffer could become corrupted during Fdir configuration.This is due to a HW bug.The fix right now is to lock the buffer while we do the fdir configuration.Since we were using similar workaround for another bug, I moved the existing code to a function and reused it.HW team also recommended that IXGBE_MAX_SECRX_POLL value be changed from 30 to 40.The erratum for this bug will be published in the next release 82599 Spec Update Signed-off-by: Atita Shirwaikar <atita.shirwaikar@intel.com> Acked-by: Peter P Waskiewicz Jr <peter.p.waskiewicz.jr@intel.com> Tested-by: Stephen Ko <stephen.s.ko@intel.com> Signed-off-by: Jeff Kirsher <jeffrey.t.kirsher@intel.com>
2012-03-14ixgbe: use typed min/max functions where possibleJesse Brandeburg
using the form min((int)var, ver)) is replaced by min_t(int, ...) Signed-off-by: Jesse Brandeburg <jesse.brandeburg@intel.com> Tested-by: Stephen Ko <stephen.s.ko@intel.com> Signed-off-by: Jeff Kirsher <jeffrey.t.kirsher@intel.com>
2012-03-14ixgbe: fix obvious return value bug.Don Skidmore
This is clearly a typeo where we are not checking the return value from get_link_capabilities but should. This patch corrects that. Signed-off-by: Don Skidmore <donald.c.skidmore@intel.com> Tested-by: Stephen Ko <stephen.s.ko@intel.com> Signed-off-by: Jeff Kirsher <jeffrey.t.kirsher@intel.com>
2012-03-14ixgbe: Replace eitr_low and eitr_high with static values in ixgbe_update_itrAlexander Duyck
There isn't much point in using variables to store the values of eitr_low and eitr_high since they are not user changeable. As such I am replacing them with the constants 10 and 20 in order to avoid any confusion on what the values actually are. Signed-off-by: Alexander Duyck <alexander.h.duyck@intel.com> Tested-by: Stephen Ko <stephen.s.ko@intel.com> Signed-off-by: Jeff Kirsher <jeffrey.t.kirsher@intel.com>
2012-03-14ixgbe: Do not disable read relaxed ordering when DCA is enabledAlexander Duyck
A previous fix had gone though and disabled relaxed ordering for Rx descriptor read fetching. This was not necessary as this functions correctly and has no ill effects on the system. In addition several of the defines used for the DCA control registers were incorrect in that they indicated descriptor effects when they actually had an impact on either data or header write back. As such I have update these to correctly reflect either DATA or HEAD. Signed-off-by: Alexander Duyck <alexander.h.duyck@intel.com> Tested-by: Stephen Ko <stephen.s.ko@intel.com> Signed-off-by: Jeff Kirsher <jeffrey.t.kirsher@intel.com>
2012-03-14ixgb: Remove unnecessary defines, use pr_debugJoe Perches
Use the current logging styles. Remove unnecessary _DEBUG_DRIVER_ and PFX, use pr_debug. Coalesce format. Signed-off-by: Joe Perches <joe@perches.com> Tested-by: Jeff Pieper <jeffrey.e.pieper@intel.com> Signed-off-by: Jeff Kirsher <jeffrey.t.kirsher@intel.com>
2012-03-14ALSA: hda - Fix build of patch_sigmatel.c without CONFIG_SND_HDA_POWER_SAVETakashi Iwai
Now the mute-LED is controlled without powersave hack, and the ifdefs must be removed. Signed-off-by: Takashi Iwai <tiwai@suse.de>
2012-03-14Merge tag 'mce-for-tip' of ↵Ingo Molnar
git://git.kernel.org/pub/scm/linux/kernel/git/ras/ras into x86/mce Apply two miscellaneous MCE fixes. Signed-off-by: Ingo Molnar <mingo@elte.hu>
2012-03-14Merge tag 'v3.3-rc7' into x86/mceIngo Molnar
Merge reason: Update from an ancient -rc1 base to an almost-final stable kernel. Signed-off-by: Ingo Molnar <mingo@elte.hu>
2012-03-13iscsi-target: Fix reservation conflict -EBUSY response handling bugNicholas Bellinger
This patch addresses a iscsi-target specific bug related to reservation conflict handling in iscsit_handle_scsi_cmd() that has been causing reservation conflicts to complete and not fail as expected due to incorrect errno checking. The problem occured with the change to return -EBUSY from transport_generic_cmd_sequencer() -> transport_generic_allocate_tasks() failures, that broke iscsit_handle_scsi_cmd() checking for -EINVAL in order to invoke a non GOOD status response. This was manifesting itself as data corruption with legacy SPC-2 reservations, but also effects iscsi-target LUNs with SPC-3 persistent reservations. This bug was originally introduced in lio-core commit: commit 03e98c9eb916f3f0868c1dc344dde2a60287ff72 Author: Nicholas Bellinger <nab@linux-iscsi.org> Date: Fri Nov 4 02:36:16 2011 -0700 target: Address legacy PYX_TRANSPORT_* return code breakage Reported-by: Martin Svec <martin.svec@zoner.cz> Cc: Martin Svec <martin.svec@zoner.cz> Cc: Christoph Hellwig <hch@lst.de> Cc: stable@vger.kernel.org Signed-off-by: Nicholas Bellinger <nab@linux-iscsi.org>
2012-03-13target: Fix compatible reservation handling (CRH=1) with legacy RESERVE/RELEASENicholas Bellinger
This patch addresses a bug with target_check_scsi2_reservation_conflict() return checking in target_scsi2_reservation_[reserve,release]() that was preventing CRH=1 operation from silently succeeding in the two special cases defined by SPC-3, and not failing with reservation conflict status when dealing with legacy RESERVE/RELEASE + active SPC-3 PR logic. Also explictly set cmd->scsi_status = SAM_STAT_RESERVATION_CONFLICT during the early non reservation holder failure from pr_ops->t10_seq_non_holder() check in transport_generic_cmd_sequencer() for fabrics that already expect it to be set. This bug was originally introduced in mainline commit: commit eacac00ce5bfde8086cd0615fb53c986f7f970fe Author: Christoph Hellwig <hch@infradead.org> Date: Thu Nov 3 17:50:40 2011 -0400 target: split core_scsi2_emulate_crh Reported-by: Martin Svec <martin.svec@zoner.cz> Cc: Martin Svec <martin.svec@zoner.cz> Cc: Christoph Hellwig <hch@lst.de> Cc: stable@vger.kernel.org Signed-off-by: Nicholas Bellinger <nab@linux-iscsi.org>
2012-03-13Input: tegra-kbc - revise device tree supportOlof Johansson
This is an incremental patch updating to the revised bindings for matrix keyboards. This includes an optional "linux,fn-keymap" binding that is not yet implemented, that will be used to specify the Fn-key modifier layout if needed. Signed-off-by: Olof Johansson <olof@lixom.net> Acked-by: Grant Likely <grant.likely@secretlab.ca> Acked-by: Stephen Warren <swarren@nvidia.com> Signed-off-by: Dmitry Torokhov <dtor@mail.ru>
2012-03-13Input: of_keymap - add device tree bindings for simple key matricesOlof Johansson
This adds a simple device tree binding for simple key matrix data and a helper to fill in the platform data. Signed-off-by: Olof Johansson <olof@lixom.net> Acked-by: Stephen Warren <swarren@nvidia.com> Signed-off-by: Dmitry Torokhov <dtor@mail.ru>
2012-03-13pnfs-obj: Uglify objio_segment allocation for the sake of the principle :-(Boaz Harrosh
At some past instance Linus Trovalds wrote: > From: Linus Torvalds <torvalds@linux-foundation.org> > commit a84a79e4d369a73c0130b5858199e949432da4c6 upstream. > > The size is always valid, but variable-length arrays generate worse code > for no good reason (unless the function happens to be inlined and the > compiler sees the length for the simple constant it is). > > Also, there seems to be some code generation problem on POWER, where > Henrik Bakken reports that register r28 can get corrupted under some > subtle circumstances (interrupt happening at the wrong time?). That all > indicates some seriously broken compiler issues, but since variable > length arrays are bad regardless, there's little point in trying to > chase it down. > > "Just don't do that, then". Since then any use of "variable length arrays" has become blasphemous. Even in perfectly good, beautiful, perfectly safe code like the one below where the variable length arrays are only used as a sizeof() parameter, for type-safe dynamic structure allocations. GCC is not executing any stack allocation code. I have produced a small file which defines two functions main1(unsigned numdevs) and main2(unsigned numdevs). main1 uses code as before with call to malloc and main2 uses code as of after this patch. I compiled it as: gcc -O2 -S see_asm.c and here is what I get: <see_asm.s> main1: .LFB7: .cfi_startproc mov %edi, %edi leaq 4(%rdi,%rdi), %rdi salq $3, %rdi jmp malloc .cfi_endproc .LFE7: .size main1, .-main1 .p2align 4,,15 .globl main2 .type main2, @function main2: .LFB8: .cfi_startproc mov %edi, %edi addq $2, %rdi salq $4, %rdi jmp malloc .cfi_endproc .LFE8: .size main2, .-main2 .section .text.startup,"ax",@progbits .p2align 4,,15 </see_asm.s> *Exact* same code !!! So please seriously consider not accepting this patch and leave the perfectly good code intact. CC: Linus Torvalds <torvalds@linux-foundation.org> Signed-off-by: Boaz Harrosh <bharrosh@panasas.com> Signed-off-by: Trond Myklebust <Trond.Myklebust@netapp.com>
2012-03-13jbd2: cleanup journal tail after transaction commitJan Kara
Normally, we have to issue a cache flush before we can update journal tail in journal superblock, effectively wiping out old transactions from the journal. So use the fact that during transaction commit we issue cache flush anyway and opportunistically push journal tail as far as we can. Since update of journal superblock is still costly (we have to use WRITE_FUA), we update log tail only if we can free significant amount of space. Signed-off-by: Jan Kara <jack@suse.cz> Signed-off-by: "Theodore Ts'o" <tytso@mit.edu>
2012-03-13jbd2: remove bh_state lock from checkpointing codeJan Kara
All accesses to checkpointing entries in journal_head are protected by j_list_lock. Thus __jbd2_journal_remove_checkpoint() doesn't really need bh_state lock. Also the only part of journal head that the rest of checkpointing code needs to check is jh->b_transaction which is safe to read under j_list_lock. So we can safely remove bh_state lock from all of checkpointing code which makes it considerably prettier. Signed-off-by: Jan Kara <jack@suse.cz> Signed-off-by: "Theodore Ts'o" <tytso@mit.edu>
2012-03-13jbd2: remove always true condition in __journal_try_to_free_buffer()Jan Kara
The check b_jlist == BJ_None in __journal_try_to_free_buffer() is always true (__jbd2_journal_temp_unlink_buffer() also checks this in an assertion) so just remove it. Signed-off-by: Jan Kara <jack@suse.cz> Signed-off-by: "Theodore Ts'o" <tytso@mit.edu>
2012-03-13jbd2: declare __jbd2_journal_temp_unlink_buffer() staticJan Kara
Signed-off-by: Jan Kara <jack@suse.cz> Signed-off-by: "Theodore Ts'o" <tytso@mit.edu>
2012-03-13jbd2: fix BH_JWrite setting in checkpointing codeJan Kara
BH_JWrite bit should be set when buffer is written to the journal. So checkpointing shouldn't set this bit when writing out buffer. This didn't cause any observable bug since BH_JWrite bit is used only for debugging purposes but it's good to have this consistent. Signed-off-by: Jan Kara <jack@suse.cz> Signed-off-by: "Theodore Ts'o" <tytso@mit.edu>
2012-03-13jbd2: issue cache flush after checkpointing even with internal journalJan Kara
When we reach jbd2_cleanup_journal_tail(), there is no guarantee that checkpointed buffers are on a stable storage - especially if buffers were written out by jbd2_log_do_checkpoint(), they are likely to be only in disk's caches. Thus when we update journal superblock effectively removing old transaction from journal, this write of superblock can get to stable storage before those checkpointed buffers which can result in filesystem corruption after a crash. Thus we must unconditionally issue a cache flush before we update journal superblock in these cases. A similar problem can also occur if journal superblock is written only in disk's caches, other transaction starts reusing space of the transaction cleaned from the log and power failure happens. Subsequent journal replay would still try to replay the old transaction but some of it's blocks may be already overwritten by the new transaction. For this reason we must use WRITE_FUA when updating log tail and we must first write new log tail to disk and update in-memory information only after that. Signed-off-by: Jan Kara <jack@suse.cz> Signed-off-by: "Theodore Ts'o" <tytso@mit.edu>
2012-03-13Merge git://git.kernel.org/pub/scm/linux/kernel/git/davem/sparcLinus Torvalds
Pull sparc updates from David Miller: "Please pull to get this fix for the sparc32 build when using a more recent binutils." * git://git.kernel.org/pub/scm/linux/kernel/git/davem/sparc: sparc32: Add -Av8 to assembler command line.
2012-03-13sparc32: Add -Av8 to assembler command line.David S. Miller
Newer version of binutils are more strict about specifying the correct options to enable certain classes of instructions. The sparc32 build is done for v7 in order to support sun4c systems which lack hardware integer multiply and divide instructions. So we have to pass -Av8 when building the assembler routines that use these instructions and get patched into the kernel when we find out that we have a v8 capable cpu. Reported-by: Paul Gortmaker <paul.gortmaker@windriver.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2012-03-13Merge git://git.kernel.org/pub/scm/linux/kernel/git/davem/netLinus Torvalds
Pull networking changes from David Miller: "The most important bit here is the TCP syncookies issue, which seems to have been busted for some time. That fix has been verified in production by the reporter. 1) Persistent TUN devices erroneously hold on to the network namespace in such a way that it cannot be shutdown. Fix from Stanislav Kinsbursky with help from Eric Dumazet. 2) TCP SYN cookies have been broken for a while due to how the route lookup flow key is managed, connections can be delayed by as much as 20 seconds due to this bug. Fix from Eric Dumazet. 3) Missing jiffies.h include in lib/dynamic_queue_limits.c can break the build, from Tom Herbert. 4) Add USB device ID for Sitecom LN-031, from Joerg Neikes. 5) Fix OOPS in delayed workqueue in iwlegacy, from Stanislaw Gruszka. 6) rt2x00 TX queue can be disabled forever due to races, fix by synchronizing pause/unpause with a lock. Also from Stanislaw Gruszka. 7) Statistics and endian fix in bnx2x driver from Yuval Mintz, Eilon Greenstein, and Ariel Elior." * git://git.kernel.org/pub/scm/linux/kernel/git/davem/net: tun: don't hold network namespace by tun sockets bnx2x: FCoE statistics id fixed bnx2x: dcb bit indices flags used as bits bnx2x: added cpu_to_le16 when preparing ramrod's data bnx2x: pfc statistics counts pfc events twice rt2x00: fix random stalls iwl3945: fix possible il->txq NULL pointer dereference in delayed works dql: Fix undefined jiffies tcp: fix syncookie regression usb: asix: Patch for Sitecom LN-031
2012-03-14ep93xx: Remove unnecessary includes of ep93xx-regs.hRyan Mallon
Remove the include of ep93xx-regs.h from files which no longer need it, notably include/mach/hardware.h. Signed-off-by: Ryan Mallon <rmallon@gmail.com> Reviewed-by: Mika Westerberg <mika.westerberg@iki.fi> Acked-by: Hartley Sweeten <hsweeten@visionengravers.com>
2012-03-14ep93xx: Move EP93XX_SYSCON defines to SoC private headerRyan Mallon
The EP93XX_SYSCON defines are now no longer needed outside of the EP93xx SoC core code, so they can be moved to a private header. Signed-off-by: Ryan Mallon <rmallon@gmail.com> Reviewed-by: Mika Westerberg <mika.westerberg@iki.fi> Acked-by: Hartley Sweeten <hsweeten@visionengravers.com>
2012-03-14ep93xx: Move crunch code to mach-ep93xx directoryRyan Mallon
The crunch code in arch/arm/kernel is specific to the EP93xx. Move it to the mach-ep93xx directory. This removes the need for the EP93XX_SYSCON defines to be exported to arch/arm/kernel. Signed-off-by: Ryan Mallon <rmallon@gmail.com> Cc: Russell King <linux@arm.linux.org.uk> Reviewed-by: Mika Westerberg <mika.westerberg@iki.fi> Acked-by: Hartley Sweeten <hsweeten@visionengravers.com>
2012-03-14ep93xx: Make syscon access functions private to SoCRyan Mallon
The syscon access functions are no longer used outside of the core EP93xx code. Move their definitions into the SoC code. Signed-off-by: Ryan Mallon <rmallon@gmail.com> Reviewed-by: Mika Westerberg <mika.westerberg@iki.fi> Acked-by: Hartley Sweeten <hsweeten@visionengravers.com>
2012-03-14ep93xx: Configure GPIO ports in core codeRyan Mallon
Move the pinmux setting of the EP93xx GPIOs to the core code. This removes the need for the GPIO driver to have access to the system controller registers. Signed-off-by: Ryan Mallon <rmallon@gmail.com> Cc: Grant Likely <grant.likely@secretlab.ca> Reviewed-by: Mika Westerberg <mika.westerberg@iki.fi> Acked-by: Hartley Sweeten <hsweeten@visionengravers.com>
2012-03-14ep93xx: Move peripheral defines to local SoC headerRyan Mallon
Move the AHB/APB peripheral defines to local SoC header since they are only needed by the core SoC code. The UART defines are not moved because they are used by the mach/uncompress.h header. Signed-off-by: Ryan Mallon <rmallon@gmail.com> Reviewed-by: Mika Westerberg <mika.westerberg@iki.fi> Acked-by: Hartley Sweeten <hsweeten@visionengravers.com> Acked-by: Arnd Bergmann <arnd@arndb.de>
2012-03-14ep93xx: Convert the watchdog driver into a platform device.H Hartley Sweeten
Convert the ep93xx watchdog driver into a platform device and remove it's dependency on <mach/hardware.h>. Signed-off-by: H Hartley Sweeten <hsweeten@visionengravers.com> Signed-off-by: Ryan Mallon <rmallon@gmail.com> Signed-off-by: Wim Van Sebroeck <wim@iguana.be> Reviewed-by: Mika Westerberg <mika.westerberg@iki.fi> Acked-by: Arnd Bergmann <arnd@arndb.de>
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