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2015-11-02sh_eth: fix uninitialized arrays in sh_eth_ring_init()Sergei Shtylyov
sh_eth_ring_free() called in the sh_eth_ring_init()'s error path expects the arrays pointed to by 'sh_eth_private::[rt]x_skbuff' to be initialized with NULLs but they are allocated with just kmalloc_array() and so are left filled with random data. Use kcalloc() instead. Signed-off-by: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2015-11-02mtd: nand: sunxi: avoid retrieving data before ECC passBoris BREZILLON
The in-band data are copied twice: before ECC correction and after the ECC engine has fixed all the fixable bitflips. Drop the useless memcpy_fromio operation by passing a NULL pointer when calling sunxi_nfc_read_buf(). Signed-off-by: Boris Brezillon <boris.brezillon@free-electrons.com> Signed-off-by: Brian Norris <computersforpeace@gmail.com>
2015-11-02mtd: nand: sunxi: fix sunxi_nfc_hw_ecc_read/write_chunk()Boris BREZILLON
The sunxi_nfc_hw_ecc_read/write_chunk() functions try to avoid changing the column address if unnecessary, but the logic to determine whether it's necessary or not is currently wrong: it adds the ecc->bytes value to the current offset where it should actually add ecc->size. Fixes: 913821bdd211 ("mtd: nand: sunxi: introduce sunxi_nfc_hw_ecc_read/write_chunk()") Signed-off-by: Boris Brezillon <boris.brezillon@free-electrons.com> Signed-off-by: Brian Norris <computersforpeace@gmail.com>
2015-11-02net: dsa: mv88e6xxx: lookup switch nameVivien Didelot
All the mv88e6xxx drivers use the exact same code in their probe function to lookup the switch name given its ID. Thus introduce a mv88e6xxx_switch_id structure and a mv88e6xxx_lookup_name function in the common mv88e6xxx code. In the meantime make __mv88e6xxx_reg_{read,write} static since we do not need to expose these low-level r/w routines anymore. Signed-off-by: Vivien Didelot <vivien.didelot@savoirfairelinux.com> Acked-by: Andrew Lunn <andrew@lunn.ch> Signed-off-by: David S. Miller <davem@davemloft.net>
2015-11-02net: dsa: mv88e6xxx: assert SMI lockVivien Didelot
It's easy to forget to lock the smi_mutex before calling the low-level _mv88e6xxx_reg_{read,write}, so add a assert_smi_lock function in them. Signed-off-by: Vivien Didelot <vivien.didelot@savoirfairelinux.com> Acked-by: Andrew Lunn <andrew@lunn.ch> Signed-off-by: David S. Miller <davem@davemloft.net>
2015-11-02PCI: designware: Make "clocks" and "clock-names" optional DT propertiesBhupesh Sharma
Move the clock-related properties in the DesignWare PCIe controller bindings to 'optional' set of properties. [bhelgaas: move to separate patch] Signed-off-by: Bhupesh Sharma <bhupesh.sharma@freescale.com> Signed-off-by: Bjorn Helgaas <bhelgaas@google.com> Acked-by: Arnd Bergmann <arnd@arndb.de>
2015-11-02PCI: designware: Make driver arch-agnosticZhou Wang
Previously, dw_pcie_host_init() created the PCI host bridge with pci_common_init_dev(), an ARM-specific function that supplies the ARM- specific pci_sys_data structure as the PCI "sysdata". Make pcie-designware.c arch-agnostic by reimplementing the functionality of pci_common_init_dev() directly in dw_pcie_host_init(). Note that this changes the bridge sysdata from the ARM pci_sys_data to the DesignWare pcie_port structure. This doesn't affect the ARM sysdata users because they are all specific to non-DesignWare host bridges, which will still have pci_sys_data. [bhelgaas: changelog] Tested-by: James Morse <james.morse@arm.com> Tested-by: Gabriel Fernandez <gabriel.fernandez@st.com> Tested-by: Minghuan Lian <Minghuan.Lian@freescale.com> Signed-off-by: Zhou Wang <wangzhou1@hisilicon.com> Signed-off-by: Gabriele Paoloni <gabriele.paoloni@huawei.com> Signed-off-by: Arnd Bergmann <arnd@arndb.de> Signed-off-by: Bjorn Helgaas <bhelgaas@google.com> Acked-by: Pratyush Anand <pratyush.anand@gmail.com>
2015-11-02ARM/PCI: Replace pci_sys_data->align_resource with global function pointerGabriele Paoloni
dw_pcie_host_init() creates the PCI host bridge with pci_common_init_dev(), an ARM-specific function that supplies the ARM-specific pci_sys_data structure as the PCI "sysdata". To use dw_pcie_host_init() on other architectures, we will copy the internals of pci_common_init_dev() into pcie-designware.c instead of calling it, and dw_pcie_host_init() will supply the DesignWare pcie_port structure as "sysdata". Most ARM "sysdata" users are specific to non-DesignWare host bridges; they'll be unaffected because those bridges will continue to have the ARM pci_sys_data. Most of the rest are ARM-generic functions called by pci_common_init_dev(); these will be unaffected because dw_pcie_host_init() will no longer call pci_common_init(). But the ARM pcibios_align_resource() can be called by the PCI core for any bridge, so it can't depend on sysdata since it may be either pci_sys_data or pcie_port. Remove the pcibios_align_resource() dependency on sysdata by replacing the pci_sys_data->align_resource pointer with a global function pointer. This is less general (we can no longer have per-host bridge align_resource() methods), but the pci_sys_data->align_resource pointer was used only by Marvell (see mvebu_pcie_enable()), so this would only be a problem if we had a system with a combination of Marvell and other host bridges [bhelgaas: changelog] Signed-off-by: Gabriele Paoloni <gabriele.paoloni@huawei.com> Signed-off-by: Zhou Wang <wangzhou1@hisilicon.com> Signed-off-by: Bjorn Helgaas <bhelgaas@google.com> Acked-by: Pratyush Anand <pratyush.anand@gmail.com>
2015-11-02PCI: designware: Use of_pci_get_host_bridge_resources() to parse DTZhou Wang
Use the new of_pci_get_host_bridge_resources() API in place of the PCI OF DT parser. [bhelgaas: changelog] Tested-by: James Morse <james.morse@arm.com> Tested-by: Gabriel Fernandez <gabriel.fernandez@st.com> Tested-by: Minghuan Lian <Minghuan.Lian@freescale.com> Signed-off-by: Zhou Wang <wangzhou1@hisilicon.com> Signed-off-by: Gabriele Paoloni <gabriele.paoloni@huawei.com> Signed-off-by: Bjorn Helgaas <bhelgaas@google.com> Acked-by: Pratyush Anand <pratyush.anand@gmail.com>
2015-11-02Revert "PCI: designware: Program ATU with untranslated address"Zhou Wang
Revert f4c55c5a3f7f ("PCI: designware: Program ATU with untranslated address"). Note that dra7xx_pcie_host_init() now modifies pp->io_base, but we still need the original value for dw_pcie_setup() in the path below, so this adds a new io_base_tmp member. It will be removed later when dw_pcie_setup() is removed. dra7xx_add_pcie_port dw_pcie_host_init pp->io_base = range.cpu_addr pp->io_base_tmp = range.cpu_addr # <-- added pp->ops->host_init dra7xx_pcie_host_init # ops->host_init pp->io_base &= DRA7XX_CPU_TO_BUS_ADDR # <-- modified pci_common_init_dev(..., &dw_pci) pcibios_init_hw hw->setup dw_pcie_setup # hw_pci.setup pci_ioremap_io(..., pp->io_base_tmp) # <-- original addr required [bhelgaas: changelog] Tested-by: James Morse <james.morse@arm.com> Tested-by: Gabriel Fernandez <gabriel.fernandez@st.com> Tested-by: Minghuan Lian <Minghuan.Lian@freescale.com> Signed-off-by: Zhou Wang <wangzhou1@hisilicon.com> Signed-off-by: Gabriele Paoloni <gabriele.paoloni@huawei.com> Signed-off-by: Arnd Bergmann <arnd@arndb.de> Signed-off-by: Bjorn Helgaas <bhelgaas@google.com> Acked-by: Pratyush Anand <pratyush.anand@gmail.com>
2015-11-02PCI: designware: Move calculation of bus addresses to DRA7xxGabriele Paoloni
Commit f4c55c5a3f7f ("PCI: designware: Program ATU with untranslated address") added the calculation of PCI bus addresses in pcie-designware.c, storing them in new fields added in struct pcie_port. This calculation is done for every DesignWare user even though it only applies to DRA7xx. Move the calculation of the bus addresses to the DRA7xx driver to allow the rework of DesignWare to use the new DT parsing API. Signed-off-by: Gabriele Paoloni <gabriele.paoloni@huawei.com> Signed-off-by: Zhou Wang <wangzhou1@hisilicon.com> Signed-off-by: Bjorn Helgaas <bhelgaas@google.com> Acked-by: Pratyush Anand <pratyush.anand@gmail.com>
2015-11-02PCI: designware: Make "num-lanes" an optional DT propertyGabriele Paoloni
Currently "num-lanes" is read in dw_pcie_host_init(), but it is only used if we call dw_pcie_setup_rc() while bringing up the link. If the link has already been brought up by firmware, we need not call dw_pcie_setup_rc(), and "num-lanes" is unnecessary. Only complain about "num-lanes" if we actually need it and we didn't find a valid value. [bhelgaas: changelog] Signed-off-by: Gabriele Paoloni <gabriele.paoloni@huawei.com> Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
2015-11-02PCI: designware: Require config accesses to be naturally alignedGabriele Paoloni
Add sanity checks on "addr" input parameter in dw_pcie_cfg_read() and dw_pcie_cfg_write(). These checks make sure that accesses are aligned on their size, e.g., a 4-byte config access is aligned on a 4-byte boundary. [bhelgaas: changelog, set *val = 0 in failure case] Signed-off-by: Gabriele Paoloni <gabriele.paoloni@huawei.com> Signed-off-by: Bjorn Helgaas <bhelgaas@google.com> Acked-by: Pratyush Anand <pratyush.anand@gmail.com>
2015-11-02PCI: designware: Simplify dw_pcie_cfg_read/write() interfacesGabriele Paoloni
Callers of dw_pcie_cfg_read() and dw_pcie_cfg_write() previously had to split the address into "addr" and "where". The callees assumed "addr" was 32-bit aligned (with zeros in the low two bits) and they used only the low two bits of "where". Accept the entire address in "addr" and drop the now-redundant "where" argument. As an example, this replaces this: int dw_pcie_cfg_read(void __iomem *addr, int where, int size, u32 *val) *val = readb(addr + (where & 1)); with this: int dw_pcie_cfg_read(void __iomem *addr, int size, u32 *val) *val = readb(addr): [bhelgaas: changelog, split access size change to separate patch] Signed-off-by: Gabriele Paoloni <gabriele.paoloni@huawei.com> Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
2015-11-02PCI: designware: Use exact access size in dw_pcie_cfg_read()Gabriele Paoloni
dw_pcie_cfg_write() uses the exact 8-, 16-, or 32-bit access size requested, but dw_pcie_cfg_read() previously performed a 32-bit read and masked out the bits requested. Use the exact access size in dw_pcie_cfg_read(). For example, if we want an 8-bit read, use readb() instead of using readl() and masking out the 8 bits we need. This makes it symmetric with dw_pcie_cfg_write(). [bhelgaas: split into separate patch, set *val = 0 in failure case] Signed-off-by: Gabriele Paoloni <gabriele.paoloni@huawei.com> Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
2015-11-02PCI: spear: Fix dw_pcie_cfg_read/write() usageGabriele Paoloni
The first argument of dw_pcie_cfg_read/write() is a 32-bit aligned address. The second argument is the byte offset into a 32-bit word, and dw_pcie_cfg_read/write() only look at the low two bits. SPEAr13xx used dw_pcie_cfg_read() and dw_pcie_cfg_write() incorrectly: it passed important address bits in the second argument, where they were ignored. Pass the complete 32-bit word address in the first argument and only the 2-bit offset into that word in the second argument. Without this fix, SPEAr13xx host will never work with few buggy gen1 card which connects with only gen1 host and also with any endpoint which would generate a read request of more than 128 bytes. [bhelgaas: changelog] Reported-by: Bjorn Helgaas <bhelgaas@google.com> Signed-off-by: Pratyush Anand <panand@redhat.com> Signed-off-by: Bjorn Helgaas <bhelgaas@google.com> CC: stable@vger.kernel.org # v3.17+
2015-11-02PCI: designware: Set up high part of MSI target addressLucas Stach
Set up the high part of the MSI target address to allow the MSI target to be above 4GB on 64bit and PAE systems. [bhelgaas: changelog] Signed-off-by: Lucas Stach <l.stach@pengutronix.de> Signed-off-by: Bjorn Helgaas <bhelgaas@google.com> Acked-by: Pratyush Anand <pratyush.anand@gmail.com>
2015-11-02bpf: convert hashtab lock to raw lockYang Shi
When running bpf samples on rt kernel, it reports the below warning: BUG: sleeping function called from invalid context at kernel/locking/rtmutex.c:917 in_atomic(): 1, irqs_disabled(): 128, pid: 477, name: ping Preemption disabled at:[<ffff80000017db58>] kprobe_perf_func+0x30/0x228 CPU: 3 PID: 477 Comm: ping Not tainted 4.1.10-rt8 #4 Hardware name: Freescale Layerscape 2085a RDB Board (DT) Call trace: [<ffff80000008a5b0>] dump_backtrace+0x0/0x128 [<ffff80000008a6f8>] show_stack+0x20/0x30 [<ffff8000007da90c>] dump_stack+0x7c/0xa0 [<ffff8000000e4830>] ___might_sleep+0x188/0x1a0 [<ffff8000007e2200>] rt_spin_lock+0x28/0x40 [<ffff80000018bf9c>] htab_map_update_elem+0x124/0x320 [<ffff80000018c718>] bpf_map_update_elem+0x40/0x58 [<ffff800000187658>] __bpf_prog_run+0xd48/0x1640 [<ffff80000017ca6c>] trace_call_bpf+0x8c/0x100 [<ffff80000017db58>] kprobe_perf_func+0x30/0x228 [<ffff80000017dd84>] kprobe_dispatcher+0x34/0x58 [<ffff8000007e399c>] kprobe_handler+0x114/0x250 [<ffff8000007e3bf4>] kprobe_breakpoint_handler+0x1c/0x30 [<ffff800000085b80>] brk_handler+0x88/0x98 [<ffff8000000822f0>] do_debug_exception+0x50/0xb8 Exception stack(0xffff808349687460 to 0xffff808349687580) 7460: 4ca2b600 ffff8083 4a3a7000 ffff8083 49687620 ffff8083 0069c5f8 ffff8000 7480: 00000001 00000000 007e0628 ffff8000 496874b0 ffff8083 007e1de8 ffff8000 74a0: 496874d0 ffff8083 0008e04c ffff8000 00000001 00000000 4ca2b600 ffff8083 74c0: 00ba2e80 ffff8000 49687528 ffff8083 49687510 ffff8083 000e5c70 ffff8000 74e0: 00c22348 ffff8000 00000000 ffff8083 49687510 ffff8083 000e5c74 ffff8000 7500: 4ca2b600 ffff8083 49401800 ffff8083 00000001 00000000 00000000 00000000 7520: 496874d0 ffff8083 00000000 00000000 00000000 00000000 00000000 00000000 7540: 2f2e2d2c 33323130 00000000 00000000 4c944500 ffff8083 00000000 00000000 7560: 00000000 00000000 008751e0 ffff8000 00000001 00000000 124e2d1d 00107b77 Convert hashtab lock to raw lock to avoid such warning. Signed-off-by: Yang Shi <yang.shi@linaro.org> Acked-by: Daniel Borkmann <daniel@iogearbox.net> Signed-off-by: David S. Miller <davem@davemloft.net>
2015-11-02Merge branch 'bridge_vlan_fixes'David S. Miller
Nikolay Aleksandrov says: ==================== bridge: vlan: failure path and comment fixes This is a set from Ido which takes care of one failure path error in nbp_vlan_init (patch 1) and a few comment errors (patch 2). I must admit I didn't expect the port init continues after a vlan init failure but should've checked to make sure. Thanks to Ido for catching these! ==================== Signed-off-by: David S. Miller <davem@davemloft.net>
2015-11-02bridge: vlan: Use correct flag name in commentIdo Schimmel
The flag used to indicate if a VLAN should be used for filtering - as opposed to context only - on the bridge itself (e.g. br0) is called 'brentry' and not 'brvlan'. Signed-off-by: Ido Schimmel <idosch@mellanox.com> Acked-by: Nikolay Aleksandrov <nikolay@cumulusnetworks.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2015-11-02bridge: vlan: Prevent possible use-after-freeIdo Schimmel
When adding a port to a bridge we initialize VLAN filtering on it. We do not bail out in case an error occurred in nbp_vlan_init, as it can be used as a non VLAN filtering bridge. However, if VLAN filtering is required and an error occurred in nbp_vlan_init, we should set vlgrp to NULL, so that VLAN filtering functions (e.g. br_vlan_find, br_get_pvid) will know the struct is invalid and will not try to access it. Signed-off-by: Ido Schimmel <idosch@mellanox.com> Signed-off-by: Nikolay Aleksandrov <nikolay@cumulusnetworks.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2015-11-02tcp/dccp: fix ireq->pktopts raceEric Dumazet
IPv6 request sockets store a pointer to skb containing the SYN packet to be able to transfer it to full blown socket when 3WHS is done (ireq->pktopts -> np->pktoptions) As explained in commit 5e0724d027f0 ("tcp/dccp: fix hashdance race for passive sessions"), we must transfer the skb only if we won the hashdance race, if multiple cpus receive the 'ack' packet completing 3WHS at the same time. Fixes: e994b2f0fb92 ("tcp: do not lock listener to process SYN packets") Fixes: 079096f103fa ("tcp/dccp: install syn_recv requests into ehash table") Signed-off-by: Eric Dumazet <edumazet@google.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2015-11-02RDS: convert bind hash table to re-sizable hashtablesantosh.shilimkar@oracle.com
To further improve the RDS connection scalabilty on massive systems where number of sockets grows into tens of thousands of sockets, there is a need of larger bind hashtable. Pre-allocated 8K or 16K table is not very flexible in terms of memory utilisation. The rhashtable infrastructure gives us the flexibility to grow the hashtbable based on use and also comes up with inbuilt efficient bucket(chain) handling. Reviewed-by: David Miller <davem@davemloft.net> Signed-off-by: Santosh Shilimkar <ssantosh@kernel.org> Signed-off-by: Santosh Shilimkar <santosh.shilimkar@oracle.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2015-11-02net: rds: changing the return type from int to voidSaurabh Sengar
as result of function rds_iw_flush_mr_pool is nowhere checked, changing its return type from int to void. also removing the unused variable rc as there is nothing to return Signed-off-by: Saurabh Sengar <saurabh.truth@gmail.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2015-11-02Merge tag 'linux-can-fixes-for-4.3-20151030' of ↵David S. Miller
git://git.kernel.org/pub/scm/linux/kernel/git/mkl/linux-can Marc Kleine-Budde says: ==================== pull-request: can 2015-10-30 this is a pull request for the upcoming v4.3 release. Marek Vasut provides a patch to use the correct attrlen in the nla_put() in the can_fill_info() function. ==================== Signed-off-by: David S. Miller <davem@davemloft.net>
2015-11-02Merge tag 'pinctrl-v4.4-1' of ↵Linus Torvalds
git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-pinctrl Pull pin control updates from Linus Walleij: "This is the big bulk of pin control changes for the v4.4 kernel development cycle. Development pace is high in pin control again this merge window. 28 contributors, 83 patches. It hits a few sites outside the pin control subsystem: - Device tree bindings in Documentation (as usual) - MAINTAINERS - drivers/base/* for the "init" state handling by Doug Anderson. This has been ACKed by Greg. - drivers/usb/renesas_usbhs/rcar2.c, for a dependent Renesas change in the USB subsystem. This has been ACKed by both Greg and Felipe. - arch/arm/boot/dts/sama5d2.dtsi - this should ideally have gone through the ARM SoC tree but ended up here. This time I am using Geert Uytterhoeven as submaintainer for SH PFC since the are three-four people working in parallel with new Renesas ASICs. Summary of changes: Infrastructure: - Doug Anderson wrote a patch adding an "init" state different from the "default" state for pin control state handling in the core framework. This is applied before the driver's probe() call if defined and takes precedence over "default". If both are defined, "init" will be applied *before* probe() and "default" will be applied *after* probe(). Significant subdriver improvements: - SH PFC is switched to getting GPIO ranges from the device tree ranges property on DT platforms. - Got rid of CONFIG_ARCH_SHMOBILE_LEGACY, we are all modernized. - Got rid of SH PFC hardcoded IRQ numbers. - Allwinner sunxi external interrupt through the "r" controller. - Moved the Cygnus driver to use DT-provided GPIO ranges. New drivers: - Atmel PIO4 pin controller for the SAMA4D2 family New subdrivers: - Rockchip RK3036 subdriver - Renesas SH PFC R8A7795 subdriver - Allwinner sunxi A83T PIO subdriver - Freescale i.MX7d iomux lpsr subdriver - Marvell Berlin BG4CT subdriver - SiRF Atlas 7 step B SoC subdriver - Intel Broxton SoC subdriver Apart from this, the usual slew if syntactic and semantic fixes" * tag 'pinctrl-v4.4-1' of git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-pinctrl: (81 commits) pinctrl: pinconf: remove needless loop pinctrl: uniphier: guard uniphier directory with CONFIG_PINCTRL_UNIPHIER pinctrl: zynq: fix UTF-8 errors pinctrl: zynq: Initialize early pinctrl: at91: add missing of_node_put pinctrl: tegra-xusb: Correct lane mux options pinctrl: intel: Add Intel Broxton pin controller support pinctrl: intel: Allow requesting pins which are in ACPI mode as GPIOs pinctrl: intel: Add support for multiple GPIO chips sharing the interrupt drivers/pinctrl: Add the concept of an "init" state pinctrl: uniphier: set input-enable before pin-muxing pinctrl: cygnus: Add new compatible string for gpio controller driver pinctrl: cygnus: Remove GPIO to Pinctrl pin mapping from driver pinctrl: cygnus: Optional DT property to support pin mappings pinctrl: sunxi: Add irq pinmuxing to sun6i "r" pincontroller pinctrl: sunxi: Fix irq_of_xlate for the r_pio pinctrl block pinctrl: sh-pfc: Remove obsolete r8a7778 platform_device_id entry pinctrl: sh-pfc: Remove obsolete r8a7779 platform_device_id entry pinctrl: sh-pfc: Stop including <linux/platform_data/gpio-rcar.h> usb: renesas_usbhs: Remove unneeded #include <linux/platform_data/gpio-rcar.h> ...
2015-11-02Merge branch 'encx24j600-fixes'David S. Miller
Javier Martinez Canillas says: ==================== net: encx24j600: Fix SPI driver module autoload Recently I've been trying to fix module autoloading for all SPI drivers and found that the encx24j600 driver does not fill module alias information due missing a MODULE_DEVICE_TABLE() so module autload won't work and the driver Kconfig symbol is tristate which means the driver can be built as a module. But also the SPI id table is not correctly defined so this series fixes both issues. ==================== Signed-off-by: David S. Miller <davem@davemloft.net>
2015-11-02net: encx24j600: Export missing SPI module alias informationJavier Martinez Canillas
The driver Kconfig symbol is tristate which means that it can be built as a module but the module alias information is not added to the module info so module autoload won't work since user-space won't have the information. Signed-off-by: Javier Martinez Canillas <javier@osg.samsung.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2015-11-02net: encx24j600: Fix SPI id table definitionJavier Martinez Canillas
A driver's SPI id table is expected to be an array of struct spi_device_id that ends with a zero-initialized sentinel entry. But this driver defines the table as a single struct spi_device_id and sets .id_table to a pointer to this struct. But spi_match_id() has a loop that iterates while the struct spi_device_id .name[0] is not NULL, so not having a sentinel can cause a NULL pointer deference error. This patch defines the SPI id table correctly as all other SPI drivers do. Signed-off-by: Javier Martinez Canillas <javier@osg.samsung.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2015-11-02Merge tag 'edac_for_4.4' of git://git.kernel.org/pub/scm/linux/kernel/git/bp/bpLinus Torvalds
Pull EDAC updates from Borislav Petkov: "A bunch of fixes all over the place and some hw enablement this time. - Convert EDAC to debugfs wrappers and make drivers use those (Borislav Petkov) - L3 and SoC support for xgene_edac (Loc Ho) - AMD F15h, models 0x60-6f support to amd64_edac (Aravind Gopalakrishnan) - Fixes and cleanups all over the place" * tag 'edac_for_4.4' of git://git.kernel.org/pub/scm/linux/kernel/git/bp/bp: (22 commits) EDAC: Fix PAGES_TO_MiB macro misuse EDAC, altera: SoCFPGA EDAC should not look for ECC_CORR_EN EDAC: Use edac_debugfs_remove_recursive() EDAC, ppc4xx_edac: Fix module autoload for OF platform driver Documentation/EDAC: Add reference documents section for amd64_edac EDAC, amd64_edac: Update copyright and remove changelog EDAC, amd64_edac: Extend scrub rate support to F15hM60h EDAC: Don't allow empty DIMM labels EDAC: Fix sysfs dimm_label store operation EDAC: Fix sysfs dimm_label show operation arm64, EDAC: Add L3/SoC DT subnodes to the APM X-Gene SoC EDAC node EDAC, xgene: Add SoC support EDAC, xgene: Fix possible sprintf() overflow issue EDAC, xgene: Add L3 support EDAC, Documentation: Update X-Gene EDAC binding for L3/SoC subnodes EDAC, sb_edac: Fix TAD presence check for sbridge_mci_bind_devs() EDAC, ghes_edac: Remove redundant memory_type array EDAC, xgene: Convert to debugfs wrappers EDAC, i5100: Convert to debugfs wrappers EDAC, altera: Convert to debugfs wrappers ...
2015-11-02enic: assign affinity hint to interruptsGovindarajulu Varadarajan
The affinity hint is used by the user space daemon, irqbalancer, to indicate a preferred CPU mask for irqs. This patch sets the irq affinity hint to local numa core first, when exausted we try non-local numa cores. Also set tx xps cpus mask bassed on affinity hint. v2: remove the global affinity policy. Signed-off-by: Govindarajulu Varadarajan <_govind@gmx.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2015-11-02Merge tag 'mmc-v4.4' of git://git.linaro.org/people/ulf.hansson/mmcLinus Torvalds
Pull MMC updates from Ulf Hansson: "MMC core: - Add new API to set VCCQ voltage - mmc_regulator_set_vqmmc() - Add new ioctl to allow userspace to send multi commands - Wait for card busy signalling before starting SDIO requests - Remove MMC_CLKGATE - Enable tuning for DDR50 mode - Some code clean-up/improvements to mmc pwrseq - Use highest priority for eMMC restart handler - Add DT bindings for eMMC hardware reset support - Extend the mmc_send_tuning() API - Improve ios show for debugfs - A couple of code optimizations MMC host: - Some generic OF improvements - Various code clean-ups - sirf: Add support for DDR50 - sunxi: Add support for card busy detection - mediatek: Use MMC_CAP_RUNTIME_RESUME - mediatek: Add support for eMMC HW-reset - mediatek: Add support for HS400 - dw_mmc: Convert to use the new mmc_regulator_set_vqmmc() API - dw_mmc: Add external DMA interface support - dw_mmc: Some various improvements - dw_mmc-rockchip: MMC tuning with the clock phase framework - sdhci: Properly clear IRQs during resume - sdhci: Enable tuning for DDR50 mode - sdhci-of-esdhc: Use IRQ mode for card detection - sdhci-of-esdhc: Support both BE and LE host controller - sdhci-pci: Build o2micro support in the same module - sdhci-pci: Support for new Intel host controllers - sdhci-acpi: Support for new Intel host controllers" * tag 'mmc-v4.4' of git://git.linaro.org/people/ulf.hansson/mmc: (73 commits) mmc: dw_mmc: fix the wrong setting for UHS-DDR50 mode mmc: dw_mmc: fix the CardThreshold boundary at CardThrCtl register mmc: dw_mmc: NULL dereference in error message mmc: pwrseq: Use highest priority for eMMC restart handler mmc: mediatek: add HS400 support mmc: mmc: extend the mmc_send_tuning() mmc: mediatek: add implement of ops->hw_reset() mmc: mediatek: fix got GPD checksum error interrupt when data transfer mmc: mediatek: change the argument "ddr" to "timing" mmc: mediatek: make cmd_ints_mask to const mmc: dt-bindings: update Mediatek MMC bindings mmc: core: Add DT bindings for eMMC hardware reset support mmc: omap_hsmmc: Enable omap_hsmmc for Keystone 2 mmc: sdhci-acpi: Add more ACPI HIDs for Intel controllers mmc: sdhci-pci: Add more PCI IDs for Intel controllers arm: lpc18xx_defconfig: remove CONFIG_MMC_DW_IDMAC arm: hisi_defconfig: remove CONFIG_MMC_DW_IDMAC arm: exynos_defconfig: remove CONFIG_MMC_DW_IDMAC arc: axs10x_defconfig: remove CONFIG_MMC_DW_IDMAC mips: pistachio_defconfig: remove CONFIG_MMC_DW_IDMAC ...
2015-11-02ipv4: use l4 hash for locally generated multipath flowsPaolo Abeni
This patch changes how the multipath hash is computed for locally generated flows: now the hash comprises l4 information. This allows better utilization of the available paths when the existing flows have the same source IP and the same destination IP: with l3 hash, even when multiple connections are in place simultaneously, a single path will be used, while with l4 hash we can use all the available paths. v2 changes: - use get_hash_from_flowi4() instead of implementing just another l4 hash function Signed-off-by: Paolo Abeni <pabeni@redhat.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2015-11-02Merge tag 'hwmon-for-linus-v4.4' of ↵Linus Torvalds
git://git.kernel.org/pub/scm/linux/kernel/git/groeck/linux-staging Pull hwmon updates from Guenter Roeck: "New driver for MAX31790, added support for TMP75C, as well as cleanups and minor improvements in various drivers" * tag 'hwmon-for-linus-v4.4' of git://git.kernel.org/pub/scm/linux/kernel/git/groeck/linux-staging: hwmon: (fam15h_power) Add max compute unit accumulated power hwmon: (fam15h_power) Enable power1_input on AMD Carrizo hwmon: (fam15h_power) Refactor attributes for dynamically added hwmon: (ina2xx) remove no longer used variable 'kind' hwmon: (nct6775) Introduce separate temperature labels for NCT6792 and NCT6793 hwmon: (nct6775) NCT6791D and NCT6792D have an additional temperature source hwmon: (ina2xx) give precedence to DT over checking for platform data. hwmon: (ina2xx) convert driver to using regmap hwmon: (coretemp) Increase limit of maximum core ID from 32 to 128. hwmon: (lm75) Add support for TMP75C hwmon: (ibmpowernv) Add OF compatibility table entry hwmon: (abx500) drop the use of IRQF_NO_SUSPEND hwmon: (max31790) Fix dereference of ERR_PTR hwmon: Driver for Maxim MAX31790
2015-11-02tracing: ftrace_event_is_function() can return booleanYaowei Bai
Make ftrace_event_is_function() return bool to improve readability due to this particular function only using either one or zero as its return value. No functional change. Link: http://lkml.kernel.org/r/1443537816-5788-9-git-send-email-bywxiaobai@163.com Signed-off-by: Yaowei Bai <bywxiaobai@163.com> Signed-off-by: Steven Rostedt <rostedt@goodmis.org>
2015-11-02tracing: is_legal_op() can return booleanYaowei Bai
Make is_legal_op() return bool to improve readability due to this particular function only using either one or zero as its return value. No functional change. Link: http://lkml.kernel.org/r/1443537816-5788-8-git-send-email-bywxiaobai@163.com Signed-off-by: Yaowei Bai <bywxiaobai@163.com> Signed-off-by: Steven Rostedt <rostedt@goodmis.org>
2015-11-02ring-buffer: rb_event_is_commit() can return booleanYaowei Bai
Make rb_event_is_commit() return bool to improve readability due to this particular function only using either one or zero as its return value. No functional change. Link: http://lkml.kernel.org/r/1443537816-5788-7-git-send-email-bywxiaobai@163.com Signed-off-by: Yaowei Bai <bywxiaobai@163.com> Signed-off-by: Steven Rostedt <rostedt@goodmis.org>
2015-11-02ring-buffer: rb_per_cpu_empty() can return booleanYaowei Bai
Makes rb_per_cpu_empty() return bool to improve readability. No functional change. Link: http://lkml.kernel.org/r/1443537816-5788-6-git-send-email-bywxiaobai@163.com Signed-off-by: Yaowei Bai <bywxiaobai@163.com> Signed-off-by: Steven Rostedt <rostedt@goodmis.org>
2015-11-02ring_buffer: ring_buffer_empty{cpu}() can return booleanYaowei Bai
Make ring_buffer_empty() and ring_buffer_empty_cpu() return bool. No functional change. Link: http://lkml.kernel.org/r/1443537816-5788-5-git-send-email-bywxiaobai@163.com Signed-off-by: Yaowei Bai <bywxiaobai@163.com> Signed-off-by: Steven Rostedt <rostedt@goodmis.org>
2015-11-02ring-buffer: rb_is_reader_page() can return booleanYaowei Bai
Make rb_is_reader_page() return bool to improve readability due to this particular function only using either true or false as its return value. No functional change. Link: http://lkml.kernel.org/r/1443537816-5788-4-git-send-email-bywxiaobai@163.com Signed-off-by: Yaowei Bai <bywxiaobai@163.com> Signed-off-by: Steven Rostedt <rostedt@goodmis.org>
2015-11-02tracing: report_latency() in trace_irqsoff.c can return booleanYaowei Bai
This patch makes report_latency return bool due to this particular function only using either one or zero as its return value. No functional change. Link: http://lkml.kernel.org/r/1443537816-5788-3-git-send-email-bywxiaobai@163.com Signed-off-by: Yaowei Bai <bywxiaobai@163.com> Signed-off-by: Steven Rostedt <rostedt@goodmis.org>
2015-11-02tracing: report_latency() in trace_sched_wakeup.c can return booleanYaowei Bai
This patch makes report_latency return bool to improve readability, indicating whether this new latency should be reported/recorded. No functional change. Link: http://lkml.kernel.org/r/1443537816-5788-2-git-send-email-bywxiaobai@163.com Signed-off-by: Yaowei Bai <bywxiaobai@163.com> Signed-off-by: Steven Rostedt <rostedt@goodmis.org>
2015-11-02Sample: Trace_event: Correct the commentsChunyan Zhang
The commit 889204278ccf ("tracing: Update trace-event-sample with TRACE_SYSTEM_VAR documentation") changed TRACE_SYSTEM to 'sample-trace', but didn't make the according change of its name in the comments. Link: http://lkml.kernel.org/r/1443599650-23680-1-git-send-email-zhang.chunyan@linaro.org Signed-off-by: Chunyan Zhang <zhang.chunyan@linaro.org> Signed-off-by: Steven Rostedt <rostedt@goodmis.org>
2015-11-02cris: Drop reference to get_cmos_time()Guenter Roeck
Function get_cmos_time() was removed with commit 657926a83df9 ("cris: time: Cleanup of persistent clock stuff"). The remaining reference to it may cause the following build error. arch/cris/kernel/built-in.o:(___ksymtab+get_cmos_time+0x0): undefined reference to `get_cmos_time' Makefile:946: recipe for target 'vmlinux' failed Fixes: 657926a83df9 ("cris: time: Cleanup of persistent clock stuff") Cc: Xunlei Pang <pang.xunlei@linaro.org> Cc: Rabin Vincent <rabin@rab.in> Signed-off-by: Guenter Roeck <linux@roeck-us.net> Signed-off-by: Jesper Nilsson <jespern@axis.com>
2015-11-02CRIS: Drop code related to obsolete or unused kconfigsJesper Nilsson
Drop all code related to Kconfigs that don't exist. Fix one Kconfig where it was actually typo:ed (ETRAX_KGB_PORT2) Drop content related to CRIS v32 SoCs from etraxgpio.h headerfile, all use of GPIO for both ETRAX FS and ARTPEC-3 should now be through standard gpiolib instead. Signed-off-by: Jesper Nilsson <jesper.nilsson@axis.com>
2015-11-02cris: time: Cleanup of persistent clock stuffXunlei Pang
- Remove update_persistent_clock(), as it does nothing now. - Remove read_persistent_clock(), let it fall back to the weak version. Cc: Mikael Starvik <starvik@axis.com> Cc: John Stultz <john.stultz@linaro.org> Cc: Arnd Bergmann <arnd@arndb.de> Signed-off-by: Xunlei Pang <pang.xunlei@linaro.org> Acked-by: Rabin Vincent <rabin@rab.in> Signed-off-by: Jesper Nilsson <jespern@axis.com>
2015-11-02cris: re-use helpers to dump data in hex formatAndy Shevchenko
There are native helpers such as print_hex_byte() and %*ph specifier to dump data in hex format. Re-use them instead of a custom approach. Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Signed-off-by: Jesper Nilsson <jespern@axis.com>
2015-11-02CRIS v32: remove old GPIO and LEDs codeRabin Vincent
Since we now have a gpiolib driver, remove this code: The gpio-etraxfs driver (along with things like gpio-keys-polled for polling support) replaces the GIO driver implementations in mach-a3 and mach-fs. The various generic external chip drivers replace the "virtual gpio" parts. The generic gpio-leds driver replaces the LED handling. Signed-off-by: Rabin Vincent <rabin@rab.in> Signed-off-by: Jesper Nilsson <jespern@axis.com>
2015-11-02CRIS v32: remove I2C bitbanging driverRabin Vincent
Now that we have a gpiolib GPIO driver, the generic i2c-gpio driver provides this functionality. Signed-off-by: Rabin Vincent <rabin@rab.in> Signed-off-by: Jesper Nilsson <jespern@axis.com>
2015-11-02CRIS v32: add ARTPEC-3 and P1343 device treesRabin Vincent
Add a device tree for the Axis P1343 with the ARTPEC-3 SoC and on-board LEDs and RTC. Signed-off-by: Rabin Vincent <rabin@rab.in> Signed-off-by: Jesper Nilsson <jespern@axis.com>
generated by cgit (git 2.34.1) at 2025-09-14 16:54:30 +0000