summaryrefslogtreecommitdiff
AgeCommit message (Collapse)Author
2012-09-20ARM: ux500: Add all encompassing sound node to the HREF Device TreeLee Jones
This is where we link together all of the SoC sound components for a given platform. This all encompassing sound node is only found in the very lowest hierarchical DTS file, since the component mix may well change from board variant to board variant. Acked-by: Linus Walleij <linus.walleij@linaro.org> Signed-off-by: Lee Jones <lee.jones@linaro.org>
2012-09-20ARM: ux500: Add nodes for the MSP into the HREF Device TreeLee Jones
This patch enables the two important MSP devices for ST-Ericsson's hardware reference development board. Acked-by: Linus Walleij <linus.walleij@linaro.org> Signed-off-by: Lee Jones <lee.jones@linaro.org>
2012-09-20ARM: ux500: Add all known I2C sub-device nodes to the HREF DTLee Jones
Here we add the skeleton nodes for each of the known I2C sub-devices currently registered on ST-Ericsson's HREF Development Platform. We will fill these nodes in turn as the drivers are enabled for Device Tree. Acked-by: Linus Walleij <linus.walleij@linaro.org> Signed-off-by: Lee Jones <lee.jones@linaro.org>
2012-09-20ARM: ux500: Stop registering I2C sub-devices for HREF when DT is enabledLee Jones
Here we remove all calls to register I2C sub-devices from platform code when Device Tree is enabled. Instead the I2C driver will parse the Device Tree for them. Acked-by: Linus Walleij <linus.walleij@linaro.org> Signed-off-by: Lee Jones <lee.jones@linaro.org>
2012-09-20ARM: ux500: Stop registering Audio devices for HREF when DT is enabledLee Jones
Acked-by: Linus Walleij <linus.walleij@linaro.org> Signed-off-by: Lee Jones <lee.jones@linaro.org>
2012-09-20ARM: ux500: Add all encompassing sound node to the Snowball Device TreeLee Jones
This is where we link together all of the SoC sound components for a given platform. This all encompassing sound node is only found in the very lowest hierarchical DTS file, since the component mix may well change from board variant to board variant. Acked-by: Linus Walleij <linus.walleij@linaro.org> Signed-off-by: Lee Jones <lee.jones@linaro.org>
2012-09-20ARM: ux500: Add nodes for the MSP into Device TreeLee Jones
This patch inserts all known MSP devices into the DBx5x0 Device Tree disabled and enables the two important ones for the Snowball low-cost development board. Acked-by: Linus Walleij <linus.walleij@linaro.org> Signed-off-by: Lee Jones <lee.jones@linaro.org>
2012-09-20ARM: ux500: Rename MSP board file to something more meaningfulLee Jones
The 'msp' board file does more than just register MSP devices. It also registers some other components necessary to get audio working on ux500 based platforms; such as the PCM and Machine Drivers. For that reason we're changing the filename to be more encompassing - 'audio'. Acked-by: Ola Lilja <ola.o.lilja@stericsson.com> Acked-by: Linus Walleij <linus.walleij@linaro.org> Signed-off-by: Lee Jones <lee.jones@linaro.org>
2012-09-20ARM: ux500: Remove platform registration of MSP devicesLee Jones
This patch removes platform device registration of all 4 MSP devices. It also takes care of all redundant infrastructure now that each of the ux500 audio components have been Device Tree enabled. Acked-by: Linus Walleij <linus.walleij@linaro.org> Signed-off-by: Lee Jones <lee.jones@linaro.org>
2012-09-20ARM: ux500: Stop registering the MOP500 Audio driver from platform codeLee Jones
In this patch we prevent MOP500 driver registration from platform code and rely solely on Device Tree to do the probing for us. Acked-by: Linus Walleij <linus.walleij@linaro.org> Signed-off-by: Lee Jones <lee.jones@linaro.org>
2012-09-20ARM: ux500: Pass MSP DMA platform data though AUXDATALee Jones
It isn't currently possible to pass all platform specific configuration though Device Tree. Thinks like device names used in the clock infrastructure, call-backs and DMA information have to be passed in via AUXDATA structures and the MSP is no exception. Here we're passing DMA settings. Acked-by: Linus Walleij <linus.walleij@linaro.org> Signed-off-by: Lee Jones <lee.jones@linaro.org>
2012-09-20ARM: ux500: Fork MSP platform registration for step-by-step DT enablementLee Jones
We've done this before and it worked well last time. Here we're duplicating a complex registration function to ease the process of enabling it for Device Tree. As there are quite a few steps taken during the registration process, it makes sense to break them up into more manageable chunks. This patch will aid us. Acked-by: Linus Walleij <linus.walleij@linaro.org> Signed-off-by: Lee Jones <lee.jones@linaro.org>
2012-09-20ARM: ux500: Add AB8500 CODEC node to DB8500 Device TreeLee Jones
Ensure correct probing and pass though important configuration options to the AB8500 CODEC driver when DT is enabled Acked-by: Linus Walleij <linus.walleij@linaro.org> Signed-off-by: Lee Jones <lee.jones@linaro.org>
2012-09-20ARM: ux500: Clean-up MSP platform codeLee Jones
This patch contains a couple of general MSP clean-ups pertaining to layout changes and changing functions to be void instead of int instead of regardlessly returning '0'. Acked-by: Ola Lilja <ola.o.lilja@stericsson.com> Acked-by: Linus Walleij <linus.walleij@linaro.org> Signed-off-by: Lee Jones <lee.jones@linaro.org>
2012-09-20ARM: ux500: Pass SDI DMA information though AUX_DATA to MMCILee Jones
There are four SDIs on the HREF, as opposed to the original two enabled on Snowball. To get them working we have to pass their DMA information in the same was as we need with the other two. Acked-by: Linus Walleij <linus.walleij@linaro.org> Signed-off-by: Lee Jones <lee.jones@linaro.org>
2012-09-20ARM: ux500: Add UART support to the HREF Device TreeLee Jones
Here we add three nodes enabling UART support on the HREF hardware reference board. Acked-by: Linus Walleij <linus.walleij@linaro.org> Signed-off-by: Lee Jones <lee.jones@linaro.org>
2012-09-20ARM: ux500: Add skeleton Device Tree for the HREF reference boardLee Jones
First commit applying the new Device Tree for ST-Ericsson's u8500 based hardware reference board. Acked-by: Linus Walleij <linus.walleij@linaro.org> Signed-off-by: Lee Jones <lee.jones@linaro.org>
2012-09-20ARM: ux500: Add i2c configurations to the Device Tree for DB8500 based devicesLee Jones
Since initial support was provided for the Nomadik I2C driver, it has been converted to an AMBA device. AMBA devices are probed in a slightly different way to other devices, so we have to identify them using an "arm,primecell" compatible string. As well as doing just that, this patch specifies which regulators the controller should use and requests a clock-speed. The latter is provided as more of an example, as it's the same as the recently changed default configuration. Acked-by: Linus Walleij <linus.walleij@linaro.org> Signed-off-by: Lee Jones <lee.jones@linaro.org>
2012-09-20drivers/rtc/rtc-ab8500.c: Revoke Device Tree enablementLee Jones
All AB8500 devices are now registered via MFD core, so Device Tree capability is no longer required for probing. Here we pull the DT match table to ensure we're no longer probed during Device Tree start-up. CC: Alessandro Zummo <a.zummo@towertech.it> CC: rtc-linux@googlegroups.com Acked-by: Linus Walleij <linus.walleij@linaro.org> Signed-off-by: Lee Jones <lee.jones@linaro.org>
2012-09-20ARM: ux500: Match Power-On-Key MFD and DTS compatible stringsLee Jones
The compatible string found in the Power-On-Key's MFD cell matches the device name provided in the driver. Keeping this naming convention seems like a good idea, so we're changing the one found in the DTS file to match. Acked-by: Linus Walleij <linus.walleij@linaro.org> Signed-off-by: Lee Jones <lee.jones@linaro.org>
2012-09-20ARM: ux500: Remove unused snowball_of_platform_devs structLee Jones
This was left over during a recent clean-up which removed Device Tree helper structs. There is no longer a requirement for it, so we can just remove it. Acked-by: Linus Walleij <linus.walleij@linaro.org> Signed-off-by: Lee Jones <lee.jones@linaro.org>
2012-09-20Revert "input: ab8500-ponkey: Create AB8500 domain IRQ mapping"Lee Jones
This reverts commit ca3b3faf9bee4dc5df4f10eae2d1e48f7de0a8ad. There was a plan to place ab8500_irq_get_virq() calls in each AB8500 child device prior to requesting an IRQ, but as we're no longer using Device Tree to collect our IRQ numbers, it's actually better to allow the core to do this during device registration time. So the IRQ number we pull from its resource has already been converted to a virtual IRQ. Acked-by: Dmitry Torokhov <dmitry.torokhov@gmail.com> Acked-by: Linus Walleij <linus.walleij@linaro.org> Signed-off-by: Lee Jones <lee.jones@linaro.org>
2012-09-20ARM: ux500: Force AB8500 to use the GIC as its interrupt controllerLee Jones
It's understood that the AB8500 should be subordinate to the DB8500; however, the AB8500 uses the GIC as it's interrupt controller. If we do not specify which IRQ controller to use the default is to use the next encountered IRQ controller as we climb the tree. This would be the DB8500. This patch ensures the AB8500 makes use of the correct interrupt controller. Acked-by: Linus Walleij <linus.walleij@linaro.org> Signed-off-by: Lee Jones <lee.jones@linaro.org>
2012-09-20ARM: ux500: Identify the PRCMU as an interrupt controllerLee Jones
We're just about to provide the DB8500-PRCMU with its own IRQ domain, so that its subordinate drivers can use it as an interrupt controller. It's obligatory for all IRQ controllers to reference themselves as such from its own node in Device Tree. This patch does just that. Acked-by: Linus Walleij <linus.walleij@linaro.org> Signed-off-by: Lee Jones <lee.jones@linaro.org>
2012-09-20of/irq: Create stub for of_irq_find_parent when !CONFIG_OFLee Jones
of_irq_find_parent is a handy function to use outside the confines of the Open Firmware subsystem. One such use-case is when the IRQ Domain wishes to find an IRQ domain for a given device node. Currently it can not take any notice of the 'interrupt-parent' property. Instead it just uses the first IRQ controller as it climbs the Device Tree. If we were to use this as a precursor the resultant controller is more likely to be correct. Acked-by: Rob Herring <rob.herring@calxeda.com> Acked-by: Linus Walleij <linus.walleij@linaro.org> Signed-off-by: Lee Jones <lee.jones@linaro.org>
2012-09-20Documentation: Add the AB8500 CODEC device to the MFD AB8500 docLee Jones
Here we document the AB8500 Audio CODEC in the existing MFD AB8500 document. CC: alsa-devel@alsa-project.org Acked-by: Linus Walleij <linus.walleij@linaro.org> Signed-off-by: Lee Jones <lee.jones@linaro.org>
2012-09-20ARM: ux500: Pass PMU platform data due for Perf though AUXDATALee Jones
When booting with Device Tree we need a way to call-back to the DB8500 PMU IRQ handler. This is necessary because the two CPU IRQ lines are muxed together on the DB8500 chip. The DB8500 PMU IRQ handler contains logic to pass over to the other core in the case of IRQ_NONE. This patch allows the DB8500 PMU IRQ handler to be passed to Perf through platform data. Acked-by: Linus Walleij <linus.walleij@linaro.org> Signed-off-by: Lee Jones <lee.jones@linaro.org>
2012-09-20ARM: ux500: Clean-up temporary Device Tree enablement helpersLee Jones
Here we remove some of the extra overhead we introduced to make DT:ing the Snowball platform easier. Acked-by: Linus Walleij <linus.walleij@linaro.org> Signed-off-by: Lee Jones <lee.jones@linaro.org>
2012-09-20ARM: ux500: Rename db8500.dtsi to dbx5x0.dtsi to encompass the u9500, u8540 ↵Lee Jones
and u9540 Acked-by: Linus Walleij <linus.walleij@linaro.org> Signed-off-by: Lee Jones <lee.jones@linaro.org>
2012-09-20ixgbevf: scheduling while atomic in reset hw pathJohn Fastabend
In ixgbevf_reset_hw_vf() msleep is called while holding mbx_lock resulting in a schedule while atomic bug with trace below. This patch uses mdelay instead. BUG: scheduling while atomic: ip/6539/0x00000002 2 locks held by ip/6539: #0: (rtnl_mutex){+.+.+.}, at: [<ffffffff81419cc3>] rtnl_lock+0x17/0x19 #1: (&(&adapter->mbx_lock)->rlock){+.+...}, at: [<ffffffffa0030855>] ixgbevf_reset+0x30/0xc1 [ixgbevf] Modules linked in: ixgbevf ixgbe mdio libfc scsi_transport_fc 8021q scsi_tgt garp stp llc cpufreq_ondemand acpi_cpufreq freq_table mperf ipv6 uinput igb coretemp hwmon crc32c_intel ioatdma i2c_i801 shpchp microcode lpc_ich mfd_core i2c_core joydev dca pcspkr serio_raw pata_acpi ata_generic usb_storage pata_jmicron Pid: 6539, comm: ip Not tainted 3.6.0-rc3jk-net-next+ #104 Call Trace: [<ffffffff81072202>] __schedule_bug+0x6a/0x79 [<ffffffff814bc7e0>] __schedule+0xa2/0x684 [<ffffffff8108f85f>] ? trace_hardirqs_off+0xd/0xf [<ffffffff814bd0c0>] schedule+0x64/0x66 [<ffffffff814bb5e2>] schedule_timeout+0xa6/0xca [<ffffffff810536b9>] ? lock_timer_base+0x52/0x52 [<ffffffff812629e0>] ? __udelay+0x15/0x17 [<ffffffff814bb624>] schedule_timeout_uninterruptible+0x1e/0x20 [<ffffffff810541c0>] msleep+0x1b/0x22 [<ffffffffa002e723>] ixgbevf_reset_hw_vf+0x90/0xe5 [ixgbevf] [<ffffffffa0030860>] ixgbevf_reset+0x3b/0xc1 [ixgbevf] [<ffffffffa0032fba>] ixgbevf_open+0x43/0x43e [ixgbevf] [<ffffffff81409610>] ? dev_set_rx_mode+0x2e/0x33 [<ffffffff8140b0f1>] __dev_open+0xa0/0xe5 [<ffffffff814097ed>] __dev_change_flags+0xbe/0x142 [<ffffffff8140b01c>] dev_change_flags+0x21/0x56 [<ffffffff8141a843>] do_setlink+0x2e2/0x7f4 [<ffffffff81016e36>] ? native_sched_clock+0x37/0x39 [<ffffffff8141b0ac>] rtnl_newlink+0x277/0x4bb [<ffffffff8141aee9>] ? rtnl_newlink+0xb4/0x4bb [<ffffffff812217d1>] ? selinux_capable+0x32/0x3a [<ffffffff8104fb17>] ? ns_capable+0x4f/0x67 [<ffffffff81419cc3>] ? rtnl_lock+0x17/0x19 [<ffffffff81419f28>] rtnetlink_rcv_msg+0x236/0x253 [<ffffffff81419cf2>] ? rtnetlink_rcv+0x2d/0x2d [<ffffffff8142fd42>] netlink_rcv_skb+0x43/0x94 [<ffffffff81419ceb>] rtnetlink_rcv+0x26/0x2d [<ffffffff8142faf1>] netlink_unicast+0xee/0x174 [<ffffffff81430327>] netlink_sendmsg+0x26a/0x288 [<ffffffff813fb04f>] ? rcu_read_unlock+0x56/0x67 [<ffffffff813f5e6d>] __sock_sendmsg_nosec+0x58/0x61 [<ffffffff813f81b7>] __sock_sendmsg+0x3d/0x48 [<ffffffff813f8339>] sock_sendmsg+0x6e/0x87 [<ffffffff81107c9f>] ? might_fault+0xa5/0xac [<ffffffff81402a72>] ? copy_from_user+0x2a/0x2c [<ffffffff81402e62>] ? verify_iovec+0x54/0xaa [<ffffffff813f9834>] __sys_sendmsg+0x206/0x288 [<ffffffff810694fa>] ? up_read+0x23/0x3d [<ffffffff811307e5>] ? fcheck_files+0xac/0xea [<ffffffff8113095e>] ? fget_light+0x3a/0xb9 [<ffffffff813f9a2e>] sys_sendmsg+0x42/0x60 [<ffffffff814c5ba9>] system_call_fastpath+0x16/0x1b CC: Eric Dumazet <edumazet@google.com> Signed-off-by: John Fastabend <john.r.fastabend@intel.com> Tested-By: Robert Garrett <robertx.e.garrett@intel.com> Signed-off-by: Jeff Kirsher <jeffrey.t.kirsher@intel.com>
2012-09-20ixgbevf: Add support for VF API negotiationAlexander Duyck
This change makes it so that the VF can support the PF/VF API negotiation protocol. Specifically in this case we are adding support for API 1.0 which will mean that the VF is capable of cleaning up buffers that span multiple descriptors without triggering an error. Signed-off-by: Alexander Duyck <alexander.h.duyck@intel.com> Tested-by: Sibai Li <sibai.li@intel.com> Signed-off-by: Jeff Kirsher <jeffrey.t.kirsher@intel.com>
2012-09-20igb: Support to enable EEE on all eee_supported devicesAkeem G. Abodunrin
Current implementation enables EEE on only i350 device. This patch enables EEE on all eee_supported devices. Also, configured LPI clock to keep running before EEE is enabled on i210 and i211 devices. Signed-off-by: Akeem G. Abodunrin <akeem.g.abodunrin@intel.com> Tested-by: Jeff Pieper <jeffrey.e.pieper@intel.com> Signed-off-by: Jeff Kirsher <jeffrey.t.kirsher@intel.com>
2012-09-20igb: Remove artificial restriction on RQDPC stat readingAlexander Duyck
For some reason the reading of the RQDPC register was being artificially limited to 4K. Instead of limiting the value we should read the value and add the full amount. Otherwise this can lead to a misleading number of dropped packets when the actual value is in fact much higher. Signed-off-by: Alexander Duyck <alexander.h.duyck@intel.com> Tested-by: Jeff Pieper <jeffrey.e.pieper@intel.com> Signed-off-by: Jeff Kirsher <jeffrey.t.kirsher@intel.com>
2012-09-20Merge tag 'microcode_fix_3.7' of ↵Ingo Molnar
git://git.kernel.org/pub/scm/linux/kernel/git/bp/bp into x86/microcode Pull microcode changes from Borislav Petkov: "A small list usage correction from Dan Carpenter." Signed-off-by: Ingo Molnar <mingo@kernel.org>
2012-09-20mac80211: fix IBSS auth TX debug messageSylvain Roger Rieunier
In the IBSS auth TX debug message the BSSID and DA address are reversed, fix that. Signed-off-by: Sylvain Roger Rieunier <sylvain.roger.rieunier@gmail.com> [reword commit message and make it fit 72 cols] Signed-off-by: Johannes Berg <johannes.berg@intel.com>
2012-09-20Documentation: Define the MSP Driver Device Tree bindingsLee Jones
Here we add the required documentation for the new Device Tree bindings pertaining to the MSP CPU-side DAI Driver. Acked-by: Ola Lilja <ola.o.lilja@stericsson.com> Signed-off-by: Lee Jones <lee.jones@linaro.org>
2012-09-20Documentation: Define the MOP500 Audio Machine Driver Device Tree bindingsLee Jones
Here we add the required documentation for the new Device Tree bindings pertaining to the MOP500 Audio Machine driver. Acked-by: Ola Lilja <ola.o.lilja@stericsson.com> Signed-off-by: Lee Jones <lee.jones@linaro.org>
2012-09-20ASoC: Ux500: Minor coding layout changesLee Jones
Includes removal of duplicate debug print affirming entry into the probe function, an unnecessary line break of a coding line <80 chars and a white space change (unintentional tab). Acked-by: Ola Lilja <ola.o.lilja@stericsson.com> Signed-off-by: Lee Jones <lee.jones@linaro.org>
2012-09-20ASoC: codecs: Enable AB8500 CODEC for Device TreeLee Jones
We continue to allow the AB8500 CODEC to be registered via the AB8500 Multi Functional Device API, only this time we extract its configuration from the Device Tree binary. Acked-by: Ola Lilja <ola.o.lilja@stericsson.com> Acked-by: Linus Walleij <linus.walleij@linaro.org> Signed-off-by: Lee Jones <lee.jones@linaro.org>
2012-09-20ASoC: Ux500: Enable ux500 MSP driver for Device TreeLee Jones
Register both parts of the MSP driver from Device Tree so that they are probed when Device Tree is enabled. Also, as there is platform data involved, we ensure that there is allocated memory to place the configuration into and that the correct information is extracted from the DT binary. Acked-by: Ola Lilja <ola.o.lilja@stericsson.com> Acked-by: Linus Walleij <linus.walleij@linaro.org> Signed-off-by: Lee Jones <lee.jones@linaro.org>
2012-09-20ASoC: Ux500: Enable MOP500 driver for Device TreeLee Jones
Here we ensure that the MOP500 audio driver will be probed during a Device Tree boot. We also parse the sound node to link together the codec, dma and the CPU-side Digital Audio Interface. Acked-by: Ola Lilja <ola.o.lilja@stericsson.com> Acked-by: Linus Walleij <linus.walleij@linaro.org> Signed-off-by: Lee Jones <lee.jones@linaro.org>
2012-09-20ASoC: Ux500: Move MSP pinctrl setup into the MSP driverLee Jones
In the initial submission of the MSP driver msp1 and msp3's associated pinctrl mechanism was passed back to platform code using a plat_init() call-back routine, but it has no place in platform code. The MSP driver should set this up for the appropriate ports. Instead we use a use_pinctrl identifier which is passed from platform_data/Device Tree which indicates which ports should use pinctrl. Acked-by: Ola Lilja <ola.o.lilja@stericsson.com> Acked-by: Linus Walleij <linus.walleij@linaro.org> Signed-off-by: Lee Jones <lee.jones@linaro.org>
2012-09-20gpio: adnp: dt: Reference generic interrupt bindingThierry Reding
Instead of having to duplicate the description of the properties needed for interrupt support, reference the new standard document. Cc: Grant Likely <grant.likely@secretlab.ca> Cc: Rob Herring <rob.herring@calxeda.com> Cc: devicetree-discuss@lists.ozlabs.org Cc: linux-kernel@vger.kernel.org Signed-off-by: Thierry Reding <thierry.reding@avionic-design.de> [Minor spelling correction] Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2012-09-19MAINTAINERS: add an entry for the BCM2835 ARM sub-architectureStephen Warren
Add myself as the maintainer for the BCM2835 ARM support, and related drivers. This is mainly so that the MAINTAINERS file contains some relevant entry, and the rpi/ARM mailing lists; I'd be quite happy if anyone else came along and wanted to maintain/co-maintain this. Signed-off-by: Stephen Warren <swarren@wwwdotorg.org>
2012-09-19ARM: bcm2835: instantiate console UARTSimon Arlott
This patch was extracted from git://github.com/lp0/linux.git branch rpi-split as of 2012/09/08, and modified as follows: * s/bcm2708/bcm2835/. * Modified device tree vendor prefix. * Modified UART DT node to use a unit-address to create unique UART node names, rather than using non-type names "uart0" and "uart1". Note that UART 1 (the Broadcom "mini UART") is not yet present, but I'm naming the DT node in anticipation that it will be added. Signed-off-by: Chris Boot <bootc@bootc.net> Signed-off-by: Simon Arlott <simon@fire.lp0.eu> Signed-off-by: Dom Cobley <popcornmix@gmail.com> Signed-off-by: Dom Cobley <dc4@broadcom.com> Signed-off-by: Stephen Warren <swarren@wwwdotorg.org> Acked-by: Arnd Bergmann <arnd@arndb.de>
2012-09-19ARM: bcm2835: add stub clock driverSimon Arlott
This patch adds a minimal stub clock driver for the BCM2835. Its sole purpose is to allow the PL011 AMBA clk_get() API calls to provide something that looks enough like a clock that the driver probes and operates correctly. This patch was extracted from git://github.com/lp0/linux.git branch rpi-split as of 2012/09/08, and modified as follows: * Reworked to call clk_register_fixed_rate(), and clk_register_clkdev() rather than using static data to represent the clocks. * Moved implementation to drivers/clk/. * Modified .dev_id for UART clocks to match UART DT node names. * s/bcm2708/bcm2835/. * Modified device tree vendor prefix. Signed-off-by: Chris Boot <bootc@bootc.net> Signed-off-by: Simon Arlott <simon@fire.lp0.eu> Signed-off-by: Dom Cobley <popcornmix@gmail.com> Signed-off-by: Dom Cobley <dc4@broadcom.com> Signed-off-by: Stephen Warren <swarren@wwwdotorg.org> Acked-by: Mike Turquette <mturquette@linaro.org>
2012-09-19ARM: bcm2835: add system timerSimon Arlott
The System Timer peripheral provides four 32-bit timer channels and a single 64-bit free running counter. Each channel has an output compare register, which is compared against the 32 least significant bits of the free running counter values, and generates an interrupt. Timer 3 is used as the Linux timer. The BCM2835 also contains an SP804-based timer module. However, it apparently has significant differences from the standard SP804 IP block, and Broadcom's documentation recommends using the system timer instead. This patch was extracted from git://github.com/lp0/linux.git branch rpi-split as of 2012/09/08, and modified as follows: * s/bcm2708/bcm2835/. * Modified device tree vendor prefix. * Moved to drivers/clocksource/. This looks like the desired location for such code now. * Added DT binding docs. * Moved struct sys_timer bcm2835_timer into time.c to encapsulate it more. * Simplified bcm2835_time_init() to find one matching node and operate on it, rather than looping over all matching nodes. This seems more consistent with other clocksource code. * Simplified bcm2835_time_init() using of_iomap(). * Renamed struct bcm2835_timer.index to match_mask to better represent its purpose. * s/printk(PR_INFO/pr_info(/ Signed-off-by: Chris Boot <bootc@bootc.net> Signed-off-by: Simon Arlott <simon@fire.lp0.eu> Signed-off-by: Dom Cobley <popcornmix@gmail.com> Signed-off-by: Dom Cobley <dc4@broadcom.com> Signed-off-by: Stephen Warren <swarren@wwwdotorg.org> Acked-by: Arnd Bergmann <arnd@arndb.de>
2012-09-19ARM: bcm2835: add interrupt controller driverSimon Arlott
The BCM2835 contains a custom interrupt controller, which supports 72 interrupt sources using a 2-level register scheme. The interrupt controller, or the HW block containing it, is referred to occasionally as "armctrl" in the SoC documentation, hence the symbol naming in the code. This patch was extracted from git://github.com/lp0/linux.git branch rpi-split as of 2012/09/08, and modified as follows: * s/bcm2708/bcm2835/. * Modified device tree vendor prefix. * Moved implementation to drivers/irchip/. * Added devicetree documentation, and hence removed list of IRQs from bcm2835.dtsi. * Changed shift in MAKE_HWIRQ() and HWIRQ_BANK() from 8 to 5 to reduce the size of the hwirq space, and pass the total size of the hwirq space to irq_domain_add_linear(), rather than just the number of valid hwirqs; the two are different due to the hwirq space being sparse. * Added the interrupt controller DT node to the top-level of the DT, rather than nesting it inside a /axi node. Hence, changed the reg value since /axi had a ranges property. This seems simpler to me, but I'm not sure if everyone will like this change or not. * Don't set struct irq_domain_ops.map = irq_domain_simple_map, hence removing the need to patch include/linux/irqdomain.h or kernel/irq/irqdomain.c. * Simplified armctrl_of_init() using of_iomap(). * Removed unused IS_VALID_BANK()/IS_VALID_IRQ() macros. * Renamed armctrl_handle_irq() to prevent possible symbol clashes. * Made armctrl_of_init() static. * Removed comment "Each bank is registered as a separate interrupt controller" since this is no longer true. * Removed FSF address from license header. * Added my name to copyright header. Signed-off-by: Chris Boot <bootc@bootc.net> Signed-off-by: Simon Arlott <simon@fire.lp0.eu> Signed-off-by: Dom Cobley <popcornmix@gmail.com> Signed-off-by: Dom Cobley <dc4@broadcom.com> Signed-off-by: Stephen Warren <swarren@wwwdotorg.org> Acked-by: Arnd Bergmann <arnd@arndb.de>
2012-09-19ARM: add infra-structure for BCM2835 and Raspberry PiSimon Arlott
The BCM2835 is an ARM SoC from Broadcom. This patch adds very basic support for this SoC. http://www.broadcom.com/products/BCM2835 http://www.raspberrypi.org/wp-content/uploads/2012/02/BCM2835-ARM-Peripherals.pdf Note that the documentation in the latter .pdf assumes the MMU setup that's used on the "VideoCore" companion processor, and does not document physical peripheral addresses. Subtract 0x5e000000 to obtain the physical addresses. This is accounted for by the ranges property in the /soc node in the device tree. The BCM2835 SoC is used in the Raspberry Pi. This patch also adds a minimal device tree for this board; enough to see some very early kernel boot messages through earlyprintk. However, this patch does not yet provide a useful booting system. http://www.raspberrypi.org/. This patch was extracted from git://github.com/lp0/linux.git branch rpi-split from 3-4 months ago, and significantly stripped down and modified since. Signed-off-by: Chris Boot <bootc@bootc.net> Signed-off-by: Simon Arlott <simon@fire.lp0.eu> Signed-off-by: Dom Cobley <popcornmix@gmail.com> Signed-off-by: Dom Cobley <dc4@broadcom.com> Signed-off-by: Stephen Warren <swarren@wwwdotorg.org> Acked-by: Arnd Bergmann <arnd@arndb.de>
2012-09-19r8169: use unlimited DMA burst for TXMichal Schmidt
The r8169 driver currently limits the DMA burst for TX to 1024 bytes. I have a box where this prevents the interface from using the gigabit line to its full potential. This patch solves the problem by setting TX_DMA_BURST to unlimited. The box has an ASRock B75M motherboard with on-board RTL8168evl/8111evl (XID 0c900880). TSO is enabled. I used netperf (TCP_STREAM test) to measure the dependency of TX throughput on MTU. I did it for three different values of TX_DMA_BURST ('5'=512, '6'=1024, '7'=unlimited). This chart shows the results: http://michich.fedorapeople.org/r8169/r8169-effects-of-TX_DMA_BURST.png Interesting points: - With the current DMA burst limit (1024): - at the default MTU=1500 I get only 842 Mbit/s. - when going from small MTU, the performance rises monotonically with increasing MTU only up to a peak at MTU=1076 (908 MBit/s). Then there's a sudden drop to 762 MBit/s from which the throughput rises monotonically again with further MTU increases. - With a smaller DMA burst limit (512): - there's a similar peak at MTU=1076 and another one at MTU=564. - With unlimited DMA burst: - at the default MTU=1500 I get nice 940 Mbit/s. - the throughput rises monotonically with increasing MTU with no strange peaks. Notice that the peaks occur at MTU sizes that are multiples of the DMA burst limit plus 52. Why 52? Because: 20 (IP header) + 20 (TCP header) + 12 (TCP options) = 52 The Realtek-provided r8168 driver (v8.032.00) uses unlimited TX DMA burst too, except for CFG_METHOD_1 where the TX DMA burst is set to 512 bytes. CFG_METHOD_1 appears to be the oldest MAC version of "RTL8168B/8111B", i.e. RTL_GIGA_MAC_VER_11 in r8169. Not sure if this MAC version really needs the smaller burst limit, or if any other versions have similar requirements. Signed-off-by: Michal Schmidt <mschmidt@redhat.com> Acked-by: Francois Romieu <romieu@fr.zoreil.com> Signed-off-by: David S. Miller <davem@davemloft.net>