summaryrefslogtreecommitdiff
AgeCommit message (Collapse)Author
2020-05-30mailbox: sprd: Add Spreadtrum mailbox driverBaolin Wang
The Spreadtrum mailbox controller supports 8 channels to communicate with MCUs, and it contains 2 different parts: inbox and outbox, which are used to send and receive messages by IRQ mode. Signed-off-by: Baolin Wang <baolin.wang@unisoc.com> Signed-off-by: Jassi Brar <jaswinder.singh@linaro.org>
2020-05-30dt-bindings: mailbox: Add the Spreadtrum mailbox documentationBaolin Wang
Add the Spreadtrum mailbox documentation. Reviewed-by: Rob Herring <robh@kernel.org> Signed-off-by: Baolin Wang <baolin.wang@unisoc.com> Signed-off-by: Jassi Brar <jaswinder.singh@linaro.org>
2020-05-30mailbox: ZynqMP IPI: Delete an error message in zynqmp_ipi_probe()Markus Elfring
The function platform_get_irq can log an error already. Thus omit a redundant message for the exception handling in the calling function. This issue was detected by using the Coccinelle software. Signed-off-by: Markus Elfring <elfring@users.sourceforge.net> Signed-off-by: Jassi Brar <jaswinder.singh@linaro.org>
2020-05-30mailbox: imx: Disable the clock on devm_mbox_controller_register() failureFabio Estevam
devm_mbox_controller_register() may fail, and in the case of failure the priv->clk clock that was previously enabled, should be disabled. Fixes: 2bb7005696e2 ("mailbox: Add support for i.MX messaging unit") Signed-off-by: Fabio Estevam <festevam@gmail.com> Reviewed-by: Peng Fan <peng.fan@nxp.com> Acked-by: Oleksij Rempel <o.rempel@pengutronix.de> [Jassi: fixed merge/am conflict] Signed-off-by: Jassi Brar <jaswinder.singh@linaro.org>
2020-05-30i2c: add 'single-master' property to generic bindingsWolfram Sang
It is useful to know if we are the only master on a given bus. Because this is a HW description of the bus, add it to the generic bindings. Signed-off-by: Wolfram Sang <wsa+renesas@sang-engineering.com> Reviewed-by: Rob Herring <robh@kernel.org> Signed-off-by: Wolfram Sang <wsa@kernel.org>
2020-05-30mailbox: imx: Fix return in imx_mu_scu_xlate()Dan Carpenter
This called from mbox_request_channel(). The caller is expecting error pointers and not NULL so this "return NULL;" will lead to an Oops. Fixes: 0a67003b1985 ("mailbox: imx: add SCU MU support") Signed-off-by: Dan Carpenter <dan.carpenter@oracle.com> Signed-off-by: Jassi Brar <jaswinder.singh@linaro.org>
2020-05-30mailbox: imx: Support runtime PMAnson Huang
Some power hungry sub-systems like VPU has its own MUs which also use mailbox driver, current mailbox driver uses platform driver model and MU's power will be ON after driver probed and left ON there, it may cause the whole sub-system can NOT enter lower power mode, take VPU driver for example, it has runtime PM support, but due to its MU always ON, the VPU sub-system will be always ON and consume many power during kernel idle. To save power in kernel idle, mailbox driver needs to support runtime PM in order to power off MU when it is unused. However, the runtime suspend/resume can ONLY be implemented in mailbox's .shutdown/.startup callback, so its consumer needs to call mbox_request_channel()/mbox_free_channel() in consumer driver's runtime PM callback, then the MU's power will be ON/OFF along with consumer's runtime PM status. Signed-off-by: Anson Huang <Anson.Huang@nxp.com> Signed-off-by: Jassi Brar <jaswinder.singh@linaro.org>
2020-05-30mailbox: pcc: make pcc_mbox_driver staticJason Yan
Fix the following sparse warning: drivers/mailbox/pcc.c:571:24: warning: symbol 'pcc_mbox_driver' was not declared. Should it be static? Reported-by: Hulk Robot <hulkci@huawei.com> Signed-off-by: Jason Yan <yanaijie@huawei.com> Signed-off-by: Jassi Brar <jaswinder.singh@linaro.org>
2020-05-30i2c: designware: Add Baikal-T1 System I2C supportSerge Semin
Baikal-T1 System Controller is equipped with a dedicated I2C Controller which functionality is based on the DW APB I2C IP-core, the only difference in a way it' registers are accessed. There are three access register provided in the System Controller registers map, which indirectly address the normal DW APB I2C registers space. So in order to have the Baikal-T1 System I2C Controller supported by the common DW APB I2C driver we created a dedicated Dw I2C controller model quirk, which retrieves the syscon regmap from the parental dt node and creates a new regmap based on it. Signed-off-by: Serge Semin <Sergey.Semin@baikalelectronics.ru> Reviewed-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Signed-off-by: Wolfram Sang <wsa@kernel.org>
2020-05-30i2c: designware: Move reg-space remapping into a dedicated functionSerge Semin
This is a preparation patch before adding a quirk with custom registers map creation required for the Baikal-T1 System I2C support. Signed-off-by: Serge Semin <Sergey.Semin@baikalelectronics.ru> Reviewed-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Signed-off-by: Wolfram Sang <wsa@kernel.org>
2020-05-30i2c: designware: Retrieve quirk flags as early as possibleSerge Semin
Some platforms might need to activate the driver quirks at a very early probe stage. For instance, Baikal-T1 System I2C doesn't need to map the registers space as ones belong to the system controller. Instead it will request the syscon regmap from the parental DT node. In order to be able to do so let's retrieve the model flags right after the DW I2C private data is created. While at it replace the or-assignment with just assignment operator since or-ing is redundant at this stage. Signed-off-by: Serge Semin <Sergey.Semin@baikalelectronics.ru> Reviewed-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Signed-off-by: Wolfram Sang <wsa@kernel.org>
2020-05-30i2c: designware: Convert driver to using regmap APISerge Semin
Seeing the DW I2C driver is using flags-based accessors with two conditional clauses it would be better to replace them with the regmap API IO methods and to initialize the regmap object with read/write callbacks specific to the controller registers map implementation. This will be also handy for the drivers with non-standard registers mapping (like an embedded into the Baikal-T1 System Controller DW I2C block, which glue-driver is a part of this series). As before the driver tries to detect the mapping setup at probe stage and creates a regmap object accordingly, which will be used by the rest of the code to correctly access the controller registers. In two places it was appropriate to convert the hand-written read-modify-write and read-poll-loop design patterns to the corresponding regmap API ready-to-use methods. Note the regmap IO methods return value is checked only at the probe stage. The rest of the code won't do this because basically we have MMIO-based regmap so non of the read/write methods can fail (this also won't be needed for the Baikal-T1-specific I2C controller). Suggested-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Signed-off-by: Serge Semin <Sergey.Semin@baikalelectronics.ru> Tested-by: Jarkko Nikula <jarkko.nikula@linux.intel.com> Acked-by: Jarkko Nikula <jarkko.nikula@linux.intel.com> Reviewed-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> [wsa: fix type of 'rx_valid' and remove outdated kdoc var description] Signed-off-by: Wolfram Sang <wsa@kernel.org>
2020-05-30dt: Add bindings for IDT VersaClock 5P49V5925Adam Ford
IDT VersaClock 5 5P49V6965 has 5 clock outputs, 4 fractional dividers. Signed-off-by: Adam Ford <aford173@gmail.com> Link: https://lkml.kernel.org/r/20200404161537.2312297-2-aford173@gmail.com Acked-by: Rob Herring <robh@kernel.org> Signed-off-by: Stephen Boyd <sboyd@kernel.org>
2020-05-30clk: vc5: Add support for IDT VersaClock 5P49V6965Adam Ford
Update IDT VersaClock 5 driver to support 5P49V6965. Signed-off-by: Adam Ford <aford173@gmail.com> Link: https://lore.kernel.org/r/20200404161537.2312297-1-aford173@gmail.com Signed-off-by: Stephen Boyd <sboyd@kernel.org>
2020-05-30Merge tag 'powerpc-5.7-6' of ↵Linus Torvalds
git://git.kernel.org/pub/scm/linux/kernel/git/powerpc/linux Pull powerpc fixes from Michael Ellerman: - a fix for the recent change to how we restore non-volatile GPRs, which broke our emulation of reading from the DSCR (Data Stream Control Register). - a fix for the recent rewrite of interrupt/syscall exit in C, we need to exclude KCOV from that code, otherwise it can lead to unrecoverable faults. Thanks to Daniel Axtens. * tag 'powerpc-5.7-6' of git://git.kernel.org/pub/scm/linux/kernel/git/powerpc/linux: powerpc/64s: Disable sanitisers for C syscall/interrupt entry/exit code powerpc/64s: Fix restore of NV GPRs after facility unavailable exception
2020-05-30Merge tag 'gpio-v5.7-3' of ↵Linus Torvalds
git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-gpio Pull GPIO fixes from Linus Walleij: "Here are some (very) late fixes for GPIO, none of them very serious except the one tagged for stable for enabling IRQ on open drain lines: - Fix probing of mvebu chips without PWM - Fix error path on ida_get_simple() on the exar driver - Notify userspace properly about line status changes when flags are changed on lines. - Fix a sleeping while holding spinlock in the mellanox driver. - Fix return value of the PXA and Kona probe calls. - Fix IRQ locking of open drain lines, it is fine to have IRQs on open drain lines flagged for output" * tag 'gpio-v5.7-3' of git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-gpio: gpio: fix locking open drain IRQ lines gpio: bcm-kona: Fix return value of bcm_kona_gpio_probe() gpio: pxa: Fix return value of pxa_gpio_probe() gpio: mlxbf2: Fix sleeping while holding spinlock gpiolib: notify user-space about line status changes after flags are set gpio: exar: Fix bad handling for ida_simple_get error path gpio: mvebu: Fix probing for chips without PWM
2020-05-30mtd: spi-nor: sfdp: prepare BFPT parsing for JESD216 rev DPratyush Yadav
JESD216 rev D makes BFPT 20 DWORDs. Update the BFPT size define to reflect that. The check for rev A or later compared the BFPT header length with the maximum BFPT length, BFPT_DWORD_MAX. Since BFPT_DWORD_MAX was 16, and so was the BFPT length for both rev A and B, this check worked fine. But now, since BFPT_DWORD_MAX is 20, it means this check will also stop BFPT parsing for rev A or B, since their length is 16. So, instead check for BFPT_DWORD_MAX_JESD216 to stop BFPT parsing for the first JESD216 version, and check for BFPT_DWORD_MAX_JESD216B for the next two versions. Signed-off-by: Pratyush Yadav <p.yadav@ti.com> Signed-off-by: Tudor Ambarus <tudor.ambarus@microchip.com>
2020-05-30clk: Add Baikal-T1 CCU Dividers driverSerge Semin
Nearly each Baikal-T1 IP-core is supposed to have a clock source of particular frequency. But since there are greater than five IP-blocks embedded into the SoC, the CCU PLLs can't fulfill all the needs. Baikal-T1 CCU provides a set of fixed and configurable clock dividers in order to generate a necessary signal for each chip sub-block. This driver creates the of-based hardware clocks for each divider available in Baikal-T1 CCU. The same way as for PLLs we split the functionality up into the clocks operations (gate, ungate, set rate, etc) and hardware clocks declaration/registration procedures. In accordance with the CCU documentation all its dividers are distributed into two CCU sub-blocks: AXI-bus and system devices reference clocks. The former sub-block is used to supply the clocks for AXI-bus interfaces (AXI clock domains) and the later one provides the SoC IP-cores reference clocks. Each sub-block is represented by a dedicated DT node, so they have different compatible strings to distinguish one from another. For some reason CCU provides the dividers of different types. Some dividers can be gateable some can't, some are fixed while the others are variable, some have special divider' limitations, some've got a non-standard register layout and so on. In order to cover all of these cases the hardware clocks driver is designed with an info-descriptor pattern. So there are special static descriptors declared for the dividers of each type with additional flags describing the block peculiarity. These descriptors are then used to create hardware clocks with proper operations. Some CCU dividers provide a way to reset a domain they generate a clock for. So the CCU AXI-bus and CCU system devices clock drivers also perform the reset controller registration. Signed-off-by: Serge Semin <Sergey.Semin@baikalelectronics.ru> Cc: Alexey Malahov <Alexey.Malahov@baikalelectronics.ru> Cc: Arnd Bergmann <arnd@arndb.de> Cc: Rob Herring <robh+dt@kernel.org> Cc: linux-mips@vger.kernel.org Cc: devicetree@vger.kernel.org Link: https://lore.kernel.org/r/20200526222056.18072-5-Sergey.Semin@baikalelectronics.ru [sboyd@kernel.org: Drop return from void function, silence sparse warnings about initializing structs with NULL vs. integer] Signed-off-by: Stephen Boyd <sboyd@kernel.org>
2020-05-30clk: Add Baikal-T1 CCU PLLs driverSerge Semin
Baikal-T1 is supposed to be supplied with a high-frequency external oscillator. But in order to create signals suitable for each IP-block embedded into the SoC the oscillator output is primarily connected to a set of CCU PLLs. There are five of them to create clocks for the MIPS P5600 cores, an embedded DDR controller, SATA, Ethernet and PCIe domains. The last three domains though named by the biggest system interfaces in fact include nearly all of the rest SoC peripherals. Each of the PLLs is based on True Circuits TSMC CLN28HPM IP-core with an interface wrapper (so called safe PLL' clocks switcher) to simplify the PLL configuration procedure. This driver creates the of-based hardware clocks to use them then in the corresponding subsystems. In order to simplify the driver code we split the functionality up into the PLLs clocks operations and hardware clocks declaration/registration procedures. Even though the PLLs are based on the same IP-core, they may have some differences. In particular, some CCU PLLs support the output clock change without gating them (like CPU or PCIe PLLs), while the others don't, some CCU PLLs are critical and aren't supposed to be gated. In order to cover all of these cases the hardware clocks driver is designed with an info-descriptor pattern. So there are special static descriptors declared for each PLL, which is then used to create a hardware clock with proper operations. Additionally debugfs-files are provided for each PLL' field to make sure the implemented rate-PLLs-dividers calculation algorithm is correct. Signed-off-by: Serge Semin <Sergey.Semin@baikalelectronics.ru> Cc: Alexey Malahov <Alexey.Malahov@baikalelectronics.ru> Cc: Arnd Bergmann <arnd@arndb.de> Cc: Rob Herring <robh+dt@kernel.org> Cc: linux-mips@vger.kernel.org Cc: devicetree@vger.kernel.org Link: https://lore.kernel.org/r/20200526222056.18072-4-Sergey.Semin@baikalelectronics.ru [sboyd@kernel.org: Silence sparse warning about initializing structs with NULL vs. integer] Signed-off-by: Stephen Boyd <sboyd@kernel.org>
2020-05-30dt-bindings: clk: Add Baikal-T1 CCU Dividers bindingSerge Semin
After being gained by the CCU PLLs the signals must be transformed to be suitable for the clock-consumers. This is done by a set of dividers embedded into the CCU. A first block of dividers is used to create reference clocks for AXI-bus of high-speed peripheral IP-cores of the chip. The second block dividers alter the PLLs output signals to be then consumed by SoC peripheral devices. Both block DT nodes are ordinary clock-providers with standard set of properties supported. But in addition to that each clock provider can be used to reset the corresponding clock domain. This makes the AXI-bus and System Devices CCU DT nodes to be also reset-providers. Signed-off-by: Serge Semin <Sergey.Semin@baikalelectronics.ru> Cc: Alexey Malahov <Alexey.Malahov@baikalelectronics.ru> Cc: Arnd Bergmann <arnd@arndb.de> Cc: linux-mips@vger.kernel.org Link: https://lore.kernel.org/r/20200526222056.18072-3-Sergey.Semin@baikalelectronics.ru Reviewed-by: Rob Herring <robh@kernel.org> Signed-off-by: Stephen Boyd <sboyd@kernel.org>
2020-05-30dt-bindings: clk: Add Baikal-T1 CCU PLLs bindingSerge Semin
Baikal-T1 Clocks Control Unit is responsible for transformation of a signal coming from an external oscillator into clocks of various frequencies to propagate them then to the corresponding clocks consumers (either individual IP-blocks or clock domains). In order to create a set of high-frequency clocks the external signal is firstly handled by the embedded into CCU PLLs. So the corresponding dts-node is just a normal clock-provider node with standard set of properties. Note as being part of the Baikal-T1 System Controller its DT node is supposed to be a child the system controller node. Signed-off-by: Serge Semin <Sergey.Semin@baikalelectronics.ru> Cc: Alexey Malahov <Alexey.Malahov@baikalelectronics.ru> Cc: Arnd Bergmann <arnd@arndb.de> Cc: linux-mips@vger.kernel.org Link: https://lore.kernel.org/r/20200526222056.18072-2-Sergey.Semin@baikalelectronics.ru Reviewed-by: Rob Herring <robh@kernel.org> Signed-off-by: Stephen Boyd <sboyd@kernel.org>
2020-05-30Documentation: Add details for pstore/blkWeiXiong Liao
Add details on using pstore/blk, the new backend of pstore to record dumps to block devices, in Documentation/admin-guide/pstore-blk.rst Signed-off-by: WeiXiong Liao <liaoweixiong@allwinnertech.com> Link: https://lore.kernel.org/lkml/20200511233229.27745-7-keescook@chromium.org/ Signed-off-by: Kees Cook <keescook@chromium.org>
2020-05-30pstore/zone,blk: Add ftrace frontend supportWeiXiong Liao
Support backend for ftrace. To enable ftrace backend, just make ftrace_size be greater than 0 and a multiple of 4096. Signed-off-by: WeiXiong Liao <liaoweixiong@allwinnertech.com> Link: https://lore.kernel.org/lkml/20200511233229.27745-6-keescook@chromium.org/ Co-developed-by: Colin Ian King <colin.king@canonical.com> Signed-off-by: Colin Ian King <colin.king@canonical.com> Link: https://lore.kernel.org/lkml/20200512170719.221514-1-colin.king@canonical.com Signed-off-by: Kees Cook <keescook@chromium.org>
2020-05-30pstore/zone,blk: Add console frontend supportWeiXiong Liao
Support backend for console. To enable console backend, just make console_size be greater than 0 and a multiple of 4096. Signed-off-by: WeiXiong Liao <liaoweixiong@allwinnertech.com> Link: https://lore.kernel.org/lkml/20200511233229.27745-5-keescook@chromium.org/ Signed-off-by: Kees Cook <keescook@chromium.org>
2020-05-30pstore/zone,blk: Add support for pmsg frontendWeiXiong Liao
Add pmsg support to pstore/blk (through pstore/zone). To enable, pmsg_size must be greater than 0 and a multiple of 4096. Signed-off-by: WeiXiong Liao <liaoweixiong@allwinnertech.com> Link: https://lore.kernel.org/lkml/20200511233229.27745-4-keescook@chromium.org/ Co-developed-by: Colin Ian King <colin.king@canonical.com> Signed-off-by: Colin Ian King <colin.king@canonical.com> Link: https://lore.kernel.org/lkml/20200512171932.222102-1-colin.king@canonical.com Co-developed-by: Kees Cook <keescook@chromium.org> Signed-off-by: Kees Cook <keescook@chromium.org>
2020-05-30pstore/blk: Introduce backend for block devicesWeiXiong Liao
pstore/blk is similar to pstore/ram, but uses a block device as the storage rather than persistent ram. The pstore/blk backend solves two common use-cases that used to preclude using pstore/ram: - not all devices have a battery that could be used to persist regular RAM across power failures. - most embedded intelligent equipment have no persistent ram, which increases costs, instead preferring cheaper solutions, like block devices. pstore/blk provides separate configurations for the end user and for the block drivers. User configuration determines how pstore/blk operates, such as record sizes, max kmsg dump reasons, etc. These can be set by Kconfig and/or module parameters, but module parameter have priority over Kconfig. Driver configuration covers all the details about the target block device, such as total size of the device and how to perform read/write operations. These are provided by block drivers, calling pstore_register_blkdev(), including an optional panic_write callback used to bypass regular IO APIs in an effort to avoid potentially destabilized kernel code during a panic. Signed-off-by: WeiXiong Liao <liaoweixiong@allwinnertech.com> Link: https://lore.kernel.org/lkml/20200511233229.27745-3-keescook@chromium.org/ Co-developed-by: Kees Cook <keescook@chromium.org> Signed-off-by: Kees Cook <keescook@chromium.org>
2020-05-30pstore/zone: Introduce common layer to manage storage zonesWeiXiong Liao
Implement a common set of APIs needed to support pstore storage zones, based on how ramoops is designed. This will be used by pstore/blk with the intention of migrating pstore/ram in the future. Signed-off-by: WeiXiong Liao <liaoweixiong@allwinnertech.com> Link: https://lore.kernel.org/lkml/20200511233229.27745-2-keescook@chromium.org/ Co-developed-by: Kees Cook <keescook@chromium.org> Signed-off-by: Kees Cook <keescook@chromium.org>
2020-05-30ramoops: Add "max-reason" optional field to ramoops DT nodePavel Tatashin
Currently, it is only possible to get kmsg dumps for panic and oops, or just panic, via "no-dump-oops". With "max-reason" it is possible to dump messages for other kmsg_dump events, for example emerg and shutdown. Signed-off-by: Pavel Tatashin <pasha.tatashin@soleen.com> Link: https://lore.kernel.org/lkml/20200515184434.8470-7-keescook@chromium.org/ Signed-off-by: Kees Cook <keescook@chromium.org>
2020-05-30pstore/ram: Introduce max_reason and convert dump_oopsKees Cook
Now that pstore_register() can correctly pass max_reason to the kmesg dump facility, introduce a new "max_reason" module parameter and "max-reason" Device Tree field. The "dump_oops" module parameter and "dump-oops" Device Tree field are now considered deprecated, but are now automatically converted to their corresponding max_reason values when present, though the new max_reason setting has precedence. For struct ramoops_platform_data, the "dump_oops" member is entirely replaced by a new "max_reason" member, with the only existing user updated in place. Additionally remove the "reason" filter logic from ramoops_pstore_write(), as that is not specifically needed anymore, though technically this is a change in behavior for any ramoops users also setting the printk.always_kmsg_dump boot param, which will cause ramoops to behave as if max_reason was set to KMSG_DUMP_MAX. Co-developed-by: Pavel Tatashin <pasha.tatashin@soleen.com> Signed-off-by: Pavel Tatashin <pasha.tatashin@soleen.com> Link: https://lore.kernel.org/lkml/20200515184434.8470-6-keescook@chromium.org/ Signed-off-by: Kees Cook <keescook@chromium.org>
2020-05-30pstore/platform: Pass max_reason to kmesg dumpPavel Tatashin
Add a new member to struct pstore_info for passing information about kmesg dump maximum reason. This allows a finer control of what kmesg dumps are sent to pstore storage backends. Those backends that do not explicitly set this field (keeping it equal to 0), get the default behavior: store only Oopses and Panics, or everything if the printk.always_kmsg_dump boot param is set. Signed-off-by: Pavel Tatashin <pasha.tatashin@soleen.com> Link: https://lore.kernel.org/lkml/20200515184434.8470-5-keescook@chromium.org/ Co-developed-by: Kees Cook <keescook@chromium.org> Signed-off-by: Kees Cook <keescook@chromium.org>
2020-05-30printk: Introduce kmsg_dump_reason_str()Kees Cook
The pstore subsystem already had a private version of this function. With the coming addition of the pstore/zone driver, this needs to be shared. As it really should live with printk, move it there instead. Link: https://lore.kernel.org/lkml/20200515184434.8470-4-keescook@chromium.org/ Acked-by: Petr Mladek <pmladek@suse.com> Acked-by: Sergey Senozhatsky <sergey.senozhatsky@gmail.com> Reviewed-by: Pavel Tatashin <pasha.tatashin@soleen.com> Signed-off-by: Kees Cook <keescook@chromium.org>
2020-05-30printk: honor the max_reason field in kmsg_dumperPavel Tatashin
kmsg_dump() allows to dump kmesg buffer for various system events: oops, panic, reboot, etc. It provides an interface to register a callback call for clients, and in that callback interface there is a field "max_reason", but it was getting ignored when set to any "reason" higher than KMSG_DUMP_OOPS unless "always_kmsg_dump" was passed as kernel parameter. Allow clients to actually control their "max_reason", and keep the current behavior when "max_reason" is not set. Signed-off-by: Pavel Tatashin <pasha.tatashin@soleen.com> Link: https://lore.kernel.org/lkml/20200515184434.8470-3-keescook@chromium.org/ Reviewed-by: Petr Mladek <pmladek@suse.com> Signed-off-by: Kees Cook <keescook@chromium.org>
2020-05-30printk: Collapse shutdown types into a single dump reasonKees Cook
To turn the KMSG_DUMP_* reasons into a more ordered list, collapse the redundant KMSG_DUMP_(RESTART|HALT|POWEROFF) reasons into KMSG_DUMP_SHUTDOWN. The current users already don't meaningfully distinguish between them, so there's no need to, as discussed here: https://lore.kernel.org/lkml/CA+CK2bAPv5u1ih5y9t5FUnTyximtFCtDYXJCpuyjOyHNOkRdqw@mail.gmail.com/ Link: https://lore.kernel.org/lkml/20200515184434.8470-2-keescook@chromium.org/ Reviewed-by: Pavel Tatashin <pasha.tatashin@soleen.com> Reviewed-by: Petr Mladek <pmladek@suse.com> Acked-by: Michael Ellerman <mpe@ellerman.id.au> (powerpc) Signed-off-by: Kees Cook <keescook@chromium.org>
2020-05-30pstore/ftrace: Provide ftrace log merging routineKees Cook
Move the ftrace log merging logic out of pstore/ram into pstore/ftrace so other backends can use it, like pstore/zone. Link: https://lore.kernel.org/lkml/20200510202436.63222-7-keescook@chromium.org/ Signed-off-by: Kees Cook <keescook@chromium.org>
2020-05-30pstore/ram: Refactor ftrace buffer mergingKees Cook
This changes the ftrace record merging code to be agnostic of pstore/ram, as the first step to making it available as a generic routine for other backends to use, such as pstore/zone. Link: https://lore.kernel.org/lkml/20200510202436.63222-6-keescook@chromium.org/ Signed-off-by: Kees Cook <keescook@chromium.org>
2020-05-30pstore/ram: Refactor DT size parsingKees Cook
Refactor device tree size parsing routines to be able to pass a non-zero default value for providing a configurable default for the coming "max_reason" field. Also rename the helpers, since we're not always parsing a size -- we're parsing a u32 and making sure it's not greater than INT_MAX. Link: https://lore.kernel.org/lkml/20200506211523.15077-4-keescook@chromium.org/ Link: https://lore.kernel.org/lkml/20200521205223.175957-1-tyhicks@linux.microsoft.com Signed-off-by: Kees Cook <keescook@chromium.org>
2020-05-30pstore/ram: Adjust module param permissions to reflect realityKees Cook
A couple module parameters had 0600 permissions, but changing them would have no impact on ramoops, so switch these to 0400 to reflect reality. Link: https://lore.kernel.org/lkml/20200506211523.15077-7-keescook@chromium.org/ Signed-off-by: Kees Cook <keescook@chromium.org>
2020-05-30pstore/platform: Move module params after declarationsKees Cook
It is easier to see how module params are used if they're near the variables they use. Link: https://lore.kernel.org/lkml/20200510202436.63222-4-keescook@chromium.org/ Signed-off-by: Kees Cook <keescook@chromium.org>
2020-05-30pstore/platform: Use backend name for console registrationKees Cook
If the pstore backend changes, there's no indication in the logs what the console is (it always says "pstore"). Instead, pass through the active backend's name. (Also adjust the selftest to match.) Link: https://lore.kernel.org/lkml/20200510202436.63222-5-keescook@chromium.org/ Link: https://lore.kernel.org/lkml/20200526135429.GQ12456@shao2-debian Signed-off-by: Kees Cook <keescook@chromium.org>
2020-05-30pstore/platform: Switch pstore_info::name to constKees Cook
In order to more cleanly pass around backend names, make the "name" member const. This means the module param needs to be dynamic (technically, it was before, so this actually cleans up a minor memory leak if a backend was specified and then gets unloaded.) Link: https://lore.kernel.org/lkml/20200510202436.63222-3-keescook@chromium.org/ Signed-off-by: Kees Cook <keescook@chromium.org>
2020-05-30pstore: Make sure console capturing will restartKees Cook
The CON_ENABLED flag gets cleared during unregister_console(), so make sure we already reset the console flags before calling register_console(), otherwise unloading and reloading a pstore backend will not restart console logging. Signed-off-by: Kees Cook <keescook@chromium.org>
2020-05-30pstore: Remove filesystem records when backend is unregisteredKees Cook
If a backend was unloaded without having first removed all its associated records in pstorefs, subsequent removals would crash while attempting to call into the now missing backend. Add automatic removal from the tree in pstore_unregister(), so that no references to the backend remain. Reported-by: Luis Henriques <lhenriques@suse.com> Link: https://lore.kernel.org/lkml/87o8yrmv69.fsf@suse.com Link: https://lore.kernel.org/lkml/20200506152114.50375-11-keescook@chromium.org/ Signed-off-by: Kees Cook <keescook@chromium.org>
2020-05-30pstore: Do not leave timer disabled for next backendKees Cook
The pstore.update_ms value was being disabled during pstore_unregister(), which would cause any prior value to go unnoticed on the next pstore_register(). Instead, just let del_timer() stop the timer, which was always sufficient. This additionally refactors the timer reset code and allows the timer to be enabled if the module parameter is changed away from the default. Link: https://lore.kernel.org/lkml/20200506152114.50375-10-keescook@chromium.org/ Signed-off-by: Kees Cook <keescook@chromium.org>
2020-05-30pstore: Add locking around superblock changesKees Cook
Nothing was protecting changes to the pstorefs superblock. Add locking and refactor away is_pstore_mounted(), instead using a helper to add a way to safely lock the pstorefs root inode during filesystem changes. Link: https://lore.kernel.org/lkml/20200506152114.50375-9-keescook@chromium.org/ Signed-off-by: Kees Cook <keescook@chromium.org>
2020-05-30mtd: spi-nor: sfdp: default to addr_width of 3 for configurable widthsPratyush Yadav
JESD216D.01 says that when the address width can be 3 or 4, it defaults to 3 and enters 4-byte mode when given the appropriate command. So, when we see a configurable width, default to 3 and let flash that default to 4 change it in a post-bfpt fixup. This fixes SMPT parsing for flashes with configurable address width. If the SMPT descriptor advertises variable address width, we use nor->addr_width as the address width. But since it was not set to any value from the SFDP table, the read command uses an address width of 0, resulting in an incorrect read being issued. Signed-off-by: Pratyush Yadav <p.yadav@ti.com> Signed-off-by: Tudor Ambarus <tudor.ambarus@microchip.com>
2020-05-30f2fs: fix wrong discard spaceChao Yu
Under heavy fsstress, we may triggle panic while issuing discard, because __check_sit_bitmap() detects that discard command may earse valid data blocks, the root cause is as below race stack described, since we removed lock when flushing quota data, quota data writeback may race with write_checkpoint(), so that it causes inconsistency in between cached discard entry and segment bitmap. - f2fs_write_checkpoint - block_operations - set_sbi_flag(sbi, SBI_QUOTA_SKIP_FLUSH) - f2fs_flush_sit_entries - add_discard_addrs - __set_bit_le(i, (void *)de->discard_map); - f2fs_write_data_pages - f2fs_write_single_data_page : inode is quota one, cp_rwsem won't be locked - f2fs_do_write_data_page - f2fs_allocate_data_block - f2fs_wait_discard_bio : discard entry has not been added yet. - update_sit_entry - f2fs_clear_prefree_segments - f2fs_issue_discard : add discard entry In order to fix this, this patch uses node_write to serialize f2fs_allocate_data_block and checkpoint. Fixes: 435cbab95e39 ("f2fs: fix quota_sync failure due to f2fs_lock_op") Signed-off-by: Chao Yu <yuchao0@huawei.com> Signed-off-by: Jaegeuk Kim <jaegeuk@kernel.org>
2020-05-30platform/x86: touchscreen_dmi: Add info for the Trekstor Yourbook C11BBernhard Übelacker
Add touchscreen info for the Trekstor Yourbook C11B. It seems to use the same touchscreen as the Primebook C11, so we only add a new DMI match. Cc: Otmar Meier <otmarjun.meier@nexgo.de> Reported-and-tested-by: Otmar Meier <otmarjun.meier@nexgo.de> Signed-off-by: Bernhard Übelacker <bernhardu@mailbox.org> Reviewed-by: Hans de Goede <hdegoede@redhat.com> Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
2020-05-30platform/x86: hp-wmi: Introduce HPWMI_POWER_FW_OR_HW as convenient shortcutAndy Shevchenko
For hardware blocked wireless switch we check two bits. Introduce HPWMI_POWER_FW_OR_HW enum to increase readability and for easier maintenance. Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
2020-05-30platform/x86: hp-wmi: Convert simple_strtoul() to kstrtou32()Andy Shevchenko
First of all, unsigned long can overflow u32 value on 64-bit machine. Second, simple_strtoul() doesn't check for overflow in the input. Convert simple_strtoul() to kstrtou32() to eliminate above issues. Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
2020-05-30platform/x86: hp-wmi: Refactor postcode_store() to follow standard patternsAndy Shevchenko
Refactor postcode_store() to follow standard patterns of error handling. While at it, switch to use kstrtobool(). Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>