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2021-04-19btrfs: simplify code flow in btrfs_delayed_inode_reserve_metadataNikolay Borisov
btrfs_block_rsv_add can return only ENOSPC since it's called with NO_FLUSH modifier. This so simplify the logic in btrfs_delayed_inode_reserve_metadata to exploit this invariant. Signed-off-by: Nikolay Borisov <nborisov@suse.com> Reviewed-by: David Sterba <dsterba@suse.com> [ add assert and comment ] Signed-off-by: David Sterba <dsterba@suse.com>
2021-04-19btrfs: remove btrfs_inode parameter from btrfs_delayed_inode_reserve_metadataNikolay Borisov
It's only used for tracepoint to obtain the inode number, but we already have the ino from btrfs_delayed_node::inode_id. Reviewed-by: Qu Wenruo <wqu@suse.com> Signed-off-by: Nikolay Borisov <nborisov@suse.com> Reviewed-by: David Sterba <dsterba@suse.com> Signed-off-by: David Sterba <dsterba@suse.com>
2021-04-19btrfs: simplify commit logic in try_flush_qgroupNikolay Borisov
It's no longer expected to call this function with an open transaction so all the workarounds concerning this can be removed. In fact it'll constitute a bug to call this function with a transaction already held so WARN in this case. Reviewed-by: Qu Wenruo <wqu@suse.com> Signed-off-by: Nikolay Borisov <nborisov@suse.com> Signed-off-by: David Sterba <dsterba@suse.com>
2021-04-19btrfs: scrub: drop a few function declarationsAnand Jain
Drop function declarations at the beginning of the file scrub.c. These functions are defined before they are used in the same file and don't need forward declaration. No functional changes. Reviewed-by: Johannes Thumshirn <johannes.thumshirn@wdc.com> Signed-off-by: Anand Jain <anand.jain@oracle.com> Reviewed-by: David Sterba <dsterba@suse.com> Signed-off-by: David Sterba <dsterba@suse.com>
2021-04-19btrfs: change return type to bool in btrfs_extent_readonlyAnand Jain
btrfs_extent_readonly() checks if the block group is readonly, the bool return type should be used. Reviewed-by: Johannes Thumshirn <johannes.thumshirn@wdc.com> Signed-off-by: Anand Jain <anand.jain@oracle.com> Reviewed-by: David Sterba <dsterba@suse.com> Signed-off-by: David Sterba <dsterba@suse.com>
2021-04-19btrfs: unexport btrfs_extent_readonly() and make it staticAnand Jain
btrfs_extent_readonly() is used by can_nocow_extent() in inode.c. So move it from extent-tree.c to inode.c and declare it as static. Signed-off-by: Anand Jain <anand.jain@oracle.com> Reviewed-by: David Sterba <dsterba@suse.com> Signed-off-by: David Sterba <dsterba@suse.com>
2021-04-19btrfs: replace open coded while loop with proper constructNikolay Borisov
btrfs_inc_block_group_ro wants to ensure that the current transaction is not running dirty block groups, if it is it waits and loops again. That logic is currently implemented using a goto label. Actually using a proper do {} while() construct doesn't hurt readability nor does it introduce excessive nesting and makes the relevant code stand out by being encompassed in the loop construct. No functional changes. Signed-off-by: Nikolay Borisov <nborisov@suse.com> Reviewed-by: David Sterba <dsterba@suse.com> Signed-off-by: David Sterba <dsterba@suse.com>
2021-04-19btrfs: replace offset_in_entry with in_rangeNikolay Borisov
No point in duplicating the functionality just use the generic helper that has the same semantics. Signed-off-by: Nikolay Borisov <nborisov@suse.com> Reviewed-by: David Sterba <dsterba@suse.com> Signed-off-by: David Sterba <dsterba@suse.com>
2021-04-19btrfs: make find_desired_extent take btrfs_inodeNikolay Borisov
Signed-off-by: Nikolay Borisov <nborisov@suse.com> Reviewed-by: David Sterba <dsterba@suse.com> Signed-off-by: David Sterba <dsterba@suse.com>
2021-04-19btrfs: make btrfs_replace_file_extents take btrfs_inodeNikolay Borisov
Signed-off-by: Nikolay Borisov <nborisov@suse.com> Reviewed-by: David Sterba <dsterba@suse.com> Signed-off-by: David Sterba <dsterba@suse.com>
2021-04-19btrfs: fix comment for btrfs ordered extent flag bitsQu Wenruo
There is small error in comment about BTRFS_ORDERED_* flags, added in commit 3c198fe06449 ("btrfs: rework the order of btrfs_ordered_extent::flags") but the fixup did not get merged in time. The 4 types are for ordered extent itself, not for direct io. Only 3 types support direct io, REGULAR/NOCOW/PREALLOC. Fix the comment to reflect that. Signed-off-by: Qu Wenruo <wqu@suse.com> Reviewed-by: David Sterba <dsterba@suse.com> Signed-off-by: David Sterba <dsterba@suse.com>
2021-04-19Merge series "spi: stm32-qspi: Fix and update" from ↵Mark Brown
<patrice.chotard@foss.st.com> Patrice Chotard <patrice.chotard@foss.st.com>: From: Patrice Chotard <patrice.chotard@foss.st.com> Christophe Kerello (1): spi: stm32-qspi: fix pm_runtime usage_count counter Patrice Chotard (2): spi: stm32-qspi: Trigger DMA only if more than 4 bytes to transfer spi: stm32-qspi: Add dirmap support drivers/spi/spi-stm32-qspi.c | 106 +++++++++++++++++++++++++++-------- 1 file changed, 84 insertions(+), 22 deletions(-) -- 2.17.1 _______________________________________________ linux-arm-kernel mailing list linux-arm-kernel@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
2021-04-19Merge tag 'qcom-dts-for-5.13-2' of ↵Arnd Bergmann
git://git.kernel.org/pub/scm/linux/kernel/git/qcom/linux into arm/dt More Qualcomm DTS updates for 5.13 This adds CPUfreq, interconnect providers, IPC, remoteproc and IPA to the SDX55 platform and then adds board files for the Telit FN980 TLB and Thundercomm TurboX T55. * tag 'qcom-dts-for-5.13-2' of git://git.kernel.org/pub/scm/linux/kernel/git/qcom/linux: ARM: dts: qcom: sdx55: add IPA information ARM: dts: qcom: sdx55: Add basic devicetree support for Thundercomm T55 dt-bindings: arm: qcom: Add binding for Thundercomm T55 kit ARM: dts: qcom: sdx55: Add basic devicetree support for Telit FN980 TLB dt-bindings: arm: qcom: Add binding for Telit FN980 TLB board ARM: dts: qcom: sdx55: Add Modem remoteproc node ARM: dts: qcom: Fix node name for NAND controller node ARM: dts: qcom: sdx55: Add interconnect nodes ARM: dts: qcom: sdx55: Add SCM node dt-bindings: firmware: scm: Add compatible for SDX55 ARM: dts: qcom: sdx55: Add IMEM and PIL info region ARM: dts: qcom: sdx55: Add modem SMP2P node ARM: dts: qcom: sdx55: Add CPUFreq support ARM: dts: qcom: sdx55: Add support for APCS block ARM: dts: qcom: sdx55: Add support for A7 PLL clock Link: https://lore.kernel.org/r/20210419150956.860423-1-bjorn.andersson@linaro.org Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2021-04-19arm64: dts: qcom: sc7180: Update iommu property for simultaneous playbackV Sujith Kumar Reddy
Update iommu property in lpass cpu node for supporting simultaneous playback on headset and speaker. Reviewed-by: Stephen Boyd <swboyd@chromium.org> Signed-off-by: V Sujith Kumar Reddy <vsujithk@codeaurora.org> Signed-off-by: Srinivasa Rao Mandadapu <srivasam@codeaurora.org> Link: https://lore.kernel.org/r/20210406163330.11996-1-srivasam@codeaurora.org Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
2021-04-19arm64: dts: qcom: sc7180: pompom: Add "dmic_clk_en" + sound modelDouglas Anderson
Match what's downstream for this board. Reviewed-by: Matthias Kaehlcke <mka@chromium.org> Reviewed-by: Stephen Boyd <swboyd@chromium.org> Cc: Srinivasa Rao Mandadapu <srivasam@codeaurora.org> Cc: Ajit Pandey <ajitp@codeaurora.org> Cc: Judy Hsiao <judyhsiao@chromium.org> Cc: Cheng-Yi Chiang <cychiang@chromium.org> Cc: Stephen Boyd <swboyd@chromium.org> Cc: Matthias Kaehlcke <mka@chromium.org> Signed-off-by: Douglas Anderson <dianders@chromium.org> Link: https://lore.kernel.org/r/20210315133924.v2.2.If218189eff613a6c48ba12d75fad992377d8f181@changeid Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
2021-04-19arm64: dts: qcom: sc7180: coachz: Add "dmic_clk_en"Douglas Anderson
This was present downstream. Add upstream too. NOTE: upstream I managed to get some sort of halfway state and got one pinctrl entry in the coachz-r1 device tree. Remove that as part of this since it's now in the dtsi. Reviewed-by: Matthias Kaehlcke <mka@chromium.org> Reviewed-by: Stephen Boyd <swboyd@chromium.org> Cc: Srinivasa Rao Mandadapu <srivasam@codeaurora.org> Cc: Ajit Pandey <ajitp@codeaurora.org> Cc: Judy Hsiao <judyhsiao@chromium.org> Cc: Cheng-Yi Chiang <cychiang@chromium.org> Cc: Stephen Boyd <swboyd@chromium.org> Cc: Matthias Kaehlcke <mka@chromium.org> Signed-off-by: Douglas Anderson <dianders@chromium.org> Link: https://lore.kernel.org/r/20210315133924.v2.1.I601a051cad7cfd0923e55b69ef7e5748910a6096@changeid Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
2021-04-19ARM: dts: mstar: Add a dts for M5Stack UnitV2Daniel Palmer
M5Stack are releasing a new widget based on the SigmaStar SSD202D. We have some support for the SSD202D so lets add a dts for it. Signed-off-by: Daniel Palmer <daniel@0x0f.com> Link: https://m5stack-store.myshopify.com/products/unitv2-ai-camera-gc2145 Link: https://lore.kernel.org/r/20210417011015.2105280-4-daniel@0x0f.com' Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2021-04-19dt-bindings: arm: mstar: Add compatible for M5Stack UnitV2Daniel Palmer
Add a compatible for the M5Stack UnitV2 that is based on the SigmaStar SSD202D (inifinity2m). Signed-off-by: Daniel Palmer <daniel@0x0f.com> Link: https://lore.kernel.org/r/20210417011015.2105280-3-daniel@0x0f.com' Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2021-04-19dt-bindings: vendor-prefixes: Add vendor prefix for M5StackDaniel Palmer
M5Stack make various modules for STEM, Makers, IoT. Their UnitV2 is based on a SigmaStar SSD202D SoC which we already have some minimal support for so add a prefix in preparation for UnitV2 board support. Signed-off-by: Daniel Palmer <daniel@0x0f.com> Link: https://m5stack.com/ Link: https://lore.kernel.org/r/20210417011015.2105280-2-daniel@0x0f.com' Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2021-04-19arm64: dts: mt8183: fix dtbs_check warningMatthias Brugger
Fix unit names to make dtbs_check happy. Signed-off-by: Matthias Brugger <matthias.bgg@gmail.com> Reviewed-by: Enric Balletbo i Serra <enric.balletbo@collabora.com> Link: https://lore.kernel.org/r/20210414144643.17435-2-matthias.bgg@kernel.org Link: https://lore.kernel.org/r/20210416143923.23406-3-matthias.bgg@kernel.org' Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2021-04-19arm64: dts: mt8183-pumpkin: fix dtbs_check warningMatthias Brugger
Fix unit names to make dtbs_check happy. Signed-off-by: Matthias Brugger <matthias.bgg@gmail.com> Reviewed-by: Enric Balletbo i Serra <enric.balletbo@collabora.com> Link: https://lore.kernel.org/r/20210414144643.17435-1-matthias.bgg@kernel.org Link: https://lore.kernel.org/r/20210416143923.23406-2-matthias.bgg@kernel.org' Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2021-04-19Merge tag 'memory-controller-drv-5.13-2' of ↵Arnd Bergmann
git://git.kernel.org/pub/scm/linux/kernel/git/krzk/linux-mem-ctrl into arm/drivers Memory controller drivers for v5.13, part two 1. Renesas RPC: fix possible NULL pointer. 2. Exynos5422 DMC: add proper error checking for clk_prepare. 3. Mediatek SMI: use device-links instead of explicit PM runtime calls. * tag 'memory-controller-drv-5.13-2' of git://git.kernel.org/pub/scm/linux/kernel/git/krzk/linux-mem-ctrl: memory: mtk-smi: Add device-link between smi-larb and smi-common memory: samsung: exynos5422-dmc: handle clk_set_parent() failure memory: renesas-rpc-if: fix possible NULL pointer dereference of resource Link: https://lore.kernel.org/r/20210415065514.7385-1-krzysztof.kozlowski@canonical.com Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2021-04-19spi: Handle SPI device setup callback failure.Joe Burmeister
If the setup callback failed, but the controller has auto_runtime_pm and set_cs, the setup failure could be missed. Signed-off-by: Joe Burmeister <joe.burmeister@devtank.co.uk> Link: https://lore.kernel.org/r/20210419130631.4586-1-joe.burmeister@devtank.co.uk Signed-off-by: Mark Brown <broonie@kernel.org>
2021-04-19spi: sync up initial chipselect stateDavid Bauer
When initially probing the SPI slave device, the call for disabling an SPI device without the SPI_CS_HIGH flag is not applied, as the condition for checking whether or not the state to be applied equals the one currently set evaluates to true. This however might not necessarily be the case, as the chipselect might be active. Add a force flag to spi_set_cs which allows to override this early exit condition. Set it to false everywhere except when called from spi_setup to sync up the initial CS state. Fixes commit d40f0b6f2e21 ("spi: Avoid setting the chip select if we don't need to") Signed-off-by: David Bauer <mail@david-bauer.net> Link: https://lore.kernel.org/r/20210416195956.121811-1-mail@david-bauer.net Signed-off-by: Mark Brown <broonie@kernel.org>
2021-04-19spi: stm32-qspi: Add dirmap supportPatrice Chotard
Add stm32_qspi_dirmap_read() and stm32_qspi_dirmap_create() to get dirmap support. Update the exec_op callback which doens't allow anymore memory map access. Memory map access are only available through the dirmap_read callback. Signed-off-by: Patrice Chotard <patrice.chotard@foss.st.com> Link: https://lore.kernel.org/r/20210419121541.11617-4-patrice.chotard@foss.st.com Signed-off-by: Mark Brown <broonie@kernel.org>
2021-04-19spi: stm32-qspi: Trigger DMA only if more than 4 bytes to transferPatrice Chotard
In order to optimize accesses to spi flashes, trigger a DMA only if more than 4 bytes has to be transferred. DMA transfer preparation's cost becomes negligible above 4 bytes to transfer. Below this threshold, indirect transfer give more throughput. mtd_speedtest shows that page write throughtput increases : - from 779 to 853 KiB/s (~9.5%) with s25fl512s SPI-NOR. - from 5283 to 5666 KiB/s (~7.25%) with Micron SPI-NAND. Signed-off-by: Christophe Kerello <christophe.kerello@foss.st.com> Signed-off-by: Patrice Chotard <patrice.chotard@foss.st.com> Link: https://lore.kernel.org/r/20210419121541.11617-3-patrice.chotard@foss.st.com Signed-off-by: Mark Brown <broonie@kernel.org>
2021-04-19spi: stm32-qspi: fix pm_runtime usage_count counterChristophe Kerello
pm_runtime usage_count counter is not well managed. pm_runtime_put_autosuspend callback drops the usage_counter but this one has never been increased. Add pm_runtime_get_sync callback to bump up the usage counter. It is also needed to use pm_runtime_force_suspend and pm_runtime_force_resume APIs to handle properly the clock. Fixes: 9d282c17b023 ("spi: stm32-qspi: Add pm_runtime support") Signed-off-by: Christophe Kerello <christophe.kerello@foss.st.com> Cc: stable@vger.kernel.org Link: https://lore.kernel.org/r/20210419121541.11617-2-patrice.chotard@foss.st.com Signed-off-by: Mark Brown <broonie@kernel.org>
2021-04-19x86/build: Disable HIGHMEM64G selection for M486SXMaciej W. Rozycki
Fix a regression caused by making the 486SX separately selectable in Kconfig, for which the HIGHMEM64G setting has not been updated and therefore has become exposed as a user-selectable option for the M486SX configuration setting unlike with original M486 and all the other settings that choose non-PAE-enabled processors: High Memory Support > 1. off (NOHIGHMEM) 2. 4GB (HIGHMEM4G) 3. 64GB (HIGHMEM64G) choice[1-3?]: With the fix in place the setting is now correctly removed: High Memory Support > 1. off (NOHIGHMEM) 2. 4GB (HIGHMEM4G) choice[1-2?]: [ bp: Massage commit message. ] Fixes: 87d6021b8143 ("x86/math-emu: Limit MATH_EMULATION to 486SX compatibles") Signed-off-by: Maciej W. Rozycki <macro@orcam.me.uk> Signed-off-by: Borislav Petkov <bp@suse.de> Cc: stable@vger.kernel.org # v5.5+ Link: https://lkml.kernel.org/r/alpine.DEB.2.21.2104141221340.44318@angie.orcam.me.uk
2021-04-19m68k: sun3x: Remove unneeded semicolonWan Jiabing
Fix the following coccicheck warning: ./arch/m68k/include/asm/sun3xflop.h:109:2-3: Unneeded semicolon Signed-off-by: Wan Jiabing <wanjiabing@vivo.com> Link: https://lore.kernel.org/r/20210415031450.23379-1-wanjiabing@vivo.com Signed-off-by: Geert Uytterhoeven <geert@linux-m68k.org>
2021-04-19platform/x86: touchscreen_dmi: Add info for the Teclast Tbook 11 tabletHans de Goede
Add touchscreen info for the Teclast Tbook 11 tablet. This includes info for getting the firmware directly from the UEFI, so that the user does not need to manually install the firmware in /lib/firmware/silead. This change will make the touchscreen on these devices work OOTB, without requiring any manual setup. Signed-off-by: Hans de Goede <hdegoede@redhat.com> Link: https://lore.kernel.org/r/20210417173105.4134-1-hdegoede@redhat.com
2021-04-19platform/x86: intel_pmc_core: Add support for Alder Lake PCH-PDavid E. Box
Alder PCH-P is based on Tiger Lake PCH. Signed-off-by: David E. Box <david.e.box@linux.intel.com> Reviewed-by: Hans de Goede <hdegoede@redhat.com> Acked-by: Rajneesh Bhardwaj <irenic.rajneesh@gmail.com> Link: https://lore.kernel.org/r/20210417031252.3020837-10-david.e.box@linux.intel.com Signed-off-by: Hans de Goede <hdegoede@redhat.com>
2021-04-19platform/x86: intel_pmc_core: Add LTR registers for Tiger LakeGayatri Kammela
Just like Ice Lake, Tiger Lake uses Cannon Lake's LTR information and supports a few additional registers. Hence add the LTR registers specific to Tiger Lake to the cnp_ltr_show_map[]. Also adjust the number of LTR IPs for Tiger Lake to the correct amount. Signed-off-by: Gayatri Kammela <gayatri.kammela@intel.com> Signed-off-by: David E. Box <david.e.box@linux.intel.com> Reviewed-by: Hans de Goede <hdegoede@redhat.com> Acked-by: Rajneesh Bhardwaj <irenic.rajneesh@gmail.com> Link: https://lore.kernel.org/r/20210417031252.3020837-9-david.e.box@linux.intel.com Signed-off-by: Hans de Goede <hdegoede@redhat.com>
2021-04-19platform/x86: intel_pmc_core: Add option to set/clear LPM modeDavid E. Box
By default the Low Power Mode (LPM or sub-state) status registers will latch condition status on every entry into Package C10. This is configurable in the PMC to allow latching on any achievable sub-state. Add a debugfs file to support this. Also add the option to clear the status registers to 0. Clearing the status registers before testing removes ambiguity around when the current values were set. The new file, latch_lpm_mode, looks like this: [c10] S0i2.0 S0i3.0 S0i2.1 S0i3.1 S0i3.2 clear Signed-off-by: David E. Box <david.e.box@linux.intel.com> Reviewed-by: Hans de Goede <hdegoede@redhat.com> Link: https://lore.kernel.org/r/20210417031252.3020837-8-david.e.box@linux.intel.com Signed-off-by: Hans de Goede <hdegoede@redhat.com>
2021-04-19platform/x86: intel_pmc_core: Add requirements file to debugfsGayatri Kammela
Add the debugfs file, substate_requirements, to view the low power mode (LPM) requirements for each enabled mode alongside the last latched status of the condition. After this patch, the new file will look like this: Element | S0i2.0 | S0i3.0 | S0i2.1 | S0i3.1 | S0i3.2 | Status | USB2PLL_OFF_STS | Required | Required | Required | Required | Required | | PCIe/USB3.1_Gen2PLL_OFF_STS | Required | Required | Required | Required | Required | | PCIe_Gen3PLL_OFF_STS | Required | Required | Required | Required | Required | Yes | OPIOPLL_OFF_STS | Required | Required | Required | Required | Required | Yes | OCPLL_OFF_STS | Required | Required | Required | Required | Required | Yes | MainPLL_OFF_STS | | Required | | Required | Required | | Signed-off-by: Gayatri Kammela <gayatri.kammela@intel.com> Co-developed-by: David E. Box <david.e.box@linux.intel.com> Signed-off-by: David E. Box <david.e.box@linux.intel.com> Reviewed-by: Hans de Goede <hdegoede@redhat.com> Link: https://lore.kernel.org/r/20210417031252.3020837-7-david.e.box@linux.intel.com Signed-off-by: Hans de Goede <hdegoede@redhat.com>
2021-04-19platform/x86: intel_pmc_core: Get LPM requirements for Tiger LakeGayatri Kammela
Platforms that support low power modes (LPM) such as Tiger Lake maintain requirements for each sub-state that a readable in the PMC. However, unlike LPM status registers, requirement registers are not memory mapped but are available from an ACPI _DSM. Collect the requirements for Tiger Lake using the _DSM method and store in a buffer. Signed-off-by: Gayatri Kammela <gayatri.kammela@intel.com> Co-developed-by: David E. Box <david.e.box@linux.intel.com> Signed-off-by: David E. Box <david.e.box@linux.intel.com> Reviewed-by: Hans de Goede <hdegoede@redhat.com> Link: https://lore.kernel.org/r/20210417031252.3020837-6-david.e.box@linux.intel.com Signed-off-by: Hans de Goede <hdegoede@redhat.com>
2021-04-19platform/x86: intel_pmc_core: Show LPM residency in microsecondsGayatri Kammela
Modify the low power mode (LPM or sub-state) residency counters to display in microseconds just like the slp_s0_residency counter. The granularity of the counter is approximately 30.5us per tick. Double this value then divide by two to maintain accuracy. Signed-off-by: Gayatri Kammela <gayatri.kammela@intel.com> Signed-off-by: David E. Box <david.e.box@linux.intel.com> Reviewed-by: Hans de Goede <hdegoede@redhat.com> Reviewed-by: Rajneesh Bhardwaj <irenic.rajneesh@gmail.com> Link: https://lore.kernel.org/r/20210417031252.3020837-5-david.e.box@linux.intel.com Signed-off-by: Hans de Goede <hdegoede@redhat.com>
2021-04-19platform/x86: intel_pmc_core: Handle sub-states genericallyGayatri Kammela
The current implementation of pmc_core_substate_res_show() is written specifically for Tiger Lake. However, new platform will also have sub-states and may support different modes. Therefore rewrite the code to handle sub-states generically. Obtain the number and type of enabled states form the PMC. Use the Low Power Mode (LPM) priority register to store the states in order from shallowest to deepest for displays. Add a for_each macro to simplify this. While changing the sub-state display it makes sense to show only the "enabled" sub-states instead of showing all possible ones. After this patch, the debugfs file looks like this: Substate Residency S0i2.0 0 S0i3.0 0 S0i2.1 9329279 S0i3.1 0 S0i3.2 0 Suggested-by: David E. Box <david.e.box@linux.intel.com> Signed-off-by: Gayatri Kammela <gayatri.kammela@intel.com> Signed-off-by: David E. Box <david.e.box@linux.intel.com> Reviewed-by: Hans de Goede <hdegoede@redhat.com> Acked-by: Rajneesh Bhardwaj <irenic.rajneesh@gmail.com> Link: https://lore.kernel.org/r/20210417031252.3020837-4-david.e.box@linux.intel.com Signed-off-by: Hans de Goede <hdegoede@redhat.com>
2021-04-19platform/x86: intel_pmc_core: Remove global struct pmc_devDavid E. Box
The intel_pmc_core driver did not always bind to a device which meant it lacked a struct device that could be used to maintain driver data. So a global instance of struct pmc_dev was used for this purpose and functions accessed this directly. Since the driver now binds to an ACPI device, remove the global pmc_dev in favor of one that is allocated during probe. Modify users of the global to obtain the object by argument instead. Signed-off-by: David E. Box <david.e.box@linux.intel.com> Reviewed-by: Hans de Goede <hdegoede@redhat.com> Reviewed-by: Rajneesh Bhardwaj <irenic.rajneesh@gmail.com> Link: https://lore.kernel.org/r/20210417031252.3020837-3-david.e.box@linux.intel.com Signed-off-by: Hans de Goede <hdegoede@redhat.com>
2021-04-19platform/x86: intel_pmc_core: Don't use global pmcdev in quirksDavid E. Box
The DMI callbacks, used for quirks, currently access the PMC by getting the address a global pmc_dev struct. Instead, have the callbacks set a global quirk specific variable. In probe, after calling dmi_check_system(), pass pmc_dev to a function that will handle each quirk if its variable condition is met. This allows removing the global pmc_dev later. Signed-off-by: David E. Box <david.e.box@linux.intel.com> Reviewed-by: Hans de Goede <hdegoede@redhat.com> Reviewed-by: Rajneesh Bhardwaj <irenic.rajneesh@gmail.com> Link: https://lore.kernel.org/r/20210417031252.3020837-2-david.e.box@linux.intel.com Signed-off-by: Hans de Goede <hdegoede@redhat.com>
2021-04-19mmc: meson-gx: replace WARN_ONCE with dev_warn_once about scatterlist size ↵Neil Armstrong
alignment in block mode Since commit e085b51c74cc ("mmc: meson-gx: check for scatterlist size alignment in block mode"), support for SDIO SD_IO_RW_EXTENDED transferts are properly filtered but some driver like brcmfmac still gives a block sg buffer size not aligned with SDIO block, triggerring a WARN_ONCE() with scary stacktrace even if the transfer works fine but with possible degraded performances. Simply replace with dev_warn_once() to inform user this should be fixed to avoid degraded performance. This should be ultimately fixed in brcmfmac, but since it's only a performance issue the warning should be removed. Fixes: e085b51c74cc ("mmc: meson-gx: check for scatterlist size alignment in block mode") Reported-by: Marek Szyprowski <m.szyprowski@samsung.com> Signed-off-by: Neil Armstrong <narmstrong@baylibre.com> Link: https://lore.kernel.org/r/20210416094347.2015896-1-narmstrong@baylibre.com Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
2021-04-18Linux 5.12-rc8v5.12-rc8Linus Torvalds
2021-04-18Merge tag 'arm-fixes-5.12-3' of ↵Linus Torvalds
git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc Pull ARM SoC fixes from Arnd Bergmann: "Another smaller set of fixes for three of the Arm platforms: TI OMAP: Fix swapped mmc device order also for omap3 that got changed with the recent PROBE_PREFER_ASYNCHRONOUS changes. While eventually the aliases should be board specific, all the mmc device instances are all there in the SoC, and we do probe them by default so that PM runtime can idle the devices if left enabled from the bootloader. Qualcomm Snapdragon: This bypasses the recently introduced interconnect handling in the GENI (serial engine) driver when running off ACPI, as this causes the GENI probe to fail and the Lenovo Yoga C630 to boot without keyboard and touchpad. Allwinner: One 32kHz clock fix for the beelink gs1, a CD polarity fix for the SoPine, some MAINTAINERS maintainance, and a clk / reset switch to our headers" * tag 'arm-fixes-5.12-3' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc: arm64: dts: allwinner: h6: beelink-gs1: Remove ext. 32 kHz osc reference MAINTAINERS: Match on allwinner keyword MAINTAINERS: Add our new mailing-list arm64: dts: allwinner: Fix SD card CD GPIO for SOPine systems arm64: dts: allwinner: h6: Switch to macros for RSB clock/reset indices ARM: OMAP2+: Fix uninitialized sr_inst ARM: dts: Fix swapped mmc order for omap3 ARM: OMAP2+: Fix warning for omap_init_time_of() soc: qcom: geni: shield geni_icc_get() for ACPI boot
2021-04-18s390/atomic,cmpxchg: always inline __xchg/__cmpxchgHeiko Carstens
Make sure to always inline __xchg() and __cmpxchg() otherwise the compiler might decide to generate out-of-line versions which will fail at link time: s390-linux-ld: lib/atomic64_test.o: in function `__xchg': >> atomic64_test.c:(.text.unlikely+0xa4): undefined reference to `__xchg_called_with_bad_pointer' Reported-by: kernel test robot <lkp@intel.com> Link: https://lore.kernel.org/linux-mm/202104170449.SIIFKVjT-lkp@intel.com/ Fixes: d2b1f6d2d350 ("s390/cmpxchg: get rid of gcc atomic builtins") Signed-off-by: Heiko Carstens <hca@linux.ibm.com>
2021-04-18s390/smp: fix do_restart() prototypeAlexander Gordeev
Funciton do_restart() is a callback invoked from the restart CPU routine and passed a single parameter. Signed-off-by: Alexander Gordeev <agordeev@linux.ibm.com> Signed-off-by: Heiko Carstens <hca@linux.ibm.com>
2021-04-18s390: get rid of oprofile leftoversMarc Zyngier
perf_pmu_name() and perf_num_counters() are unused. Drop them. Signed-off-by: Marc Zyngier <maz@kernel.org> Link: https://lore.kernel.org/r/20210414134409.1266357-4-maz@kernel.org Signed-off-by: Heiko Carstens <hca@linux.ibm.com>
2021-04-18Merge tag 'for-linus' of git://git.armlinux.org.uk/~rmk/linux-armLinus Torvalds
Pull ARM fixes from Russell King: - Halve maximum number of CPUs if DEBUG_KMAP_LOCAL is enabled - Fix conversion for_each_membock() to for_each_mem_range() - Fix footbridge PCI mapping - Avoid uprobes hooking on thumb instructions * tag 'for-linus' of git://git.armlinux.org.uk/~rmk/linux-arm: ARM: 9071/1: uprobes: Don't hook on thumb instructions ARM: footbridge: fix PCI interrupt mapping ARM: 9069/1: NOMMU: Fix conversion for_each_membock() to for_each_mem_range() ARM: 9063/1: mm: reduce maximum number of CPUs if DEBUG_KMAP_LOCAL is enabled
2021-04-18ARM: 9071/1: uprobes: Don't hook on thumb instructionsFredrik Strupe
Since uprobes is not supported for thumb, check that the thumb bit is not set when matching the uprobes instruction hooks. The Arm UDF instructions used for uprobes triggering (UPROBE_SWBP_ARM_INSN and UPROBE_SS_ARM_INSN) coincidentally share the same encoding as a pair of unallocated 32-bit thumb instructions (not UDF) when the condition code is 0b1111 (0xf). This in effect makes it possible to trigger the uprobes functionality from thumb, and at that using two unallocated instructions which are not permanently undefined. Signed-off-by: Fredrik Strupe <fredrik@strupe.net> Cc: stable@vger.kernel.org Fixes: c7edc9e326d5 ("ARM: add uprobes support") Signed-off-by: Russell King <rmk+kernel@armlinux.org.uk>
2021-04-18Drivers: hv: vmbus: Check for pending channel interrupts before taking a CPU ↵Andrea Parri (Microsoft)
offline Check that enough time has passed such that the modify channel message has been processed before taking a CPU offline. Signed-off-by: Andrea Parri (Microsoft) <parri.andrea@gmail.com> Reviewed-by: Michael Kelley <mikelley@microsoft.com> Link: https://lore.kernel.org/r/20210416143449.16185-4-parri.andrea@gmail.com Signed-off-by: Wei Liu <wei.liu@kernel.org>
2021-04-18Drivers: hv: vmbus: Drivers: hv: vmbus: Introduce ↵Andrea Parri (Microsoft)
CHANNELMSG_MODIFYCHANNEL_RESPONSE Introduce the CHANNELMSG_MODIFYCHANNEL_RESPONSE message type, and code to receive and process such a message. Signed-off-by: Andrea Parri (Microsoft) <parri.andrea@gmail.com> Reviewed-by: Michael Kelley <mikelley@microsoft.com> Link: https://lore.kernel.org/r/20210416143449.16185-3-parri.andrea@gmail.com Signed-off-by: Wei Liu <wei.liu@kernel.org>
2021-04-18Drivers: hv: vmbus: Introduce and negotiate VMBus protocol version 5.3Andrea Parri (Microsoft)
Hyper-V has added VMBus protocol version 5.3. Allow Linux guests to negotiate the new version on version of Hyper-V that support it. Signed-off-by: Andrea Parri (Microsoft) <parri.andrea@gmail.com> Reviewed-by: Michael Kelley <mikelley@microsoft.com> Link: https://lore.kernel.org/r/20210416143449.16185-2-parri.andrea@gmail.com Signed-off-by: Wei Liu <wei.liu@kernel.org>
generated by cgit (git 2.34.1) at 2025-09-13 09:48:40 +0000