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2016-07-14drm/nouveau/dma/gp100: initial implementationBen Skeggs
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2016-07-14drm/nouveau/secboot/gm200: initial supportBen Skeggs
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2016-07-14drm/nouveau/ltc/gp100: initial supportBen Skeggs
Due to the GPU preventing us from touching NV_PLTCG_LTCS_LTSS_CBC_BASE, we cannot provide CBC/ZBC support without signed PMU firmware to handle the task for us... Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2016-07-14drm/nouveau/ibus/gp100: initial supportBen Skeggs
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2016-07-14drm/nouveau/i2c/gm204: initial supportBen Skeggs
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2016-07-14drm/nouveau/gpio/gp100: initial supportBen Skeggs
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2016-07-14drm/nouveau/fuse/gp100: initial supportBen Skeggs
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2016-07-14drm/nouveau/bus/gp100: initial supportBen Skeggs
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2016-07-14drm/nouveau/bar/gp100: initial supportBen Skeggs
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2016-07-14drm/nouveau/mmu/gp100: initial supportBen Skeggs
GP100 still supports the previous generations' page table layout, which we will temporarily make use of here. Proper support for the new MMU layout requires some rework to the common MMU code, which is in progress. Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2016-07-14drm/nouveau/fb/gp100: initial supportBen Skeggs
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2016-07-14drm/nouveau/imem/gp100: initial implementationBen Skeggs
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2016-07-14drm/nouveau/devinit/gp100: initial supportBen Skeggs
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2016-07-14drm/nouveau/bios/rammap: 32-bit bios pointersBen Skeggs
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2016-07-14drm/nouveau/bios/pll: initial support for BIT 'C' version 2Ben Skeggs
Just enough to get at the PLL table. Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2016-07-14drm/nouveau/bios/dp: initial support for 4.2Ben Skeggs
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2016-07-14drm/nouveau/bios/gp100: initial supportBen Skeggs
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2016-07-14drm/nouveau/tmr/gp100: initial supportBen Skeggs
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2016-07-14drm/nouveau/pci/gp100: initial supportBen Skeggs
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2016-07-14drm/nouveau/mc/gp100: initial supportBen Skeggs
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2016-07-14drm/nouveau/top/gp100: initial supportBen Skeggs
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2016-07-14drm/nouveau/core: recognise GP100 chipsetBen Skeggs
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2016-07-14drm/nouveau/core: increase maximum nvenc instances to 3Ben Skeggs
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2016-07-14drm/nouveau/core: increase maximum ce instances to 6Ben Skeggs
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2016-07-14drm/nouveau/fb/gf100-: allow selection of an alternate big page sizeBen Skeggs
GFxxx/GM1xx support the selection of 64/128KiB big pages globally. GM2xx supports the same, as well as another mode where the page size can be selected per-instance. We default to 128KiB pages (With per-instance for GM200, but the current code selects 128KiB there already) as the MMU code isn't currently able to handle otherwise. Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2016-07-14drm/nouveau: prevent oops if no mmu subdev presentBen Skeggs
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2016-07-14drm/nouveau/disp/g94: implement workaround for dvi issue on fx380Ben Skeggs
Fixes the second DVI output on Quadro FX380. Thanks to NVIDIA for providing the details on the full workaround. Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2016-07-14drm/nouveau/bios: pointers beyond end of first image need special handlingBen Skeggs
Makes common the code that was previously used by the PMU table parsing, as it appears other tables need this too. Not much of an idea what this is all about... Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2016-07-14drm/nouveau/bios: guard against out-of-bounds accesses to imageBen Skeggs
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2016-07-14drm/nouveau/fifo/gk104-: translate engidx into human-readable name in debug ↵Ben Skeggs
output Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2016-07-14drm/nouveau/disp/nv50-: fix lookup of udisp table under certain circumstancesBen Skeggs
Some VBIOS have separate tables for each link of a given output path, which means we have to specify the specific link we're using instead of all possible links. Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2016-07-14drm/nouveau/ltc/gm107-: decode interrupt status to human-readable stringsBen Skeggs
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2016-07-14drm/nouveau/gr/gk20a: delete unneeded second newlineJulia Lawall
Signed-off-by: Julia Lawall <Julia.Lawall@lip6.fr> Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2016-07-14drm/nouveau/clk/gf100: Read secondary bypass postdiv when requiredRoy Spliet
v2: fix typo it's -> its Signed-off-by: Roy Spliet <nouveau@spliet.org> Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2016-07-14drm/nouveau/clk/gf100-: Clean up PLL locking testRoy Spliet
Corresponds with GT215. Don't rely on the lock test logic being unconditionally enabled, and disable test logic when done (presumably to save power). v2: Remove warning, nvkm_msec already warns on time-out Signed-off-by: Roy Spliet <nouveau@spliet.org> Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2016-07-14drm/nouveau/secboot: lazy-load firmware and be more resilientAlexandre Courbot
Defer the loading of firmware files to the chip-specific part of secure boot. This allows implementations to retry loading firmware if the first attempt failed ; for the GM200 implementation, this happens when trying to reset a falcon, typically in reaction to GR init. Firmware loading may fail for a variety of reasons, such as the filesystem where they reside not being ready at init time. This new behavior allows GR to be initialized the next time we try to use it if the firmware has become available. Signed-off-by: Alexandre Courbot <acourbot@nvidia.com> Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2016-07-14drm/nouveau/secboot/gm200: make firmware loading re-callableAlexandre Courbot
Make it possible to call gm20x_secboot_prepare_blobs() several times after either success or failure without re-building already existing blobs. The function will now try to load firmware files that have previously failed before returning success. Signed-off-by: Alexandre Courbot <acourbot@nvidia.com> Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2016-07-14drm/nouveau/gr/gf100: handle secure boot errorsAlexandre Courbot
Handle and propagate secure boot errors. Failure to do so results in Nouveau incorrectly believing init has succeeded and a completely black display during boot. If we propagate the error, GR init will fail and the user will at least have a working display. Signed-off-by: Alexandre Courbot <acourbot@nvidia.com> Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2016-07-14drm/nouveau/secboot: fix kerneldoc for secure boot structuresAlexandre Courbot
Some members were documented in the wrong structure. Signed-off-by: Alexandre Courbot <acourbot@nvidia.com> Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2016-07-14drm/nouveau/hwmon: add in_min and in_maxKarol Herbst
it is a little help for hardware monitoring tools Signed-off-by: Karol Herbst <karolherbst@gmail.de> Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2016-07-14drm/nouveau/volt: save the voltage range we are able to setKarol Herbst
We shouldn't set voltages below the min or above the max voltage the gpu is able to set, so save the range for future lookups. Signed-off-by: Karol Herbst <karolherbst@gmail.de> Reviewed-by: Martin Peres <martin.peres@free.fr> Tested-by: Pierre Moreau <pierre.morrow@free.fr> Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2016-07-14drm/nouveau/clk/gm20b: add glitchless and DFS supportAlexandre Courbot
This patch adds support for advanced features supported by the Noise-Aware PLL of Maxwell. Glitchless switch allows the PL field to be updated without disabling the PLL first if the SYNC_MODE bit of the CFG register is set. More significantly, DFS allows the PLL to monitor the actual input voltage and to dynamically lower the output frequency accordingly. This allows the clock to be more tolerant of lower voltages. These improvements are only supported for Tegra speedos >= 1. Also add the voltage table that is suitable for GM20B's NAPLL. This change needs to be done atomically for the right voltages to be used by the clock driver. v2. Fix build on non-Tegra platforms Signed-off-by: Alexandre Courbot <acourbot@nvidia.com> Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2016-07-14drm/nouveau/clk/gk20a: rename constructorAlexandre Courbot
Strip the _ prefix off the gk20a clock constructor. Signed-off-by: Alexandre Courbot <acourbot@nvidia.com> Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2016-07-14drm/nouveau/clk/gk20a: improve MNP programmingAlexandre Courbot
Split the MNP programming function into two functions for the cases where we allow sliding or not, instead of making it take a parameter for this. This results in less conditionals in the code and makes it easier to read. Also make the MNP programming functions take the PLL parameters as arguments, and move bits of code to more relevant places (previous programming tended to be just-in-time, which added more conditionnals in the code). Signed-off-by: Alexandre Courbot <acourbot@nvidia.com> Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2016-07-14drm/nouveau/clk/gk20a: factorize n_lo computation codeAlexandre Courbot
Use a dedicated function instead of always calculating n_lo on the fly. Signed-off-by: Alexandre Courbot <acourbot@nvidia.com> Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2016-07-14drm/nouveau/clk/gk20a: parameterize PLL settingsAlexandre Courbot
Make functions manipulating PLL settings take them as an argument, instead of assuming we want to work on the copy in the gk20a_clk structure. This makes these functions more flexible, which we will need in GM20B. Signed-off-by: Alexandre Courbot <acourbot@nvidia.com> Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2016-07-14drm/nouveau/clk/gk20a: add and use MNP programming functionsAlexandre Courbot
Add relevant functions to work with the gk20a_pll structure and use them where they ought to be instead of directly manipulating registers. Signed-off-by: Alexandre Courbot <acourbot@nvidia.com> Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2016-07-14drm/nouveau/clk/gk20a: use nvkm_ functions in slide()Alexandre Courbot
Signed-off-by: Alexandre Courbot <acourbot@nvidia.com> Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2016-07-14drm/nouveau/clk/gk20a: reorganize MNP calculation a bitAlexandre Courbot
Move variables declarations to their actual scope of use, and simplify code a bit. Signed-off-by: Alexandre Courbot <acourbot@nvidia.com> Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2016-07-14drm/nouveau/clk/gk20a: setup slide once during initAlexandre Courbot
Slide setup needs to be performed only once, during init. Also use the proper parameters for different clock speeds. Signed-off-by: Alexandre Courbot <acourbot@nvidia.com> Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
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