summaryrefslogtreecommitdiff
AgeCommit message (Collapse)Author
2021-05-26drm/vmwgfx: Inline vmw_verify_access()Thomas Zimmermann
Vmwgfx is the only user of the TTM's verify_access callback. Inline the call and avoid the indirection through the function pointer. Signed-off-by: Thomas Zimmermann <tzimmermann@suse.de> Reviewed-by: Zack Rusin <zackr@vmware.com> Acked-by: Christian König <christian.koenig@amd.com> Link: https://patchwork.freedesktop.org/patch/msgid/20210525151055.8174-7-tzimmermann@suse.de
2021-05-26drm/vmwgfx: Inline ttm_bo_mmap() into vmwgfx driverThomas Zimmermann
The vmwgfx driver is the only remaining user of ttm_bo_mmap(). Inline the code. The internal helper ttm_bo_vm_lookup() is now also part of vmwgfx as vmw_bo_vm_lookup(). v2: * replace pr_err() with drm_err() (Zack) Signed-off-by: Thomas Zimmermann <tzimmermann@suse.de> Reviewed-by: Zack Rusin <zackr@vmware.com> Acked-by: Christian König <christian.koenig@amd.com> Link: https://patchwork.freedesktop.org/patch/msgid/20210525151055.8174-6-tzimmermann@suse.de
2021-05-26drm/nouveau: Implement mmap as GEM object functionThomas Zimmermann
Moving the driver-specific mmap code into a GEM object function allows for using DRM helpers for various mmap callbacks. The GEM object function is provided by GEM TTM helpers. Nouveau's implementation of verify_access is unused and has been removed. Access permissions are validated by the DRM helpers. As a side effect, nouveau_ttm_vm_ops and nouveau_ttm_fault() are now implemented in nouveau's GEM code. Signed-off-by: Thomas Zimmermann <tzimmermann@suse.de> Reviewed-by: Christian König <christian.koenig@amd.com> Link: https://patchwork.freedesktop.org/patch/msgid/20210525151055.8174-5-tzimmermann@suse.de
2021-05-26drm/radeon: Implement mmap as GEM object functionThomas Zimmermann
Moving the driver-specific mmap code into a GEM object function allows for using DRM helpers for various mmap callbacks. This change also allows to support prime-based mmap via DRM's helper drm_gem_prime_mmap(). Permission checks are implemented by drm_gem_mmap(), with an additional check for radeon_ttm_tt_has_userptr() in the GEM object function. The function radeon_verify_access() is now unused and has thus been removed. As a side effect, radeon_ttm_vm_ops and radeon_ttm_fault() are now implemented in amdgpu's GEM code. v3: * remove unnecessary checks from mmap (Christian) v2: * rename radeon_ttm_vm_ops and radeon_ttm_fault() to radeon_gem_vm_ops and radeon_gem_fault() (Christian) * fix commit description (Alex) Signed-off-by: Thomas Zimmermann <tzimmermann@suse.de> Reviewed-by: Christian König <christian.koenig@amd.com> Link: https://patchwork.freedesktop.org/patch/msgid/20210525151055.8174-4-tzimmermann@suse.de
2021-05-26drm/amdgpu: Implement mmap as GEM object functionThomas Zimmermann
Moving the driver-specific mmap code into a GEM object function allows for using DRM helpers for various mmap callbacks. This change resolves several inconsistencies between regular mmap and prime-based mmap. The vm_ops field in vma is now set for all mmap'ed areas. Previously it way only set for regular mmap calls, prime-based mmap used TTM's default vm_ops. The function amdgpu_verify_access() is no longer being called and therefore removed by this patch. As a side effect, amdgpu_ttm_vm_ops and amdgpu_ttm_fault() are now implemented in amdgpu's GEM code. v4: * rebased v3: * rename mmap function to amdgpu_gem_object_mmap() (Christian) * remove unnecessary checks from mmap (Christian) v2: * rename amdgpu_ttm_vm_ops and amdgpu_ttm_fault() to amdgpu_gem_vm_ops and amdgpu_gem_fault() (Christian) * the check for kfd_bo has meanwhile been removed Signed-off-by: Thomas Zimmermann <tzimmermann@suse.de> Reviewed-by: Christian König <christian.koenig@amd.com> Link: https://patchwork.freedesktop.org/patch/msgid/20210525151055.8174-3-tzimmermann@suse.de
2021-05-26drm/ttm: Don't override vm_ops callbacks, if setThomas Zimmermann
Drivers may want to set their own callbacks for a VM area. Only set TTM's callbacks if the vm_ops field is clear. Signed-off-by: Thomas Zimmermann <tzimmermann@suse.de> Reviewed-by: Christian König <christian.koenig@amd.com> Link: https://patchwork.freedesktop.org/patch/msgid/20210525151055.8174-2-tzimmermann@suse.de
2021-05-26drm/i915: Drop redundant has_hdmi_sink checkVille Syrjälä
intel_hdmi_bpc_possible() will check has_hdmi_sink for us, so no need to check it in intel_hdmi_mode_clock_valid() anymore. Cc: Werner Sembach <wse@tuxedocomputers.com> Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/20210511160532.21446-7-ville.syrjala@linux.intel.com Reviewed-by: José Roberto de Souza <jose.souza@intel.com>
2021-05-26drm/i915: Move the TMDS clock division into intel_hdmi_mode_clock_valid()Ville Syrjälä
Now that we have to tell intel_hdmi_mode_clock_valid() whether we're asking about 4:4:4 or 4:2:0 output it can take care of the dotclock->TMDS clock conversion. Cc: Werner Sembach <wse@tuxedocomputers.com> Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/20210511160532.21446-6-ville.syrjala@linux.intel.com Reviewed-by: José Roberto de Souza <jose.souza@intel.com>
2021-05-26drm/i915: Check sink deep color capabilitis during HDMI .mode_valid()Ville Syrjälä
Currently HDMI .mode_valid() only checks whether the source can do deep color. Let's check whether the sink can do it as well. Cc: Werner Sembach <wse@tuxedocomputers.com> Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/20210511160532.21446-5-ville.syrjala@linux.intel.com Reviewed-by: José Roberto de Souza <jose.souza@intel.com>
2021-05-26drm/i915: Move platform checks into intel_hdmi_bpc_possible()Ville Syrjälä
Let's put the platform checks into intel_hdmi_bpc_possible() so that it'll confirm both the source and sink capabilities. Cc: Werner Sembach <wse@tuxedocomputers.com> Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/20210511160532.21446-4-ville.syrjala@linux.intel.com Reviewed-by: José Roberto de Souza <jose.souza@intel.com>
2021-05-26drm/i915: Move has_hdmi_sink check into intel_hdmi_bpc_possible()Ville Syrjälä
We wish intel_hdmi_bpc_possible() to consider whether the sink supports HDMI or just DVI when checking whether it'll support HDMI deep color or not. This also takes care of the "force DVI" property. Cc: Werner Sembach <wse@tuxedocomputers.com> Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/20210511160532.21446-3-ville.syrjala@linux.intel.com Reviewed-by: José Roberto de Souza <jose.souza@intel.com>
2021-05-26drm/i915: Extract intel_hdmi_bpc_possible()Ville Syrjälä
Extract intel_hdmi_bpc_possible() from intel_hdmi_deep_color_possible() so that we can reuse it for mode validation. Cc: Werner Sembach <wse@tuxedocomputers.com> Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/20210511160532.21446-2-ville.syrjala@linux.intel.com Reviewed-by: José Roberto de Souza <jose.souza@intel.com>
2021-05-26drm/amdgpu: Fix clang warning: unused label 'exit'Andrey Grodzovsky
Problem: drivers/gpu/drm/amd/amdgpu/amdgpu_device.c:332:1: warning: unused label 'exit' [-Wunused-label] exit: ^~~~~ Fix: Put #ifdef CONFIG_64BIT around exit Reported-by: kernel test robot <lkp@intel.com> Signed-off-by: Andrey Grodzovsky <andrey.grodzovsky@amd.com> Reviewed-by: Christian König <christian.koenig@amd.com> Link: https://patchwork.freedesktop.org/patch/msgid/20210525184431.1170373-1-andrey.grodzovsky@amd.com
2021-05-26drm/i915/display: Remove a redundant function argument from ↵Gwan-gyeong Mun
intel_psr_enable_source() It removes intel_crtc_state from function argument of intel_psr_enable_source() in order to use intel_psr_enable_source() without intel_crtc_state on other psr internal functions. And we can get cpu_trancoder from intel_psr, therefore we don't need to pass intel_crtc_state to this function. Cc: José Roberto de Souza <jose.souza@intel.com> Signed-off-by: Gwan-gyeong Mun <gwan-gyeong.mun@intel.com> Signed-off-by: Matt Roper <matthew.d.roper@intel.com> Reviewed-by: Anshuman Gupta <anshuman.gupta@intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/20210526000656.3060314-4-matthew.d.roper@intel.com
2021-05-26drm/i915/xelpd: Add VRR guardband for VRR CTLManasi Navare
On XE_LPD, VRR CTL register adds a new VRR Guardband bitfield replacing the pipeline full and deprecating the pipeline override bit. This patch adds this corresponding bitfield in the register defs, crtc state vrr structure and populates this in vrr compute config and vrr enable functions. It also adds the corresponding HW state readout for this field. Bspec: 50508 Cc: Aditya Swarup <aditya.swarup@intel.com> Cc: Ville Syrjala <ville.syrjala@linux.intel.com> Signed-off-by: Manasi Navare <manasi.d.navare@intel.com> Signed-off-by: Matt Roper <matthew.d.roper@intel.com> Reviewed-by: Aditya Swarup <aditya.swarup@intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/20210526000656.3060314-3-matthew.d.roper@intel.com
2021-05-26drm/i915/xelpd: Enhanced pipe underrun reportingMatt Roper
XE_LPD brings enhanced underrun recovery: the hardware can somewhat mitigate underruns by using an interpolated replacement pixel (soft underrun) or the previous pixel (hard underrun). Furthermore, underruns can now be caused downstream by the port, even if the pipe itself is operating properly. The interrupt register and PIPE_STATUS register give us extra bits to recognize hard/soft underruns and determine whether the underrun was caused by the port, so we'll use that information to print some more descriptive errors when underruns occur. v2: - Keep ICL's PIPE_STATUS defined separately from the old GMCH pipe status register. (Ville) - Only read/clear the PIPE_STATUS register on platforms with display ver >= 11. (Lucas) v3: - Actually enable+unmask all the new underrun interrupts, clear stale bits out from PIPE_STATUS before enabling the interrupts, report all FIFO underruns errors at once, rename a bunch of stuff to unconfuse vs. PIPESTAT. (Ville) Bspec: 50335 Bspec: 50366 Cc: Lucas De Marchi <lucas.demarchi@intel.com> Cc: Ville Syrjälä <ville.syrjala@linux.intel.com> Signed-off-by: Matt Roper <matthew.d.roper@intel.com> Reviewed-by: Stanislav Lisovskiy <stanislav.lisovskiy@intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/20210526000656.3060314-2-matthew.d.roper@intel.com
2021-05-26Merge drm/drm-next into drm-intel-nextRodrigo Vivi
Getting in sync with -rc2 Signed-off-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
2021-05-26drm/i915/adl_p: enable MSO on pipe BJani Nikula
On ADL-P, it's possible to enable the stream splitter on pipe B in addition to pipe A. Bspec: 50174 Cc: Uma Shankar <uma.shankar@intel.com> Cc: Ville Syrjälä <ville.syrjala@linux.intel.com> Reviewed-by: Ville Syrjälä <ville.syrjala@linux.intel.com> Signed-off-by: Jani Nikula <jani.nikula@intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/20210526082903.26395-1-jani.nikula@intel.com
2021-05-26drm/i915: Remove the repeated declarationShaokun Zhang
Function 'intel_dbuf_init' is declared twice, remove the repeated declaration. Cc: Jani Nikula <jani.nikula@linux.intel.com> Cc: Joonas Lahtinen <joonas.lahtinen@linux.intel.com> Cc: Rodrigo Vivi <rodrigo.vivi@intel.com> Signed-off-by: Shaokun Zhang <zhangshaokun@hisilicon.com> Signed-off-by: Jani Nikula <jani.nikula@intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/1621927793-44545-1-git-send-email-zhangshaokun@hisilicon.com
2021-05-25drm/radeon: remove the repeated declarationShaokun Zhang
Function 'r300_mc_wait_for_idle' and 'r600_mc_wait_for_idle' are declared twice, remove the repeated declaration. Cc: Alex Deucher <alexander.deucher@amd.com> Cc: "Christian König" <christian.koenig@amd.com> Signed-off-by: Shaokun Zhang <zhangshaokun@hisilicon.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2021-05-25drm/radeon/evergreen: Remove the repeated declarationShaokun Zhang
Function 'evergreen_print_gpu_status_regs' is declared twice, remove the repeated declaration. Cc: Alex Deucher <alexander.deucher@amd.com> Cc: "Christian König" <christian.koenig@amd.com> Signed-off-by: Shaokun Zhang <zhangshaokun@hisilicon.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2021-05-25drm/amd/display: Remove the repeated declarationShaokun Zhang
Function 'dc_power_down_on_boot' is declared twice, remove the repeated declaration. Cc: Harry Wentland <harry.wentland@amd.com> Cc: Leo Li <sunpeng.li@amd.com> Cc: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Shaokun Zhang <zhangshaokun@hisilicon.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2021-05-25drm/amdgpu: refine amdgpu_fru_get_product_infoJiansong Chen
1. eliminate potential array index out of bounds. 2. return meaningful value for failure. Signed-off-by: Jiansong Chen <Jiansong.Chen@amd.com> Reviewed-by: Jack Gui <Jack.Gui@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2021-05-25drm/amdgpu: Change IP init sequence to support PSP program IH_RB_CNTL on ↵Peng Ju Zhou
NV12 SRIOV To enable PSP program IH_RB_CNTL, the PSP IP should be initialized before IH IP, otherwise, it will hit psp NULL pointer. Signed-off-by: Peng Ju Zhou <PengJu.Zhou@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2021-05-25drm/amdgpu: Fix an error code in kfd_mem_attach_dmabuf()Dan Carpenter
If amdgpu_gem_prime_export() fails, then this code accidentally returns zero/success instead of a negative error code. Fixes: 5ac3c3e45fb93d ("drm/amdgpu: Add DMA mapping of GTT BOs") Signed-off-by: Dan Carpenter <dan.carpenter@oracle.com> Reviewed-by: Felix Kuehling <Felix.Kuehling@amd.com> Signed-off-by: Felix Kuehling <Felix.Kuehling@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2021-05-25drm/amdgpu: add missing unreserve on errorDan Carpenter
The amdgpu_bo_unreserve() has to be done on the error path as well. Fixes: 9e5d275319e224 ("drm/amdgpu: Move kfd_mem_attach outside reservation") Signed-off-by: Dan Carpenter <dan.carpenter@oracle.com> Reviewed-by: Felix Kuehling <Felix.Kuehling@amd.com> Signed-off-by: Felix Kuehling <Felix.Kuehling@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2021-05-25drm/amdgpu: add judgement for dc supportAsher Song
Drop DC initialization when DCN is harvested in VBIOS. The way doesn't affect virtual display ip initialization. Signed-off-by: Likun Gao <Likun.Gao@amd.com> Signed-off-by: Asher Song <Asher.Song@amd.com> Reviewed-by: Guchun Chen <guchun.chen@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2021-05-25drm/amdgpu: fix typotony.huang_cp
change 'interupt' to 'interrupt' Signed-off-by: tony.huang_cp <huangwentao@yulong.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2021-05-25drm/i915/display/adl_p: Disable PSR2José Roberto de Souza
We are missing the implementation of some workarounds to enabled PSR2 in Alderlake P, so to avoid any CI report of issues around PSR2 disabling it until all PSR2 workarounds are implemented. Cc: Gwan-gyeong Mun <gwan-gyeong.mun@intel.com> Signed-off-by: José Roberto de Souza <jose.souza@intel.com> Reviewed-by: Clint Taylor <Clinton.A.Taylor@intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/20210524214805.259692-5-jose.souza@intel.com
2021-05-25drm/i915/display/adl_p: Allow DC3CO in pipe and port BJosé Roberto de Souza
DC3CO is allowed in all the combinations between pipe and port A and B on alderlake-P. BSpec: 49196 Cc: Anshuman Gupta <anshuman.gupta@intel.com> Cc: Gwan-gyeong Mun <gwan-gyeong.mun@intel.com> Cc: Matt Atwood <matthew.s.atwood@intel.com> Signed-off-by: José Roberto de Souza <jose.souza@intel.com> Reviewed-by: Clint Taylor <Clinton.A.Taylor@intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/20210524214805.259692-4-jose.souza@intel.com
2021-05-25drm/i915: WA for zero memory channelJosé Roberto de Souza
Commit c457d9cf256e ("drm/i915: Make sure we have enough memory bandwidth on ICL") assumes that we always have a non-zero dram_info->channels and uses it as a divisor. We need num memory channels to be at least 1 for sane bw limits checking, even when PCode returns 0 or there is a error reading it, so lets force it to 1 in this case. Cc: Stanislav Lisovskiy <stanislav.lisovskiy@intel.com> Cc: Rodrigo Vivi <rodrigo.vivi@intel.com> Cc: Ville Syrjälä <ville.syrjala@linux.intel.com> Signed-off-by: Daniele Ceraolo Spurio <daniele.ceraolospurio@intel.com> Signed-off-by: Lucas De Marchi <lucas.demarchi@intel.com> Signed-off-by: José Roberto de Souza <jose.souza@intel.com> Reviewed-by: Clint Taylor <Clinton.A.Taylor@intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/20210524214805.259692-3-jose.souza@intel.com
2021-05-25drm/i915/adl_p: Handle TC coldJosé Roberto de Souza
On ADL-P TC cold is exited and blocked when legacy aux is powered, that is exacly the same of what ICL need for static TC ports. TODO: When a TBT hub or monitor is connected it will cause TBT and legacy aux to be powered at the same time, hopefully this will not cause any issues but if it do, some rework will be needed. v2: - skip icl_tc_port_assert_ref_held() warn on, adl-p uses aux to block TC cold v3: - Drop icl_tc_port_assert_ref_held() earlier return for adl_p, not needed anymore - Set timeout_expected when enabling aux power well as port could be disconnected when tc_cold_block() is called BSpec: 55480 Cc: Imre Deak <imre.deak@intel.com> Signed-off-by: José Roberto de Souza <jose.souza@intel.com> Signed-off-by: Clinton Taylor <Clinton.A.Taylor@intel.com> Signed-off-by: Matt Roper <matthew.d.roper@intel.com> Reviewed-by: Clint Taylor <Clinton.A.Taylor@intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/20210524214805.259692-2-jose.souza@intel.com
2021-05-25drm/i915/display/adl_p: Drop earlier return in tc_has_modular_fia()José Roberto de Souza
MODULAR_FIA_MASK is set in adl_p so we can drop this ealier return and read registers. Also to avoid warnings from icl_tc_port_assert_ref_held() when calling tc_cold_block() in this functions it is necessary to held the lock. Cc: Imre Deak <imre.deak@intel.com> Signed-off-by: José Roberto de Souza <jose.souza@intel.com> Reviewed-by: Clint Taylor <Clinton.A.Taylor@intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/20210524214805.259692-1-jose.souza@intel.com
2021-05-25drm/amdgpu: Fix crash when hot unplug in BACOAndrey Grodzovsky
Problem: When device goes into runtime suspend due to prolonged inactivity (e.g. BACO sleep) and then hot unplugged, PCI core will try to wake up the device as part of unplug process. Since the device is gone all HW programming during rpm resume fails leading to a bad SW state later during pci remove handling. Fix: Use a flag we use for PCIe error recovery to avoid accessing registres. This allows to successfully complete rpm resume sequence and finish pci remove. v2: Renamed HW access block flag Signed-off-by: Andrey Grodzovsky <andrey.grodzovsky@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Link: https://gitlab.freedesktop.org/drm/amd/-/issues/1081 Link: https://patchwork.freedesktop.org/patch/msgid/20210521204122.762288-2-andrey.grodzovsky@amd.com
2021-05-25drm/amdgpu: Rename flag which prevents HW accessAndrey Grodzovsky
Make it's name not feature but function descriptive. Signed-off-by: Andrey Grodzovsky <andrey.grodzovsky@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Link: https://patchwork.freedesktop.org/patch/msgid/20210521204122.762288-1-andrey.grodzovsky@amd.com
2021-05-25drm/i915/gt: Move CS interrupt handler to the backendChris Wilson
The different submission backends each have their own preferred behaviour and interrupt setup. Let each handle their own interrupts. This becomes more useful later as we to extract the use of auxiliary state in the interrupt handler that is backend specific. Signed-off-by: Matthew Brost <matthew.brost@intel.com> Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk> Cc: Tvrtko Ursulin <tvrtko.ursulin@intel.com> Reviewed-by: Matthew Brost <matthew.brost@intel.com> Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch> Link: https://patchwork.freedesktop.org/patch/msgid/20210521183215.65451-4-matthew.brost@intel.com
2021-05-25drm/i915/gt: Move submission_method into intel_gtChris Wilson
Since we setup the submission method for the engines once, it is easy to assign an enum and use that instead of probing into the backends. Signed-off-by: Matthew Brost <matthew.brost@intel.com> Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk> Cc: Tvrtko Ursulin <tvrtko.ursulin@intel.com> Reviewed-by: Matthew Brost <matthew.brost@intel.com> Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch> Link: https://patchwork.freedesktop.org/patch/msgid/20210521183215.65451-3-matthew.brost@intel.com
2021-05-25drm/i915/gt: Move engine setup out of set_default_submissionChris Wilson
Now that we no longer switch back and forth between guc and execlists, we no longer need to restore the backend's vfunc and can leave them set after initialisation. The only catch is that we lose the submission on wedging and still need to reset the submit_request vfunc on unwedging. Signed-off-by: Matthew Brost <matthew.brost@intel.com> Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk> Cc: Tvrtko Ursulin <tvrtko.ursulin@intel.com> Reviewed-by: Matthew Brost <matthew.brost@intel.com> Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch> Link: https://patchwork.freedesktop.org/patch/msgid/20210521183215.65451-2-matthew.brost@intel.com
2021-05-25drm/ingenic: Add option to alloc cached GEM buffersPaul Cercueil
Alloc GEM buffers backed by noncoherent memory on SoCs where it is actually faster than write-combine. This dramatically speeds up software rendering on these SoCs, even for tasks where write-combine memory should in theory be faster (e.g. simple blits). v3: The option is now selected per-SoC instead of being a module parameter. v5: - Fix drm_atomic_get_new_plane_state() used to retrieve the old state - Use custom drm_gem_fb_create() - Only check damage clips and sync DMA buffers if non-coherent buffers are used Signed-off-by: Paul Cercueil <paul@crapouillou.net> Acked-by: Thomas Zimmermann <tzimmermann@suse.de> Link: https://patchwork.freedesktop.org/patch/msgid/20210523170415.90410-4-paul@crapouillou.net
2021-05-25drm: Add and export function drm_fb_cma_sync_non_coherentPaul Cercueil
This function can be used by drivers that use damage clips and have CMA GEM objects backed by non-coherent memory. Calling this function in a plane's .atomic_update ensures that all the data in the backing memory have been written to RAM. v3: - Only sync data if using GEM objects backed by non-coherent memory. - Use a drm_device pointer instead of device pointer in prototype v5: - Rename to drm_fb_cma_sync_non_coherent - Invert loops for better cache locality - Only sync BOs that have the non-coherent flag - Move to drm_fb_cma_helper.c to avoid circular dependency Signed-off-by: Paul Cercueil <paul@crapouillou.net> Acked-by: Thomas Zimmermann <tzimmermann@suse.de> Link: https://patchwork.freedesktop.org/patch/msgid/20210523170415.90410-3-paul@crapouillou.net
2021-05-25drm: Add support for GEM buffers backed by non-coherent memoryPaul Cercueil
Having GEM buffers backed by non-coherent memory is interesting in the particular case where it is faster to render to a non-coherent buffer then sync the data cache, than to render to a write-combine buffer, and (by extension) much faster than using a shadow buffer. This is true for instance on some Ingenic SoCs, where even simple blits (e.g. memcpy) are about three times faster using this method. Add a 'map_noncoherent' flag to the drm_gem_cma_object structure, which can be set by the drivers when they create the dumb buffer. Since this really only applies to software rendering, disable this flag as soon as the CMA objects are exported via PRIME. v3: New patch. Now uses a simple 'map_noncoherent' flag to control how the objects are mapped, and use the new dma_mmap_pages function. v4: Make sure map_noncoherent is always disabled when creating GEM objects meant to be used with dma-buf. Signed-off-by: Paul Cercueil <paul@crapouillou.net> Acked-by: Thomas Zimmermann <tzimmermann@suse.de> Link: https://patchwork.freedesktop.org/patch/msgid/20210523170415.90410-2-paul@crapouillou.net
2021-05-25drm/i915/debugfs: Print remap info for DPT VMAs as wellImre Deak
Similarly to GGTT VMAs, DPT VMAs can be also a remapped or rotated view of the mapped object, so make sure we debug print the details for these views as well besides the normal view. While at it also fix the debug print for the VMA type of DPT VMAs. Signed-off-by: Imre Deak <imre.deak@intel.com> Reviewed-by: José Roberto de Souza <jose.souza@intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/20210524172703.2113058-3-imre.deak@intel.com
2021-05-25drm/i915/adlp: Fix GEM VM asserts for DPT VMsImre Deak
An object mapped via DPT can have remapped and rotated VMA instances besides the normal VMA instance, similarly to GGTT VMA instances. Adjust the corresponding VMA lookup asserts. While at it also check if a DPT VM is passed incorrectly to i915_vm_to_ppgtt(). Signed-off-by: Imre Deak <imre.deak@intel.com> Reviewed-by: José Roberto de Souza <jose.souza@intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/20210524172703.2113058-2-imre.deak@intel.com
2021-05-25drm/i915/adlp: Require DPT FB CCS color planes to be 2MB alignedImre Deak
All DPT FB color plane surface base addresses must be 2MB aligned. On ADL_P this means that the offsets in CCS FB object must be also 2MB aligned. Adjusting unaligned offsets for these FBs during commit time (compensating with the x/y offsets) doesn't work, since the big alignment would most probably lead to an x/y offset mismatch error between the main and CCS planes. We can overcome this limitation by remapping CCS FBs, so that each color plane is at an aligned offset, leaving x/y for each plane unadjusted during commit and so not causing an x/y mismatch error. However remapping for CCS FBs will be done as a follow-up, so for now require that user space allocates the FB obj with properly aligned planes. v2: s/SZ_2M/512*4k/ for clarity. (Ville) Signed-off-by: Imre Deak <imre.deak@intel.com> Reviewed-by: Ville Syrjälä <ville.syrjala@linux.intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/20210524172703.2113058-1-imre.deak@intel.com
2021-05-25drm/vc4: hdmi: Fix PM reference leak in vc4_hdmi_encoder_pre_crtc_co()Zou Wei
pm_runtime_get_sync will increment pm usage counter even it failed. Forgetting to putting operation will result in reference leak here. Fix it by replacing it with pm_runtime_resume_and_get to keep usage counter balanced. Reported-by: Hulk Robot <hulkci@huawei.com> Signed-off-by: Zou Wei <zou_wei@huawei.com> Signed-off-by: Maxime Ripard <maxime@cerno.tech> Link: https://patchwork.freedesktop.org/patch/msgid/1621840854-105978-1-git-send-email-zou_wei@huawei.com
2021-05-24drm/i915/display: fix typo when returning tableLucas De Marchi
Fix table returned when port_clock > 270000: drivers/gpu/drm/i915/display/intel_ddi_buf_trans.c:752:47: error: variable 'adlp_dkl_phy_dp_ddi_trans_hbr2_hbr3' is not needed and will not be emitted [-Werror,-Wunneeded-internal-declaration] Initial version of the patch had it in a single table, but on second version the table got split, but we continued to reference just one of them. Fixes: ca962882268a ("drm/i915/adl_p: Define and use ADL-P specific DP translation tables") Reported-by: kernel test robot <lkp@intel.com> Signed-off-by: Lucas De Marchi <lucas.demarchi@intel.com> Reviewed-by: Anusha Srivatsa <anusha.srivatsa@intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/20210521005209.4058702-1-lucas.demarchi@intel.com
2021-05-24drm/panel: panel-simple: Add missing pm_runtime_dont_use_autosuspend() callsDouglas Anderson
The PM Runtime docs specifically call out the need to call pm_runtime_dont_use_autosuspend() in the remove() callback if pm_runtime_use_autosuspend() was called in probe(): > Drivers in ->remove() callback should undo the runtime PM changes done > in ->probe(). Usually this means calling pm_runtime_disable(), > pm_runtime_dont_use_autosuspend() etc. We should do this. This fixes a warning splat that I saw when I was testing out the panel-simple's remove(). Fixes: 3235b0f20a0a ("drm/panel: panel-simple: Use runtime pm to avoid excessive unprepare / prepare") Signed-off-by: Douglas Anderson <dianders@chromium.org> Reviewed-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com> Link: https://patchwork.freedesktop.org/patch/msgid/20210517130450.v7.1.I9e947183e95c9bd067c9c1d51208ac6a96385139@changeid
2021-05-24drm/vc4: hdmi: Add a workqueue to set scramblingMaxime Ripard
It looks like some displays (like the LG 27UL850-W) don't enable the scrambling when the HDMI driver enables it. However, if we set later the scrambler enable bit, the display will work as expected. Let's create delayed work queue to periodically look at the display scrambling status, and if it's not set yet try to enable it again. Signed-off-by: Maxime Ripard <maxime@cerno.tech> Reviewed-by: Dave Stevenson <dave.stevenson@raspberrypi.com> Link: https://patchwork.freedesktop.org/patch/msgid/20210507150515.257424-12-maxime@cerno.tech
2021-05-24drm/vc4: hdmi: Enable the scramblerMaxime Ripard
The HDMI controller on the BCM2711 includes a scrambler in order to reach the HDMI 2.0 modes that require it. Let's add the support for it. Acked-by: Thomas Zimmermann <tzimmermann@suse.de> Signed-off-by: Maxime Ripard <maxime@cerno.tech> Reviewed-by: Dave Stevenson <dave.stevenson@raspberrypi.com> Link: https://patchwork.freedesktop.org/patch/msgid/20210507150515.257424-11-maxime@cerno.tech
2021-05-24drm/vc4: hdmi: Check and warn if we can't reach 4kp60 frequenciesMaxime Ripard
In order to reach the frequencies needed to output at 594MHz, the firmware needs to be configured with the appropriate parameters in the config.txt file (enable_hdmi_4kp60 and force_turbo). Let's detect it at bind time, warn the user if we can't, and filter out the relevant modes. Acked-by: Thomas Zimmermann <tzimmermann@suse.de> Reviewed-by: Dave Stevenson <dave.stevenson@raspberrypi.com> Signed-off-by: Maxime Ripard <maxime@cerno.tech> Link: https://patchwork.freedesktop.org/patch/msgid/20210507150515.257424-10-maxime@cerno.tech
generated by cgit (git 2.34.1) at 2025-09-13 02:44:05 +0000