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2022-07-06arm64: dts: qcom: sm6125: Move sdc2 pinctrl from seine-pdx201 to sm6125Marijn Suijten
Both the sdc2-on and sdc2-off pinctrl nodes are used by the sdhci@4784000 node in sm6125.dtsi. Surprisingly sdc2-off is defined in sm6125, yet its sdc2-on counterpart is only defined in board-specific DT for the Sony Seine PDX201 board/device resulting in an "undefined label &sdc2_state_on" error if sm6125.dtsi were included elsewhere. This sm6125 base dtsi should not rely on externally defined labels; the properties referencing it should then also be written externally. Since the sdc2-on pin configuration is board-independent just like sdc2-off, move it from seine-pdx201.dts into sm6125.dtsi. The SDCard-detect pin (gpio98) is however board-specific, and remains as an overwrite in seine-pdx201.dts for both the on and off state. As a drive-by cleanup, reorder bias- and drive-strength properties. Fixes: cff4bbaf2a2d ("arm64: dts: qcom: Add support for SM6125") Fixes: 82e1783890b7 ("arm64: dts: qcom: sm6125: Add support for Sony Xperia 10II") Signed-off-by: Marijn Suijten <marijn.suijten@somainline.org> Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org> Link: https://lore.kernel.org/r/20220508100336.127176-1-marijn.suijten@somainline.org
2022-07-06arm64: dts: qcom: db820c: Add user LEDsBjorn Andersson
The db820c has 4 "user LEDs", all connected to the PMI8994. The first three are connected to the three current sinks provided by the TRILED and the fourth is connected to MPP2. By utilizing the DTEST bus the MPP is fed the control signal from the fourth LPG block, providing a consistent interface to the user. Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org> Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> Reviewed-by: Dylan Van Assche <me@dylanvanassche.be> Link: https://lore.kernel.org/r/20220505022706.1692554-5-bjorn.andersson@linaro.org
2022-07-06arm64: dts: qcom: pmi8994: Define MPP blockBjorn Andersson
The pmi8994 has 4 multi-purpose-pins, add these to the definition. Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org> Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> Reviewed-by: Dylan Van Assche <me@dylanvanassche.be> Link: https://lore.kernel.org/r/20220505022706.1692554-4-bjorn.andersson@linaro.org
2022-07-06arm64: dts: qcom: sdm845: Enable user LEDs on DB845cBjorn Andersson
The DB845c has 4 "user LEDs", the last one is already supported as it's just wired to a gpio. Now that the LPG binding is in place we can wire up the other 3 LEDs as well. Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org> Reviewed-by: Caleb Connolly <caleb@connolly.tech> Reviewed-by: Dylan Van Assche <me@dylanvanassche.be> Link: https://lore.kernel.org/r/20220505022706.1692554-3-bjorn.andersson@linaro.org
2022-07-06arm64: dts: qcom: Add LPG to pm8916, pm8994, pmi8994 and pmi8998Bjorn Andersson
Add PWM/LPG nodes to the PMICs currently supported by the binding. Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org> Reviewed-by: Caleb Connolly <caleb@connolly.tech> Reviewed-by: Dylan Van Assche <me@dylanvanassche.be> Link: https://lore.kernel.org/r/20220505022706.1692554-2-bjorn.andersson@linaro.org
2022-07-06arm64: dts: qcom: sm8350: Replace integers with rpmpd definesRobert Foss
Replace &rpmhpd power domain integers with their respective defines in order to improve legibility. Signed-off-by: Robert Foss <robert.foss@linaro.org> Reviewed-by: Konrad Dybcio <konrad.dybcio@somainline.org> Reviewed-by: Vinod Koul <vkoul@kernel.org> Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org> Link: https://lore.kernel.org/r/20220706152830.2021197-1-robert.foss@linaro.org
2022-07-06arm64: dts: qcom: sm8350: Add DISPCC nodeRobert Foss
Add the dispcc clock-controller DT node for sm8350. Signed-off-by: Robert Foss <robert.foss@linaro.org> Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> Reviewed-by: Konrad Dybcio <konrad.dybcio@somainline.org> Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org> Link: https://lore.kernel.org/r/20220706154337.2026269-6-robert.foss@linaro.org
2022-07-06Merge branch '20220706154337.2026269-1-robert.foss@linaro.org' into ↵Bjorn Andersson
arm64-for-5.20
2022-07-06arm64: dts: qcom: sm8450: Add description of camera clock controllerVladimir Zapolskiy
The change adds description of Qualcomm SM8450 camera clock controller. Signed-off-by: Vladimir Zapolskiy <vladimir.zapolskiy@linaro.org> Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org> Link: https://lore.kernel.org/r/20220701062622.2757831-3-vladimir.zapolskiy@linaro.org
2022-07-06Merge branch '20220701062622.2757831-2-vladimir.zapolskiy@linaro.org' into ↵Bjorn Andersson
arm64-for-5.20
2022-07-06dt-bindings: clock: add QCOM SM8450 camera clock bindingsVladimir Zapolskiy
The change adds device tree bindings for camera clock controller found on SM8450 SoC. Reviewed-by: Rob Herring <robh@kernel.org> Reviewed-by: Bjorn Andersson <bjorn.andersson@linaro.org> Signed-off-by: Vladimir Zapolskiy <vladimir.zapolskiy@linaro.org> Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org> Link: https://lore.kernel.org/r/20220701062622.2757831-2-vladimir.zapolskiy@linaro.org
2022-07-06dt-bindings: clock: Add Qcom SM8350 DISPCC bindingsJonathan Marek
Add sm8350 DISPCC bindings, which are simply a symlink to the sm8250 bindings. Update the documentation with the new compatible. Signed-off-by: Jonathan Marek <jonathan@marek.ca> Signed-off-by: Robert Foss <robert.foss@linaro.org> Reviewed-by: Rob Herring <robh@kernel.org> Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> Reviewed-by: Vinod Koul <vkoul@kernel.org> Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org> Link: https://lore.kernel.org/r/20220706154337.2026269-4-robert.foss@linaro.org
2022-07-06dt-bindings: clock: Add Qcom SM8350 GPUCC bindingsRobert Foss
Add device tree bindings for graphics clock controller for Qualcomm Technology Inc's SM8350 SoCs. Signed-off-by: Robert Foss <robert.foss@linaro.org> Reviewed-by: Dmitry Baryshkov <dmityr.baryshkov@linaro.org> Reviewed-by: Rob Herring <robh@kernel.org> Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org> Link: https://lore.kernel.org/r/20220706154337.2026269-2-robert.foss@linaro.org
2022-07-06dt-bindings: soc: samsung: exynos-pmu: add reboot-modeKrzysztof Kozlowski
ExynosAutov9 gained a reboot-mode node, so document the property to fix warning: exynosautov9-sadk.dtb: system-controller@10460000: 'reboot-mode' does not match any of the regexes: 'pinctrl-[0-9]+' Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Reviewed-by: Alim Akhtar <alim.akhtar@samsung.com> Reviewed-by: Rob Herring <robh@kernel.org> Link: https://lore.kernel.org/r/20220706160257.27579-3-krzysztof.kozlowski@linaro.org
2022-07-06dt-bindings: soc: samsung: exynos-pmu: use abolute ref pathsKrzysztof Kozlowski
Preferred coding for referencing other schemas is to use absolute path. Quotes over path are also not needed. Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Reviewed-by: Alim Akhtar <alim.akhtar@samsung.com> Reviewed-by: Rob Herring <robh@kernel.org> Link: https://lore.kernel.org/r/20220706160257.27579-2-krzysztof.kozlowski@linaro.org
2022-07-06dt-bindings: soc: samsung: exynos-pmu: cleanup assigned clocksKrzysztof Kozlowski
"assigned-clocks" are not needed in the device schema as they come from core schema. Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Reviewed-by: Rob Herring <robh@kernel.org> Link: https://lore.kernel.org/r/20220706160257.27579-1-krzysztof.kozlowski@linaro.org
2022-07-06dt-bindings: samsung: document preferred compatible namingKrzysztof Kozlowski
Compatibles can come in two formats. Either "vendor,ip-soc" or "vendor,soc-ip". Add a DT schema documenting preferred policy and enforcing it for all new compatibles, except few existing patterns. The schema also disallows wild-cards used in SoC compatibles. Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Reviewed-by: Rob Herring <robh@kernel.org> Link: https://lore.kernel.org/r/20220705161340.493474-1-krzysztof.kozlowski@linaro.org
2022-07-06Merge tag 'juno-updates-5.20' of ↵Arnd Bergmann
git://git.kernel.org/pub/scm/linux/kernel/git/sudeep.holla/linux into arm/dt Armv8 Juno/FVP updates for v5.20 Just a small bunch of miscellaneous updates: addition of missing cache-level property to L2 caches on Juno, whitespace adjustments and removal of erroneous 'mbox-name' and 'panel-dpi' compatible in the device tree nodes. * tag 'juno-updates-5.20' of git://git.kernel.org/pub/scm/linux/kernel/git/sudeep.holla/linux: arm64: dts: juno: Add cache-level property to L2 caches arm64: dts: arm: adjust whitespace around '=' arm64: dts: arm/juno: Drop erroneous 'mbox-name' property arm64: dts: arm/fvp-base-revc: Remove 'panel-dpi' compatible Link: https://lore.kernel.org/r/20220706115026.2272643-1-sudeep.holla@arm.com Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2022-07-06Merge tag 'stm32-dt-for-v5.20-1' of ↵Arnd Bergmann
git://git.kernel.org/pub/scm/linux/kernel/git/atorgue/stm32 into arm/dt STM32 DT for v5.20, round 1 Highlights: ---------- - MCU: -Fix whitespace coding style. No functional changes. - MPU: - General: - Remove specific IPCC wakeup interrupt on STM32MP15. - Enable OPTEE firmware and scmi support (clock/reset) on STM32MP13. It allows to enable RCC clock driver. - Add new pins configurations groups. - DH boards: - Add DHCOR based DRC Compact board. It embeds: 2xETH, 1xCAN, uSD, USB, eMMC and SDIO wifi. - Add ST MIPID02 bindings to AV96 (not enabled by default) - OSD32: - Correct vcc-supply for eeprom. - fix missing internally connected voltage regulator (ldo3 supplied by vdd_ddr). * tag 'stm32-dt-for-v5.20-1' of git://git.kernel.org/pub/scm/linux/kernel/git/atorgue/stm32: (25 commits) ARM: dts: stm32: Add ST MIPID02 bindings to AV96 ARM: dts: stm32: Add alternate pinmux for RCC pin ARM: dts: stm32: Add alternate pinmux for DCMI pins ARM: dts: stm32: Add DHCOR based DRC Compact board ARM: dts: stm32: Add alternate pinmux for UART5 pins ARM: dts: stm32: Add alternate pinmux for UART4 pins ARM: dts: stm32: Add alternate pinmux for UART3 pins ARM: dts: stm32: Add alternate pinmux for SPI2 pins ARM: dts: stm32: Add alternate pinmux for CAN1 pins dt-bindings: arm: stm32: Add compatible string for DH electronics DHCOR DRC Compact ARM: dts: stm32: Fix SPI2 pinmux pin comments on stm32mp15 ARM: dts: stm32: add optee reserved memory on stm32mp135f-dk ARM: dts: stm32: add RCC on STM32MP13x SoC family ARM: dts: stm32: enable optee firmware and SCMI support on STM32MP13 dt-bindings: rcc: stm32: select the "secure" path for stm32mp13 ARM: dts: stm32: correct vcc-supply for eeprom on stm32mp15xx-osd32 ARM: dts: stm32: fix missing internally connected voltage regulator for OSD32MP1 ARM: dts: stm32: adjust whitespace around '=' on MCU boards ARM: dts: stm32: Move DHCOR BUCK3 VDD 2V9 adjustment to 1V8 DTSI ARM: dts: stm32: remove the IPCC "wakeup" IRQ on stm32mp151 ... Link: https://lore.kernel.org/r/a250f32b-f67c-2922-0748-e39dc791e95c@foss.st.com Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2022-07-06Merge tag 'at91-dt-5.20' of ↵Arnd Bergmann
git://git.kernel.org/pub/scm/linux/kernel/git/at91/linux into arm/dt AT91 DT for v5.20 It contains: - compilation warning fixes for SAMA5D2 - updates for all AT91 device tree to use generic name for reset controller - reset controller node for SAMA7G5 - MCAN1 and UDPHS nodes for LAN966 SoCs - Flexcom3 bindings were updated for lan966x-pcb8291.dts board to cope with reality * tag 'at91-dt-5.20' of git://git.kernel.org/pub/scm/linux/kernel/git/at91/linux: ARM: dts: lan966x: Add UDPHS support dt-bindings: usb: atmel: Add Microchip LAN9662 compatible string ARM: dts: lan966x: Cleanup flexcom3 usart pinctrl settings. ARM: dts: lan966x: Add mcan1 node. ARM: dts: at91: sama7g5: add reset-controller node ARM: dts: at91: use generic name for reset controller ARM: dts: at91: sama5d2: fix compilation warning ARM: dts: at91: sama5d2: fix compilation warning Link: https://lore.kernel.org/r/20220705084637.818216-1-claudiu.beznea@microchip.com Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2022-07-06Merge tag 'ux500-dts-v5.20' of ↵Arnd Bergmann
git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-nomadik into arm/dt Ux500 DTS updates for the v5.20 kernel: - Fix orientation matrices on a few U8500 mobile phones. - Drop unused i2c power supply handled by the power domain. * tag 'ux500-dts-v5.20' of git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-nomadik: ARM: dts: ux500: Drop unused i2c power domain supply ARM: dts: ux500: Fix Gavini accelerometer mounting matrix ARM: dts: ux500: Fix Codina accelerometer mounting matrix ARM: dts: ux500: Fix Janice accelerometer mounting matrix Link: https://lore.kernel.org/r/CACRpkdY1MG=HG+tOCmD1_LEAStV1-ycCLkwShMRD4R=4jGDYHQ@mail.gmail.com Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2022-07-06Merge tag 'v5.20-rockchip-dts32-1' of ↵Arnd Bergmann
git://git.kernel.org/pub/scm/linux/kernel/git/mmind/linux-rockchip into arm/dt NFC flash node on rk3066a-mk808 and some dts styling fixes (alignment and node names). * tag 'v5.20-rockchip-dts32-1' of git://git.kernel.org/pub/scm/linux/kernel/git/mmind/linux-rockchip: ARM: dts: rockchip: correct gpio-keys properties on rk3288-tinker ARM: dts: rockchip: align gpio-key node names with dtschema ARM: dts: rockchip: adjust whitespace around '=' ARM: dts: rockchip: enable nfc node in rk3066a-mk808.dts Link: https://lore.kernel.org/r/14795241.VsHLxoZxqI@phil Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2022-07-06Merge tag 'v5.20-rockchip-dts64-1' of ↵Arnd Bergmann
git://git.kernel.org/pub/scm/linux/kernel/git/mmind/linux-rockchip into arm/dt New board the Radxa Rock Pi S, enablement of graphics support and hdmi-audio on rk356x in general plus necessary board-specific changes on Rock-3A, Quartz64-A, rk3568-evb, BPI-R2-Pro. A number of additional peripherals on BPI-R2-Pro (gpu, thermal, rtc) and PCIe2x1 support on rk3568 and enablement on Quart64-A as well as a number of additional peripherals to this board (sfc node, sdr-104 support, fan). And finally touch panel support for rockpro64 and some misc dt cleanups (node names for dtschema and styling). * tag 'v5.20-rockchip-dts64-1' of git://git.kernel.org/pub/scm/linux/kernel/git/mmind/linux-rockchip: (27 commits) arm64: dts: rockchip: enable hdmi tx audio on rock-3a arm64: dts: rockchip: enable hdmi tx audio on rk3568-evb1-v10 arm64: dts: rockchip: align gpio-key node names with dtschema arm64: dts: rockchip: rock-pi-s add more peripherals arm64: dts: rockchip: add ROCK Pi S DTS support dt-bindings: arm: rockchip: Add Radxa ROCK Pi S arm64: dts: rockchip: Add missing space around regulator-name on rk3368-orion-r68 arm64: dts: rockchip: enable the gpu on BPI-R2-Pro arm64: dts: rockchip: configure thermal shutdown for BPI-R2-Pro arm64: dts: rockchip: Enable HDMI audio on BPI R2 Pro arm64: dts: rockchip: enable vop2 and hdmi tx on BPI-R2-Pro arm64: dts: rockchip: set display regulators to always-on on BPI-R2-Pro arm64: dts: rockchip: add RTC to BPI-R2 Pro arm64: dts: rockchip: Enable HDMI audio on Quartz64 A arm64: dts: rockchip: Add HDMI audio nodes to rk356x arm64: dts: rockchip: adjust whitespace around '=' arm64: dts: rockchip: enable vop2 and hdmi tx on rock-3a arm64: dts: rockchip: enable vop2 and hdmi tx on quartz64a arm64: dts: rockchip: rk3568-evb: Enable VOP2 and hdmi arm64: dts: rockchip: rk356x: Add HDMI nodes ... Link: https://lore.kernel.org/r/40088956.J2Yia2DhmK@phil Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2022-07-05dt-bindings: usb: generic-ohci: Add Allwinner D1 compatibleSamuel Holland
The Allwinner D1 contains USB controllers which claim to be compatible with the OHCI specification version 1.0a. Signed-off-by: Samuel Holland <samuel@sholland.org> Acked-by: Jernej Skrabec <jernej.skrabec@gmail.com> Signed-off-by: Jernej Skrabec <jernej.skrabec@gmail.com> Link: https://lore.kernel.org/r/20220702195249.54160-4-samuel@sholland.org
2022-07-05dt-bindings: usb: generic-ehci: Add Allwinner D1 compatibleSamuel Holland
The Allwinner D1 contains USB controllers which claim to be compatible with the EHCI specification version 1.0. Signed-off-by: Samuel Holland <samuel@sholland.org> Acked-by: Jernej Skrabec <jernej.skrabec@gmail.com> Signed-off-by: Jernej Skrabec <jernej.skrabec@gmail.com> Link: https://lore.kernel.org/r/20220702195249.54160-3-samuel@sholland.org
2022-07-05dt-bindings: usb: sunxi-musb: Add Allwinner D1 compatibleSamuel Holland
The MUSB controller in the Allwinner D1 has 10 endpoints, making it compatible with the A33 variant of the hardware. Signed-off-by: Samuel Holland <samuel@sholland.org> Acked-by: Jernej Skrabec <jernej.skrabec@gmail.com> Signed-off-by: Jernej Skrabec <jernej.skrabec@gmail.com> Link: https://lore.kernel.org/r/20220702195249.54160-2-samuel@sholland.org
2022-07-05arm64: dts: allwinner: a100: Update I2C controller fallbackSamuel Holland
The I2C controllers in the A100 SoC are newer-generation hardware which includes an offload engine. Signify that by including the allwinner,sun8i-v536-i2c fallback compatible, as V536 is the first SoC with this generation of I2C controller. Signed-off-by: Samuel Holland <samuel@sholland.org> Reviewed-by: Jernej Skrabec <jernej.skrabec@gmail.com> Signed-off-by: Jernej Skrabec <jernej.skrabec@gmail.com> Link: https://lore.kernel.org/r/20220702052544.31443-2-samuel@sholland.org
2022-07-05dt-bindings: i2c: mv64xxx: Add variants with offload supportSamuel Holland
V536 and newer Allwinner SoCs contain an updated I2C controller which includes an offload engine for master mode. The controller retains the existing register interface, so the A31 compatible still applies. Add the V536 compatible and use it as a fallback for other SoCs with the updated hardware. This includes two SoCs that were already documented (H616 and A100) and two new SoCs (R329 and D1). Signed-off-by: Samuel Holland <samuel@sholland.org> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Signed-off-by: Jernej Skrabec <jernej.skrabec@gmail.com> Link: https://lore.kernel.org/r/20220702052544.31443-1-samuel@sholland.org
2022-07-05ARM: dts: sun8i-r40: Add thermal trip points/cooling mapsqianfan Zhao
For the trip points, I used values from the BSP code. The critical trip point value is 30°C above the maximum recommended ambient temperature (85°C) for the SoC from the datasheet, so there's some headroom even at such a high ambient temperature. Signed-off-by: qianfan Zhao <qianfanguijin@163.com> Reviewed-by: Samuel Holland <samuel@sholland.org> Tested-by: Samuel Holland <samuel@sholland.org> Signed-off-by: Jernej Skrabec <jernej.skrabec@gmail.com> Link: https://lore.kernel.org/r/20220517013607.2252-4-qianfanguijin@163.com
2022-07-05ARM: dts: sun8i-r40: add opp table for cpuqianfan Zhao
OPP table value is get from allwinner lichee linux-3.10 kernel driver Signed-off-by: qianfan Zhao <qianfanguijin@163.com> Reviewed-by: Samuel Holland <samuel@sholland.org> Tested-by: Samuel Holland <samuel@sholland.org> Signed-off-by: Jernej Skrabec <jernej.skrabec@gmail.com> Link: https://lore.kernel.org/r/20220517013607.2252-3-qianfanguijin@163.com
2022-07-05ARM: dts: sun8i-r40: Add "cpu-supply" node for sun8i-r40 based boardqianfan Zhao
The CPU of sun8i-r40 is powered by PMIC, let's add "cpu-supply" node. Signed-off-by: qianfan Zhao <qianfanguijin@163.com> Reviewed-by: Samuel Holland <samuel@sholland.org> Tested-by: Samuel Holland <samuel@sholland.org> Signed-off-by: Jernej Skrabec <jernej.skrabec@gmail.com> Link: https://lore.kernel.org/r/20220517013607.2252-2-qianfanguijin@163.com
2022-07-05Merge branch 'for-v5.20/aspeed-dts-cleanup' into for-v5.20/dts-cleanupKrzysztof Kozlowski
2022-07-05ARM: dts: aspeed: correct gpio-keys propertiesKrzysztof Kozlowski
gpio-keys children do not use unit addresses. Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Link: https://lore.kernel.org/r/20220616005333.18491-37-krzysztof.kozlowski@linaro.org
2022-07-05ARM: dts: aspeed: align gpio-key node names with dtschemaKrzysztof Kozlowski
The node names should be generic and DT schema expects certain pattern (e.g. with key/button/switch). Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Link: https://lore.kernel.org/r/20220616005333.18491-36-krzysztof.kozlowski@linaro.org
2022-07-05arm64: dts: exynosautov9: add usi device tree nodesChanho Park
Universal Serial Interface (USI) supports three types of serial interface such as Universal Asynchronous Receiver and Transmitter (UART), Serial Peripheral Interface (SPI), and Inter-Integrated Circuit (I2C). Each protocols can be working independently and configured as one of those using external configuration inputs. Exynos Auto v9 SoC support 12 USIs. When a USI uses two pins such as i2c and 3 wire uarts(RX/TX only), we can use remain two pins as i2c mode. So, we can define one USI node that includes serial/spi and hsi2c. usi_i2c nodes can be used only for i2c mode. We can have below combinations for one USI. 1) The usi node is used either 4 pin uart or 4 pin spi -> No usi_i2c can be used 2) The usi node is used 2 pin uart(RX/TX) and i2c(SDA/SCL) -> usi_i2c should be enabled to use the latter i2c 3) The usi node is used i2c(SDA/SCL) and i2c(SDA/SCL) -> usi_i2c should be enabled to use the latter i2c By default, all USIs are initially set to uart mode by below setting. samsung,mode = <USI_V2_UART>; You can change it either USI_V2_SPI or USI_V2_I2C. Signed-off-by: Chanho Park <chanho61.park@samsung.com> Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Link: https://lore.kernel.org/r/20220701015226.32781-6-chanho61.park@samsung.com
2022-07-05arm64: dts: exynosautov9: prepare usi0 changesChanho Park
Before adding whole USI nodes, this applies the changes of usi0 in advance. To be the usi0 and serian_0 nodes as SoC default, some properties should be moved to exynosautov9-sadk.dts. Signed-off-by: Chanho Park <chanho61.park@samsung.com> Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Link: https://lore.kernel.org/r/20220701015226.32781-5-chanho61.park@samsung.com
2022-07-05arm64: dts: exynosautov9: add pdma0 device tree nodeChanho Park
Add an ARM pl330 dma controller DT node as pdma0. Signed-off-by: Chanho Park <chanho61.park@samsung.com> Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Link: https://lore.kernel.org/r/20220701015226.32781-4-chanho61.park@samsung.com
2022-07-05dt-bindings: soc: samsung: usi: add exynosautov9-usi compatibleChanho Park
Add samsung,exynosautov9-usi dedicated compatible for representing USI of Exynos Auto v9 SoC. Signed-off-by: Chanho Park <chanho61.park@samsung.com> Reviewed-by: Sam Protsenko <semen.protsenko@linaro.org> Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Link: https://lore.kernel.org/r/20220701015226.32781-2-chanho61.park@samsung.com
2022-07-05arm64: dts: exynosautov9: correct spi11 pin namesChanho Park
They should be started with "gpp5-". Fixes: 31bbac5263aa ("arm64: dts: exynos: add initial support for exynosautov9 SoC") Signed-off-by: Chanho Park <chanho61.park@samsung.com> Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Link: https://lore.kernel.org/r/20220627005832.8709-1-chanho61.park@samsung.com
2022-07-05ARM: dts: stm32: Add ST MIPID02 bindings to AV96Marek Vasut
Add DT bindings for ST MIPID02 and DCMI to Avenger96 base DT. Both the ST MIPID02 and DCMI are disabled by default, as the AV96 camera module is optional. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Alexandre Torgue <alexandre.torgue@foss.st.com> Cc: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org> Cc: linux-stm32@st-md-mailman.stormreply.com To: linux-arm-kernel@lists.infradead.org Signed-off-by: Alexandre Torgue <alexandre.torgue@foss.st.com>
2022-07-05ARM: dts: stm32: Add alternate pinmux for RCC pinMarek Vasut
Add another mux option for RCC pin, this is used on AV96 board for e.g. sensor clock supply. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Alexandre Torgue <alexandre.torgue@foss.st.com> Cc: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org> Cc: Maxime Coquelin <mcoquelin.stm32@gmail.com> Cc: Patrice Chotard <patrice.chotard@foss.st.com> Cc: Patrick Delaunay <patrick.delaunay@foss.st.com> Cc: linux-stm32@st-md-mailman.stormreply.com To: linux-arm-kernel@lists.infradead.org Signed-off-by: Alexandre Torgue <alexandre.torgue@foss.st.com>
2022-07-05ARM: dts: stm32: Add alternate pinmux for DCMI pinsMarek Vasut
Add another mux option for DCMI pins, this is used on AV96 board. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Alexandre Torgue <alexandre.torgue@foss.st.com> Cc: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org> Cc: Maxime Coquelin <mcoquelin.stm32@gmail.com> Cc: Patrice Chotard <patrice.chotard@foss.st.com> Cc: Patrick Delaunay <patrick.delaunay@foss.st.com> Cc: linux-stm32@st-md-mailman.stormreply.com To: linux-arm-kernel@lists.infradead.org Signed-off-by: Alexandre Torgue <alexandre.torgue@foss.st.com>
2022-07-05ARM: dts: stm32: Add DHCOR based DRC Compact boardMarek Vasut
Add DT for DH DRC Compact unit, which is a universal controller device. The system has two ethernet ports, one CAN, RS485 and RS232, USB, uSD card slot, eMMC and SDIO Wi-Fi. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Alexandre Torgue <alexandre.torgue@foss.st.com> Cc: linux-stm32@st-md-mailman.stormreply.com To: linux-arm-kernel@lists.infradead.org Signed-off-by: Alexandre Torgue <alexandre.torgue@foss.st.com>
2022-07-05ARM: dts: stm32: Add alternate pinmux for UART5 pinsMarek Vasut
Add another mux option for UART5 pins, this is used on DRC Compact board. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Alexandre Torgue <alexandre.torgue@foss.st.com> Cc: linux-stm32@st-md-mailman.stormreply.com To: linux-arm-kernel@lists.infradead.org Signed-off-by: Alexandre Torgue <alexandre.torgue@foss.st.com>
2022-07-05ARM: dts: stm32: Add alternate pinmux for UART4 pinsMarek Vasut
Add another mux option for UART4 pins, this is used on DRC Compact board. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Alexandre Torgue <alexandre.torgue@foss.st.com> Cc: linux-stm32@st-md-mailman.stormreply.com To: linux-arm-kernel@lists.infradead.org Signed-off-by: Alexandre Torgue <alexandre.torgue@foss.st.com>
2022-07-05ARM: dts: stm32: Add alternate pinmux for UART3 pinsMarek Vasut
Add another mux option for UART3 pins, this is used on DRC Compact board. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Alexandre Torgue <alexandre.torgue@foss.st.com> Cc: linux-stm32@st-md-mailman.stormreply.com To: linux-arm-kernel@lists.infradead.org Signed-off-by: Alexandre Torgue <alexandre.torgue@foss.st.com>
2022-07-05ARM: dts: stm32: Add alternate pinmux for SPI2 pinsMarek Vasut
Add another mux option for SPI2 pins, this is used on DRC Compact board. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Alexandre Torgue <alexandre.torgue@foss.st.com> Cc: linux-stm32@st-md-mailman.stormreply.com To: linux-arm-kernel@lists.infradead.org Signed-off-by: Alexandre Torgue <alexandre.torgue@foss.st.com>
2022-07-05ARM: dts: stm32: Add alternate pinmux for CAN1 pinsMarek Vasut
Add another mux option for CAN1 pins, this is used on DRC Compact board. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Alexandre Torgue <alexandre.torgue@foss.st.com> Cc: linux-stm32@st-md-mailman.stormreply.com To: linux-arm-kernel@lists.infradead.org Signed-off-by: Alexandre Torgue <alexandre.torgue@foss.st.com>
2022-07-05dt-bindings: arm: stm32: Add compatible string for DH electronics DHCOR DRC ↵Marek Vasut
Compact Add DT compatible string for DH electronics STM32MP15xx DHCOR on DRC Compact carrier board into YAML DT binding document. This system is a general purpose DIN Rail Controller design. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Alexandre Torgue <alexandre.torgue@st.com> Cc: Maxime Coquelin <mcoquelin.stm32@gmail.com> Cc: Patrice Chotard <patrice.chotard@st.com> Cc: Patrick Delaunay <patrick.delaunay@st.com> Cc: Rob Herring <robh+dt@kernel.org> Cc: devicetree@vger.kernel.org Cc: linux-stm32@st-md-mailman.stormreply.com To: linux-arm-kernel@lists.infradead.org Reviewed-by: Rob Herring <robh@kernel.org> Signed-off-by: Alexandre Torgue <alexandre.torgue@foss.st.com>
2022-07-05ARM: dts: stm32: Fix SPI2 pinmux pin comments on stm32mp15Marek Vasut
Those pin comments refer to SPI2 pins, not SPI1 pins, update the comments. No functional change. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Alexandre Torgue <alexandre.torgue@foss.st.com> Cc: linux-stm32@st-md-mailman.stormreply.com To: linux-arm-kernel@lists.infradead.org Signed-off-by: Alexandre Torgue <alexandre.torgue@foss.st.com>
generated by cgit (git 2.34.1) at 2025-09-28 23:42:18 +0000