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2017-11-02irqchip: mips-gic: Make IPI bitmaps staticPaul Burton
We have 2 bitmaps used to keep track of interrupts dedicated to IPIs in the MIPS GIC irqchip driver. These bitmaps are only used from the one compilation unit of that driver, and so can be made static. Do so in order to avoid polluting the symbol table & global namespace. Signed-off-by: Paul Burton <paul.burton@mips.com> Cc: Jason Cooper <jason@lakedaemon.net> Cc: Marc Zyngier <marc.zyngier@arm.com> Cc: Thomas Gleixner <tglx@linutronix.de> Cc: linux-mips@linux-mips.org Signed-off-by: Marc Zyngier <marc.zyngier@arm.com>
2017-11-02irqchip: mips-gic: Share register writes in gic_set_type()Paul Burton
The gic_set_type() function included writes to the MIPS GIC polarity, trigger & dual-trigger registers in each case of a switch statement determining the IRQs type. This is all well & good when we only have a single cluster & thus a single GIC whose register we want to update. It will lead to significant duplication once we have multi-cluster support & multiple GICs to update. Refactor this such that we determine values for the polarity, trigger & dual-trigger registers and then have a single set of register writes following the switch statement. This will allow us to write the same values to each GIC in a multi-cluster system in a later patch, rather than needing to duplicate more register writes in each case. Signed-off-by: Paul Burton <paul.burton@mips.com> Cc: Jason Cooper <jason@lakedaemon.net> Cc: Marc Zyngier <marc.zyngier@arm.com> Cc: Thomas Gleixner <tglx@linutronix.de> Cc: linux-mips@linux-mips.org Signed-off-by: Marc Zyngier <marc.zyngier@arm.com>
2017-11-02irqchip: mips-gic: Remove gic_vpes variablePaul Burton
Following the past few patches nothing uses the gic_vpes variable any longer. Remove the dead code. Signed-off-by: Paul Burton <paul.burton@mips.com> Cc: Jason Cooper <jason@lakedaemon.net> Cc: Marc Zyngier <marc.zyngier@arm.com> Cc: Thomas Gleixner <tglx@linutronix.de> Cc: linux-mips@linux-mips.org Signed-off-by: Marc Zyngier <marc.zyngier@arm.com>
2017-11-02irqchip: mips-gic: Use num_possible_cpus() to reserve IPIsPaul Burton
Reserving a number of IPIs based upon the number of VPs reported by the GIC makes little sense for a few reasons: - The kernel may have been configured with NR_CPUS less than the number of VPs in the cluster, in which case using gic_vpes causes us to reserve more interrupts for IPIs than we will possibly use. - If a kernel is configured without support for multi-threading & runs on a system with multi-threading & multiple VPs per core then we'll similarly reserve more interrupts for IPIs than we will possibly use. - In systems with multiple clusters the GIC can only provide us with the number of VPs in its cluster, not across all clusters. In this case we'll reserve fewer interrupts for IPIs than we need. Fix these issues by using num_possible_cpus() instead, which in all cases is actually indicative of how many IPIs we may need. Signed-off-by: Paul Burton <paul.burton@mips.com> Cc: Jason Cooper <jason@lakedaemon.net> Cc: Marc Zyngier <marc.zyngier@arm.com> Cc: Thomas Gleixner <tglx@linutronix.de> Cc: linux-mips@linux-mips.org Signed-off-by: Marc Zyngier <marc.zyngier@arm.com>
2017-11-02irqchip: mips-gic: Configure EIC when CPUs come onlinePaul Burton
Rather than configuring EIC mode for all CPUs during boot, configure it locally on each when they come online. This will become important with multi-cluster support, since clusters may be powered on & off (for example via hotplug) and would lose the EIC configuration when powered off. Signed-off-by: Paul Burton <paul.burton@mips.com> Cc: Jason Cooper <jason@lakedaemon.net> Cc: Marc Zyngier <marc.zyngier@arm.com> Cc: Thomas Gleixner <tglx@linutronix.de> Cc: linux-mips@linux-mips.org Signed-off-by: Marc Zyngier <marc.zyngier@arm.com>
2017-11-02irqchip: mips-gic: Mask local interrupts when CPUs come onlinePaul Burton
We currently walk through the range 0..gic_vpes-1, expecting these values all to be valid Linux CPU numbers to provide to mips_cm_vp_id(), and masking all routable local interrupts during boot. This approach has a few drawbacks: - In multi-cluster systems we won't have access to all CPU's GIC local registers when the driver is probed, since clusters (and their GICs) may be powered down at this point & only brought online later. - In multi-cluster systems we may power down clusters at runtime, for example if we offline all CPUs within it via hotplug, and the cluster's GIC may lose state. We therefore need to reinitialise it when powering back up, which this approach does not take into account. - The range 0..gic_vpes-1 may not all be valid Linux CPU numbers, for example if we run a kernel configured to support fewer CPUs than the system it is running on actually has. In this case we'll get garbage values from mips_cm_vp_id() as we read past the end of the cpu_data array. Fix this and simplify the code somewhat by writing an all-bits-set value to the VP-local reset mask register when a CPU is brought online, before any local interrupts are configured for it. This removes the need for us to access all CPUs during driver probe, removing all of the problems described above. In the name of simplicity we drop the checks for routability of interrupts and simply clear the mask bits for all interrupts. Bits for non-routable local interrupts will have no effect so there's no point performing extra work to avoid modifying them. Signed-off-by: Paul Burton <paul.burton@mips.com> Cc: Jason Cooper <jason@lakedaemon.net> Cc: Marc Zyngier <marc.zyngier@arm.com> Cc: Thomas Gleixner <tglx@linutronix.de> Cc: linux-mips@linux-mips.org Signed-off-by: Marc Zyngier <marc.zyngier@arm.com>
2017-11-02irqchip: mips-gic: Use irq_cpu_online to (un)mask all-VP(E) IRQsPaul Burton
The gic_all_vpes_local_irq_controller chip currently attempts to operate on all CPUs/VPs in the system when masking or unmasking an interrupt. This has a few drawbacks: - In multi-cluster systems we may not always have access to all CPUs in the system. When all CPUs in a cluster are powered down that cluster's GIC may also power down, in which case we cannot configure its state. - Relatedly, if we power down a cluster after having configured interrupts for CPUs within it then the cluster's GIC may lose state & we need to reconfigure it. The current approach doesn't take this into account. - It's wasteful if we run Linux on fewer VPs than are present in the system. For example if we run a uniprocessor kernel on CPU0 of a system with 16 CPUs then there's no point in us configuring CPUs 1-15. - The implementation is also lacking in that it expects the range 0..gic_vpes-1 to represent valid Linux CPU numbers which may not always be the case - for example if we run on a system with more VPs than the kernel is configured to support. Fix all of these issues by only configuring the affected interrupts for CPUs which are online at the time, and recording the configuration in a new struct gic_all_vpes_chip_data for later use by CPUs being brought online. We register a CPU hotplug state (reusing CPUHP_AP_IRQ_GIC_STARTING which the ARM GIC driver uses, and which seems suitably generic for reuse with the MIPS GIC) and execute irq_cpu_online() in order to configure the interrupts on the newly onlined CPU. Signed-off-by: Paul Burton <paul.burton@mips.com> Cc: Jason Cooper <jason@lakedaemon.net> Cc: Marc Zyngier <marc.zyngier@arm.com> Cc: Thomas Gleixner <tglx@linutronix.de> Cc: linux-mips@linux-mips.org Signed-off-by: Marc Zyngier <marc.zyngier@arm.com>
2017-11-02irqchip: mips-gic: Inline gic_local_irq_domain_map()Paul Burton
The gic_local_irq_domain_map() function has only one callsite in gic_irq_domain_map(), and the split between the two functions makes it unclear that they duplicate calculations & checks. Inline gic_local_irq_domain_map() into gic_irq_domain_map() in order to clean this up. Doing this makes the following small issues obvious, and the patch tidies them up: - Both functions used GIC_HWIRQ_TO_LOCAL() to convert a hwirq number to a local IRQ number. We now only do this once. Although the compiler ought to have optimised this away before anyway, the change leaves us with less duplicate code. - gic_local_irq_domain_map() had a check for invalid local interrupt numbers (intr > GIC_LOCAL_INT_FDC). This condition can never occur because any hwirq higher than those used for local interrupts is a shared interrupt, which gic_irq_domain_map() already handles separately. We therefore remove this check. - The decision of whether to map the interrupt to gic_cpu_pin or timer_cpu_pin can be handled within the existing switch statement in gic_irq_domain_map(), shortening the code a little. The change additionally prepares us nicely for the following patch of the series which would otherwise need to duplicate the check for whether a local interrupt should be percpu_devid or just percpu (ie. the switch statement from gic_irq_domain_map()) in gic_local_irq_domain_map(). Signed-off-by: Paul Burton <paul.burton@mips.com> Cc: Jason Cooper <jason@lakedaemon.net> Cc: Marc Zyngier <marc.zyngier@arm.com> Cc: Thomas Gleixner <tglx@linutronix.de> Cc: linux-mips@linux-mips.org Signed-off-by: Marc Zyngier <marc.zyngier@arm.com>
2017-11-02irqchip/meson-gpio: add support for Meson8 SoCsMartin Blumenstingl
Meson8 uses the same GPIO interrupt controller IP block as the other Meson SoCs. A total of 134 pins can be spied on, which is the sum of: - 22 pins on bank GPIOX - 17 pins on bank GPIOY - 30 pins on bank GPIODV - 10 pins on bank GPIOH - 15 pins on bank GPIOZ - 7 pins on bank CARD - 19 pins on bank BOOT - 14 pins in the AO domain Acked-by: Kevin Hilman <khilman@baylibre.com> Acked-by: Rob Herring <robh@kernel.org> Signed-off-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com> Signed-off-by: Marc Zyngier <marc.zyngier@arm.com>
2017-11-02irqdomain: Update the comments of fwnode field of irq_domain structureDou Liyang
Commit: f110711a6053 ("irqdomain: Convert irqdomain-%3Eof_node to fwnode") converted of_node field to fwnode, but didn't update its comments. Update it. Fixes: f110711a6053 ("irqdomain: Convert irqdomain-%3Eof_node to fwnode") Signed-off-by: Dou Liyang <douly.fnst@cn.fujitsu.com> Signed-off-by: Marc Zyngier <marc.zyngier@arm.com>
2017-11-02irqchip/gic: Deal with broken firmware exposing only 4kB of GICv2 CPU interfaceMarc Zyngier
There is a lot of broken firmware out there that don't really expose the information the kernel requires when it comes with dealing with GICv2: (1) Firmware that only describes the first 4kB of GICv2 (2) Firmware that describe 128kB of CPU interface, while the usable portion of the address space is between 60 and 68kB So far, we only deal with (2). But we have platforms exhibiting behaviour (1), resulting in two sub-cases: (a) The GIC is occupying 8kB, as required by the GICv2 architecture (b) It is actually spread 128kB, and this is likely to be a version of (2) This patch tries to work around both (a) and (b) by poking at the outside of the described memory region, and try to work out what is actually there. This is of course unsafe, and should only be enabled if there is no way to otherwise fix the DT provided by the firmware (we provide a "irqchip.gicv2_force_probe" option to that effect). Note that for the time being, we restrict ourselves to GICv2 implementations provided by ARM, since there I have no knowledge of an alternative implementations. This could be relaxed if such an implementation comes to light on a broken platform. Reviewed-by: Christoffer Dall <cdall@linaro.org> Signed-off-by: Marc Zyngier <marc.zyngier@arm.com>
2017-11-02irqchip/gic-v3-its: Setup VLPI properties at map timeMarc Zyngier
So far, we require the hypervisor to update the VLPI properties once the the VLPI mapping has been established. While this makes it easy for the ITS driver, it creates a window where an incoming interrupt can be delivered with an unknown set of properties. Not very nice. Instead, let's add a "properties" field to the mapping structure, and use that to configure the VLPI before it actually gets mapped. Reviewed-by: Christoffer Dall <christoffer.dall@linaro.org> Signed-off-by: Marc Zyngier <marc.zyngier@arm.com>
2017-11-02Merge tag 'v4.14-rc3' into irq/irqchip-4.15Marc Zyngier
Required merge to get mainline irqchip updates. Signed-off-by: Marc Zyngier <marc.zyngier@arm.com>
2017-11-02jfs: Add missing NULL pointer check in __get_metapageJuerg Haefliger
alloc_metapage can return a NULL pointer so check for that. Signed-off-by: Juerg Haefliger <juerg.haefliger@canonical.com> Signed-off-by: Dave Kleikamp <dave.kleikamp@oracle.com>
2017-11-02Merge tag 'sound-4.14-rc8' of ↵Linus Torvalds
git://git.kernel.org/pub/scm/linux/kernel/git/tiwai/sound Pull sound fixes from Takashi Iwai: "Unfortunately we still have received a significant amount of changes at the late stage, but at least all are small and clear fixes. There are two fixes for ALSA core stuff, yet another timer race fix and sequencer lockdep annotation fix. Both are spotted by syzkaller, and not too serious but better to paper over quickly. All other commits are about ASoC drivers, most notably, a revert of RT5514 hotword control that was included in 4.14-rc (due to a kind of abuse of kctl TLV ABI), together with topology API fixes and other device-specific small fixes that should go for stable, too" * tag 'sound-4.14-rc8' of git://git.kernel.org/pub/scm/linux/kernel/git/tiwai/sound: ALSA: seq: Fix nested rwsem annotation for lockdep splat ALSA: timer: Add missing mutex lock for compat ioctls ASoC: rt5616: fix 0x91 default value ASoC: rt5659: connect LOUT Amp with Charge Pump ASoC: rt5659: register power bit of LOUT Amp ASoC: rt5663: Change the dev getting function in rt5663_irq ASoC: rt5514: Revert Hotword Model control ASoC: topology: Fix a potential memory leak in 'soc_tplg_dapm_widget_denum_create()' ASoC: topology: Fix a potential NULL pointer dereference in 'soc_tplg_dapm_widget_denum_create()' ASoC: rt5514-spi: check irq status to schedule data copy ASoC: adau17x1: Workaround for noise bug in ADC
2017-11-02Merge branch 'fixes-v4.14-rc7' of ↵Linus Torvalds
git://git.kernel.org/pub/scm/linux/kernel/git/jmorris/linux-security Pull key handling fixes from James Morris: "Fixes for the Keys subsystem by Eric Biggers" * 'fixes-v4.14-rc7' of git://git.kernel.org/pub/scm/linux/kernel/git/jmorris/linux-security: KEYS: fix out-of-bounds read during ASN.1 parsing KEYS: trusted: fix writing past end of buffer in trusted_read() KEYS: return full count in keyring_read() if buffer is too small
2017-11-02futex: futex_wake_op, do not fail on invalid opJiri Slaby
In commit 30d6e0a4190d ("futex: Remove duplicated code and fix undefined behaviour"), I let FUTEX_WAKE_OP to fail on invalid op. Namely when op should be considered as shift and the shift is out of range (< 0 or > 31). But strace's test suite does this madness: futex(0x7fabd78bcffc, 0x5, 0xfacefeed, 0xb, 0x7fabd78bcffc, 0xa0caffee); futex(0x7fabd78bcffc, 0x5, 0xfacefeed, 0xb, 0x7fabd78bcffc, 0xbadfaced); futex(0x7fabd78bcffc, 0x5, 0xfacefeed, 0xb, 0x7fabd78bcffc, 0xffffffff); When I pick the first 0xa0caffee, it decodes as: 0x80000000 & 0xa0caffee: oparg is shift 0x70000000 & 0xa0caffee: op is FUTEX_OP_OR 0x0f000000 & 0xa0caffee: cmp is FUTEX_OP_CMP_EQ 0x00fff000 & 0xa0caffee: oparg is sign-extended 0xcaf = -849 0x00000fff & 0xa0caffee: cmparg is sign-extended 0xfee = -18 That means the op tries to do this: (futex |= (1 << (-849))) == -18 which is completely bogus. The new check of op in the code is: if (encoded_op & (FUTEX_OP_OPARG_SHIFT << 28)) { if (oparg < 0 || oparg > 31) return -EINVAL; oparg = 1 << oparg; } which results obviously in the "Invalid argument" errno: FAIL: futex =========== futex(0x7fabd78bcffc, 0x5, 0xfacefeed, 0xb, 0x7fabd78bcffc, 0xa0caffee) = -1: Invalid argument futex.test: failed test: ../futex failed with code 1 So let us soften the failure to print only a (ratelimited) message, crop the value and continue as if it were right. When userspace keeps up, we can switch this to return -EINVAL again. [v2] Do not return 0 immediatelly, proceed with the cropped value. Fixes: 30d6e0a4190d ("futex: Remove duplicated code and fix undefined behaviour") Signed-off-by: Jiri Slaby <jslaby@suse.cz> Cc: Ingo Molnar <mingo@redhat.com> Cc: Peter Zijlstra <peterz@infradead.org> Cc: Darren Hart <dvhart@infradead.org> Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
2017-11-02skd: use ktime_get_real_seconds()Arnd Bergmann
Like many storage drivers, skd uses an unsigned 32-bit number for interchanging the current time with the firmware. This will overflow in y2106 and is otherwise safe. However, the get_seconds() function is generally considered deprecated since the behavior is different between 32-bit and 64-bit architectures, and using it may indicate a bigger problem. To annotate that we've thought about this, let's add a comment here and migrate to the ktime_get_real_seconds() function that consistently returns a 64-bit number. Signed-off-by: Arnd Bergmann <arnd@arndb.de> Signed-off-by: Jens Axboe <axboe@kernel.dk>
2017-11-02block: fix CDROM dependency on BLK_DEVArnd Bergmann
After the cdrom cleanup, I get randconfig warnings for some configurations: warning: (BLK_DEV_IDECD && BLK_DEV_SR) selects CDROM which has unmet direct dependencies (BLK_DEV) This adds an explicit BLK_DEV dependency for both drivers. The other drivers that select 'CDROM' already have this and don't need a change. Fixes: 2a750166a5be ("block: Rework drivers/cdrom/Makefile") Signed-off-by: Arnd Bergmann <arnd@arndb.de> Signed-off-by: Jens Axboe <axboe@kernel.dk>
2017-11-02mmc: dw_mmc: Convert timers to use timer_setup()Kees Cook
In preparation for unconditionally passing the struct timer_list pointer to all timer callbacks, switch to using the new timer_setup() and from_timer() to pass the timer pointer explicitly. Cc: Jaehoon Chung <jh80.chung@samsung.com> Cc: Ulf Hansson <ulf.hansson@linaro.org> Cc: linux-mmc@vger.kernel.org Signed-off-by: Kees Cook <keescook@chromium.org> Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
2017-11-02mmc: dw_mmc: Cleanup the DTO timer like the CTO oneDouglas Anderson
The recent CTO timer introduced in commit 03de19212ea3 ("mmc: dw_mmc: introduce timer for broken command transfer over scheme") was causing observable problems due to race conditions. Previous patches have fixed those race conditions. It can be observed that these same race conditions ought to be theoretically possible with the DTO timer too though they are massively less likely to happen because the data timeout is always set to 0xffffff right now. That means even at a 200 MHz card clock we were arming the DTO timer for 94 ms: >>> (0xffffff * 1000. / 200000000) + 10 93.886075 We always also were setting the DTO timer _after_ starting the transfer, unlike how the old code was seting the CTO timer. In any case, even though the DTO timer is much less likely to have races, it still makes sense to add code to handle it _just in case_. Signed-off-by: Douglas Anderson <dianders@chromium.org> Reviewed-by: Shawn Lin <shawn.lin@rock-chips.com> Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
2017-11-02Merge branch 'fixes' into nextUlf Hansson
2017-11-02mmc: vub300: Use common code in __download_offload_pseudocode()Markus Elfring
Add a jump target so that a specific string copy operation is stored only once at the end of this function implementation. Replace two calls of the function "strncpy" by goto statements. This issue was detected by using the Coccinelle software. Signed-off-by: Markus Elfring <elfring@users.sourceforge.net> Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
2017-11-02mmc: tmio: Use common error handling code in tmio_mmc_host_probe()Markus Elfring
* Add a jump target so that a bit of exception handling can be better reused at the end of this function. * Adjust condition checks. This issue was detected by using the Coccinelle software. Signed-off-by: Markus Elfring <elfring@users.sourceforge.net> Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
2017-11-02mmc: Convert timers to use timer_setup()Kees Cook
In preparation for unconditionally passing the struct timer_list pointer to all timer callbacks, switch to using the new timer_setup() and from_timer() to pass the timer pointer explicitly. Cc: Ludovic Desroches <ludovic.desroches@microchip.com> Cc: Ulf Hansson <ulf.hansson@linaro.org> Cc: Jaehoon Chung <jh80.chung@samsung.com> Cc: Carlo Caione <carlo@caione.org> Cc: Kevin Hilman <khilman@baylibre.com> Cc: Nicolas Pitre <nico@fluxnic.net> Cc: Jarkko Lavinen <jarkko.lavinen@nokia.com> Cc: Adrian Hunter <adrian.hunter@intel.com> Cc: Alex Dubov <oakad@yahoo.com> Cc: Bruce Chang <brucechang@via.com.tw> Cc: Harald Welte <HaraldWelte@viatech.com> Cc: Tony Olech <tony.olech@elandigitalsystems.com> Cc: Pierre Ossman <pierre@ossman.eu> Cc: Linus Walleij <linus.walleij@linaro.org> Cc: Paul Cercueil <paul@crapouillou.net> Cc: Heiner Kallweit <hkallweit1@gmail.com> Cc: Shawn Lin <shawn.lin@rock-chips.com> Cc: Arvind Yadav <arvind.yadav.cs@gmail.com> Cc: Allen <allen.lkml@gmail.com> Cc: linux-mmc@vger.kernel.org Cc: linux-arm-kernel@lists.infradead.org Cc: linux-amlogic@lists.infradead.org Cc: linux-omap@vger.kernel.org Cc: linux-usb@vger.kernel.org Signed-off-by: Kees Cook <keescook@chromium.org> Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
2017-11-02mmc: sdhci-acpi: Fix voltage switch for some Intel host controllersAdrian Hunter
Some Intel host controllers use an ACPI device-specific method to ensure correct voltage switching. Fix voltage switch for those, by adding a call to the DSM. Signed-off-by: Adrian Hunter <adrian.hunter@intel.com> Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
2017-11-02mmc: sdhci-acpi: Let devices define their own private dataAdrian Hunter
Let devices define their own private data to facilitate device-specific operations. The size of the private structure is specified in the sdhci_acpi_slot structure, then sdhci_acpi_probe() will allocate extra space for it, and sdhci_acpi_priv() can be used to get a reference to it. Signed-off-by: Adrian Hunter <adrian.hunter@intel.com> Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
2017-11-02mmc: mediatek: perfer to use rise edge latching for cmd lineChaotian Jing
data lines have applied to perfer to use rise edge, also need apply it to cmd line. Signed-off-by: Chaotian Jing <chaotian.jing@mediatek.com> Tested-by: Sean Wang <sean.wang@mediatek.com> Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
2017-11-02mmc: mediatek: improve eMMC hs400 mode read performanceChaotian Jing
enlarge outstanding value to improve read performance Signed-off-by: Chaotian Jing <chaotian.jing@mediatek.com> Tested-by: Sean Wang <sean.wang@mediatek.com> Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
2017-11-02mmc: mediatek: add latch-ck supportChaotian Jing
some platform(eg.mt2701) does not support "stop clk fix", in this case, need set correct latch-ck to avoid crc error caused by stop clock block-internally. Signed-off-by: Chaotian Jing <chaotian.jing@mediatek.com> Tested-by: Sean Wang <sean.wang@mediatek.com> Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
2017-11-02mmc: mediatek: add support of source_cg clockChaotian Jing
source clock need an independent cg to control, when doing clk mode switch, need gate source clock to avoid hw issue(multi-bit sync hw hang) Signed-off-by: Chaotian Jing <chaotian.jing@mediatek.com> Tested-by: Sean Wang <sean.wang@mediatek.com> Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
2017-11-02mmc: mediatek: add stop_clk fix and enhance_rx supportChaotian Jing
mt2712 supports stop_clk fix and enhance_rx, which can improve host stability. Signed-off-by: Chaotian Jing <chaotian.jing@mediatek.com> Tested-by: Sean Wang <sean.wang@mediatek.com> Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
2017-11-02mmc: mediatek: add busy_check supportChaotian Jing
bit7 of PATCH_BIT1 has different meaning in new design, to compatible with previous platform, clear this bit in new platform. Signed-off-by: Chaotian Jing <chaotian.jing@mediatek.com> Tested-by: Sean Wang <sean.wang@mediatek.com> Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
2017-11-02mmc: mediatek: add async fifo and data tune supportChaotian Jing
mt2701/mt2712 supports async fifo & data tune, which can improve host stability. Signed-off-by: Chaotian Jing <chaotian.jing@mediatek.com> Tested-by: Sean Wang <sean.wang@mediatek.com> Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
2017-11-02mmc: mediatek: add pad_tune0 supportChaotian Jing
from mt2701, the register of PAD_TUNE has been phased out, while there is a new register of PAD_TUNE0 Signed-off-by: Chaotian Jing <chaotian.jing@mediatek.com> Tested-by: Sean Wang <sean.wang@mediatek.com> Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
2017-11-02mmc: mediatek: make hs400_tune_response only for mt8173Chaotian Jing
the origin design of hs400_tune_response is for mt8173 because of mt8173 has a special design. for doing that, we add a new member "compatible", by now it's only for mt8173. Signed-off-by: Chaotian Jing <chaotian.jing@mediatek.com> Tested-by: Sean Wang <sean.wang@mediatek.com> Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
2017-11-02arm64: dts: mt8173: remove "mediatek, mt8135-mmc" from mmc nodesChaotian Jing
devicetree bindings has been updated to support multi-platforms, so that each platform has its owns compatible name. And, this compatible name may used in driver to distinguish with other platform. Signed-off-by: Chaotian Jing <chaotian.jing@mediatek.com> Tested-by: Sean Wang <sean.wang@mediatek.com> Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org> Acked-by: Matthias Brugger <matthias.bgg@gmail.com>
2017-11-02bitops: Revert cbe96375025e ("bitops: Add clear/set_bit32() to linux/bitops.h")Thomas Gleixner
These ops are not endian safe and may break on architectures which have aligment requirements. Reverts: cbe96375025e ("bitops: Add clear/set_bit32() to linux/bitops.h") Reported-by: Peter Zijlstra <peterz@infradead.org> Signed-off-by: Thomas Gleixner <tglx@linutronix.de> Cc: Andi Kleen <ak@linux.intel.com>
2017-11-02x86/cpuid: Replace set/clear_bit32()Thomas Gleixner
Peter pointed out that the set/clear_bit32() variants are broken in various aspects. Replace them with open coded set/clear_bit() and type cast cpu_info::x86_capability as it's done in all other places throughout x86. Fixes: 0b00de857a64 ("x86/cpuid: Add generic table for CPUID dependencies") Reported-by: Peter Ziljstra <peterz@infradead.org> Signed-off-by: Thomas Gleixner <tglx@linutronix.de> Cc: Andi Kleen <ak@linux.intel.com>
2017-11-02spi: orion: remove redundant assignment of status to zeroColin Ian King
The assignment of status to zero is never read, status is either updated in the next iteration of the of the loop or several lines after the end of the loop. Remove it, cleans up clang warning: drivers/spi/spi-orion.c:674:4: warning: Value stored to 'status' is never read Signed-off-by: Colin Ian King <colin.king@canonical.com> Signed-off-by: Mark Brown <broonie@kernel.org>
2017-11-02x86/entry/64: Shorten TEST instructionsBorislav Petkov
Convert TESTL to TESTB and save 3 bytes per callsite. No functionality change. Signed-off-by: Borislav Petkov <bp@suse.de> Cc: Andy Lutomirski <luto@kernel.org> Cc: Brian Gerst <brgerst@gmail.com> Cc: Dave Hansen <dave.hansen@intel.com> Cc: Linus Torvalds <torvalds@linux-foundation.org> Cc: Peter Zijlstra <peterz@infradead.org> Cc: Thomas Gleixner <tglx@linutronix.de> Link: http://lkml.kernel.org/r/20171102120926.4srwerqrr7g72e2k@pd.tnic Signed-off-by: Ingo Molnar <mingo@kernel.org>
2017-11-02kernel/time/Kconfig: Fix typo in commentRandy Dunlap
Fix typo in Kconfig comment text. Signed-off-by: Randy Dunlap <rdunlap@infradead.org> Signed-off-by: Thomas Gleixner <tglx@linutronix.de> Cc: John Stultz <john.stultz@linaro.org> Cc: Stephen Boyd <sboyd@codeaurora.org> Cc: Jiri Kosina <trivial@kernel.org> Link: https://lkml.kernel.org/r/0e586dd4-2b27-864e-c252-bc72df52fd01@infradead.org
2017-11-02s390/nmi: avoid using long-displacement facilityVasily Gorbik
__LC_MCESAD is currently 4528 /* offsetof(struct lowcore, mcesad) */ that would require long-displacement facility for lg, which we don't have on z900. Fixes: 3037a52f9846 ("s390/nmi: do register validation as early as possible") Signed-off-by: Vasily Gorbik <gor@linux.vnet.ibm.com> Signed-off-by: Martin Schwidefsky <schwidefsky@de.ibm.com>
2017-11-02spi: sh-msiof: Fix DMA transfer size checkHiromitsu Yamasaki
DMA supports 32-bit words only, even if BITLEN1 of SITMDR2 register is 16bit. Fixes: b0d0ce8b6b91 ("spi: sh-msiof: Add DMA support") Signed-off-by: Hiromitsu Yamasaki <hiromitsu.yamasaki.ym@renesas.com> Signed-off-by: Simon Horman <horms+renesas@verge.net.au> Acked-by: Geert Uytterhoeven <geert+renesas@glider.be> Acked-by: Dirk Behme <dirk.behme@de.bosch.com> Signed-off-by: Mark Brown <broonie@kernel.org>
2017-11-02regulator: qcom_spmi: Add support for pmi8994Rajendra Nayak
Document the regulators available on pmi8994 and add support for this PMIC to the SPMI PMIC regulator driver. Signed-off-by: Rajendra Nayak <rnayak@codeaurora.org> Signed-off-by: Mark Brown <broonie@kernel.org>
2017-11-02ASoC: intel: include linux/module.h as neededArnd Bergmann
The MODULE_DESCRIPTION() macro is only available when including the linux/module.h header. Apparently this is included indirectly from sst-firmware.c in some configurations, but not in others: sound/soc/intel/common/sst-firmware.c:1278:20: error: expected declaration specifiers or '...' before string constant MODULE_DESCRIPTION("Intel SST Firmware Loader"); ^~~~~~~~~~~~~~~~~~~~~~~~~~~ sound/soc/intel/common/sst-firmware.c:1279:16: error: expected declaration specifiers or '...' before string constant This adds the missing include line. Fixes: a395bdd6b24b ("ASoC: intel: Fix sst-dsp dependency on dw stuff") Signed-off-by: Arnd Bergmann <arnd@arndb.de> Signed-off-by: Mark Brown <broonie@kernel.org>
2017-11-02ASoC: Intel: fix Kconfig dependenciesArnd Bergmann
I ran into multiple problems during randconfig builds of the recently changed Kconfig logic for Intel ASoC drivers: - Building without DMADEVICES doesn't work in general - With that dependency added, we can relax the 'depends on X86' again and allow compile-testing, except for SND_SST_ATOM_HIFI2_PLATFORM, which depends on X86 for asm/platform_sst_audio.h - Skylake requires SND_SOC_INTEL_SST_ACPI, so we have to depend on ACPI in turn - Haswell needs SND_DMA_SGBUF for snd_sgbuf_aligned_pages() With the new set of dependencies, I no longer get any build failures. Signed-off-by: Arnd Bergmann <arnd@arndb.de> Signed-off-by: Mark Brown <broonie@kernel.org>
2017-11-02ASoC: stm32: sai: fix warning in stm32_sai_set_config()olivier moysan
Fix uninitialized warning introduced by "Move static settings to DAI init" commit in stm32_sai_set_config() function. Signed-off-by: Olivier Moysan <olivier.moysan@st.com> Signed-off-by: Mark Brown <broonie@kernel.org>
2017-11-02MIPS: Update email address for Marcin NowakowskiMarcin Nowakowski
MIPS is no longer part of Imagination Technologies and my @imgtec.com address will soon stop working. Update any files containing my address as well as the .mailmap to point to my new @mips.com address. Signed-off-by: Marcin Nowakowski <marcin.nowakowski@mips.com> Patchwork: https://patchwork.linux-mips.org/patch/17579/ Signed-off-by: James Hogan <jhogan@kernel.org>
2017-11-02staging: rtl8188eu: Revert 4 commits breaking ARPHans de Goede
Commit 2ba8444c97b1 ("staging:r8188eu: move IV/ICV trimming into decrypt() and also place it after rtl88eu_mon_recv_hook()") breaks ARP. After this commit ssh-ing to a laptop with r8188eu wifi no longer works if the machine connecting has never communicated with the laptop before. This is 100% reproducable using "arp -d <ipv4> && ssh <ipv4>" to ssh to a laptop with r8188eu wifi. This commit reverts 4 commits in total: 1. Commit 79650ffde38e ("staging:r8188eu: trim IV/ICV fields in validate_recv_data_frame()") This commit depends on 2 of the other commits being reverted. 2. Commit 02b19b4c4920 ("staging:r8188eu: inline unprotect_frame() in mon_recv_decrypted_recv()") The inline code is wrong the un-inlined version contains: if (skb->len < hdr_len + iv_len + icv_len) return; ... Where as the inline-ed code introduced by this commit does: if (skb->len < hdr_len + iv_len + icv_len) { ... Note the same check, but now to actually continue doing ... instead of to not do it, so this commit is no good. 3. Commit d86e16da6a5d ("staging:r8188eu: use different mon_recv_decrypted() inside rtl88eu_mon_recv_hook() and rtl88eu_mon_xmit_hook().") This commit introduced a 1:1 copy of a function so that one of the 2 copies can be modified in the 2 commits we're already reverting. 4. Commit 2ba8444c97b1 ("staging:r8188eu: move IV/ICV trimming into decrypt() and also place it after rtl88eu_mon_recv_hook()") This is the commit actually breaking ARP. Note this commit is a straight-forward squash of the revert of these 4 commits, without any changes. Cc: stable@vger.kernel.org Cc: Ivan Safonov <insafonov@gmail.com> Signed-off-by: Hans de Goede <hdegoede@redhat.com> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>