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2021-12-17dt-bindings: host1x: Document Memory Client resets of Host1x, GR2D and GR3DDmitry Osipenko
Memory Client should be blocked before hardware reset is asserted in order to prevent memory corruption and hanging of memory controller. Document Memory Client resets of Host1x, GR2D and GR3D hardware units. Reviewed-by: Rob Herring <robh@kernel.org> Signed-off-by: Dmitry Osipenko <digetx@gmail.com> Signed-off-by: Thierry Reding <treding@nvidia.com>
2021-12-17dt-bindings: host1x: Document OPP and power domain propertiesDmitry Osipenko
Document new DVFS OPP table and power domain properties of the Host1x bus and devices sitting on the bus. Reviewed-by: Rob Herring <robh@kernel.org> Signed-off-by: Dmitry Osipenko <digetx@gmail.com> Signed-off-by: Thierry Reding <treding@nvidia.com>
2021-12-17dt-bindings: clock: tegra-car: Document new clock sub-nodesDmitry Osipenko
Document sub-nodes which describe Tegra SoC clocks that require a higher voltage of the core power domain in order to operate properly on a higher clock rates. Each node contains a phandle to OPP table and power domain. The root PLLs and system clocks don't have any specific device dedicated to them, clock controller is in charge of managing power for them. Reviewed-by: Rob Herring <robh@kernel.org> Signed-off-by: Dmitry Osipenko <digetx@gmail.com> Signed-off-by: Thierry Reding <treding@nvidia.com>
2021-12-17dt-bindings: ARM: tegra: Document Pegatron ChagallDavid Heidelberg
Document Pegatron Chagall, which is Tegra30-based tablet device. Acked-by: Rob Herring <robh@kernel.org> Signed-off-by: David Heidelberg <david@ixit.cz> Signed-off-by: Dmitry Osipenko <digetx@gmail.com> Signed-off-by: Thierry Reding <treding@nvidia.com>
2021-12-17dt-bindings: ARM: tegra: Document ASUS TransformersSvyatoslav Ryhel
Document Tegra20/30/114-based ASUS Transformer Series tablet devices. This group includes EeePad TF101, Prime TF201, Pad TF300T, TF300TG Infinity TF700T, TF701T. Signed-off-by: David Heidelberg <david@ixit.cz> Signed-off-by: Anton Bambura <jenneron@protonmail.com> Signed-off-by: Svyatoslav Ryhel <clamor95@gmail.com> Acked-by: Rob Herring <robh@kernel.org> Signed-off-by: Dmitry Osipenko <digetx@gmail.com> Signed-off-by: Thierry Reding <treding@nvidia.com>
2021-12-17dt-bindings: usb: tegra-xudc: Document interconnects and iommus propertiesThierry Reding
Add the interconnects, interconnect-names and iommus properties to the device tree bindings for the Tegra XUDC controller. These are used to describe the device's paths to and from memory. Acked-by: Rob Herring <robh@kernel.org> Signed-off-by: Thierry Reding <treding@nvidia.com>
2021-12-17dt-bindings: serial: Document Tegra234 TCUThierry Reding
Add the compatible string for the TCU found on the Tegra234 SoC. Acked-by: Rob Herring <robh@kernel.org> Signed-off-by: Thierry Reding <treding@nvidia.com>
2021-12-17dt-bindings: serial: tegra-tcu: Convert to json-schemaThierry Reding
Convert the Tegra TCU device tree bindings to json-schema. Reviewed-by: Rob Herring <robh@kernel.org> Signed-off-by: Thierry Reding <treding@nvidia.com>
2021-12-17dt-bindings: thermal: tegra186-bpmp: Convert to json-schemaThierry Reding
Convert the Tegra186 (and later) BPMP thermal device tree bindings from the free-form text format to json-schema. Reviewed-by: Rob Herring <robh@kernel.org> Signed-off-by: Thierry Reding <treding@nvidia.com>
2021-12-17dt-bindings: firmware: tegra: Convert to json-schemaThierry Reding
Convert the NVIDIA Tegra186 (and later) BPMP bindings from the free-form text format to json-schema. Reviewed-by: Rob Herring <robh@kernel.org> Signed-off-by: Thierry Reding <treding@nvidia.com>
2021-12-17dt-bindings: tegra: pmc: Convert to json-schemaThierry Reding
Convert the NVIDIA Tegra186 (and later) PMC bindings from the free-form text format to json-schema. Reviewed-by: Rob Herring <robh@kernel.org> Signed-off-by: Thierry Reding <treding@nvidia.com>
2021-12-17dt-bindings: serial: 8250: Document Tegra234 UARTThierry Reding
Add the compatible string for the UART found on the Tegra234 SoC. Acked-by: Rob Herring <robh@kernel.org> Signed-off-by: Thierry Reding <treding@nvidia.com>
2021-12-17dt-bindings: mmc: tegra: Document Tegra234 SDHCIThierry Reding
Add the compatible string for the SDHCI block found on the Tegra234 SoC. Acked-by: Rob Herring <robh@kernel.org> Signed-off-by: Thierry Reding <treding@nvidia.com>
2021-12-17dt-bindings: fuse: tegra: Document Tegra234 FUSEThierry Reding
Add the compatible string for the FUSE block found on the Tegra234 SoC. Acked-by: Rob Herring <robh@kernel.org> Signed-off-by: Thierry Reding <treding@nvidia.com>
2021-12-17dt-bindings: fuse: tegra: Convert to json-schemaThierry Reding
Convert the NVIDIA Tegra FUSE bindings from the free-form text format to json-schema. Reviewed-by: Rob Herring <robh@kernel.org> Signed-off-by: Thierry Reding <treding@nvidia.com>
2021-12-17dt-bindings: rtc: tegra: Document Tegra234 RTCThierry Reding
Add the compatible string for the RTC block found on the Tegra234 SoC. Acked-by: Rob Herring <robh@kernel.org> Signed-off-by: Thierry Reding <treding@nvidia.com>
2021-12-17dt-bindings: rtc: tegra: Convert to json-schemaThierry Reding
Convert the NVIDIA Tegra RTC bindings from the free-form text format to json-schema. Reviewed-by: Rob Herring <robh@kernel.org> Signed-off-by: Thierry Reding <treding@nvidia.com>
2021-12-17dt-bindings: mailbox: tegra: Document Tegra234 HSPThierry Reding
Add the compatible string for the HSP block found on the Tegra234 SoC. Acked-by: Rob Herring <robh@kernel.org> Signed-off-by: Thierry Reding <treding@nvidia.com>
2021-12-17dt-bindings: mailbox: tegra: Convert to json-schemaThierry Reding
Convert the NVIDIA Tegra HSP bindings from the free-form text format to json-schema. Reviewed-by: Rob Herring <robh@kernel.org> Signed-off-by: Thierry Reding <treding@nvidia.com>
2021-12-17dt-bindings: mmc: tegra: Convert to json-schemaThierry Reding
Convert the NVIDIA Tegra SDHCI bindings from the free-form text format to json-schema. Reviewed-by: Rob Herring <robh@kernel.org> Signed-off-by: Thierry Reding <treding@nvidia.com>
2021-12-17ARM: tegra: Add host1x hotflush reset on Tegra124Thierry Reding
Add the host1x memory client hotflush reset on Tegra124. Signed-off-by: Thierry Reding <treding@nvidia.com>
2021-12-17ARM: tegra: Add memory client hotflush resets on Tegra114Thierry Reding
Add the host1x, gr2d and gr3d memory client hotflush resets on Tegra114. Signed-off-by: Thierry Reding <treding@nvidia.com>
2021-12-17asm-generic/error-injection.h: fix a spelling mistake, and a coding style issueWasin Thonkaew
Fix a spelling mistake "ganerating" -> "generating". Remove trailing semicolon for a macro ALLOW_ERROR_INJECTION to fix a coding style issue. Signed-off-by: Wasin Thonkaew <wasin@wasin.io> Acked-by: Masami Hiramatsu <mhiramat@kernel.org> Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2021-12-17arch: Remove leftovers from prism54 wireless driverAlexandre Ghiti
This driver was removed so remove all references to it. Fixes: d249ff28b1d8 ("intersil: remove obsolete prism54 wireless driver") Signed-off-by: Alexandre Ghiti <alexandre.ghiti@canonical.com> Acked-by: Thomas Bogendoerfer <tsbogend@alpha.franken.de> Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2021-12-17arch: Remove leftovers from mandatory file lockingAlexandre Ghiti
This config was removed so remove all references to it. Fixes: f7e33bdbd6d1 ("fs: remove mandatory file locking support") Signed-off-by: Alexandre Ghiti <alexandre.ghiti@canonical.com> Reviewed-by: Jeff Layton <jlayton@kernel.org> Acked-by: Thomas Bogendoerfer <tsbogend@alpha.franken.de> Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2021-12-17Documentation, arch: Remove leftovers from CIFS_WEAK_PW_HASHAlexandre Ghiti
This config was removed so remove all references to it. Fixes: 76a3c92ec9e0 ("cifs: remove support for NTLM and weaker authentication algorithms") Signed-off-by: Alexandre Ghiti <alexandre.ghiti@canonical.com> Reviewed-by: Steve French <smfrench@gmail.com> Acked-by: Arnd Bergmann <arnd@arndb.de> [arch/arm/configs] Acked-by: Thomas Bogendoerfer <tsbogend@alpha.franken.de> Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2021-12-17Documentation, arch: Remove leftovers from raw deviceAlexandre Ghiti
Raw device interface was removed so remove all references to configs related to it. Fixes: 603e4922f1c8 ("remove the raw driver") Signed-off-by: Alexandre Ghiti <alexandre.ghiti@canonical.com> Acked-by: Arnd Bergmann <arnd@arndb.de> [arch/arm/configs] Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2021-12-17ARM: 9169/1: entry: fix Thumb2 bug in iWMMXt exception handlingArd Biesheuvel
The Thumb2 version of the FP exception handling entry code treats the register holding the CP number (R8) differently, resulting in the iWMMXT CP number check to be incorrect. Fix this by unifying the ARM and Thumb2 code paths, and switch the order of the additions of the TI_USED_CP offset and the shifted CP index. Cc: <stable@vger.kernel.org> Fixes: b86040a59feb ("Thumb-2: Implementation of the unified start-up and exceptions code") Signed-off-by: Ard Biesheuvel <ardb@kernel.org> Signed-off-by: Russell King (Oracle) <rmk+kernel@armlinux.org.uk>
2021-12-17ARM: 9160/1: NOMMU: Reload __secondary_data after PROCINFO_INITFUNCVladimir Murzin
__secondary_data used to reside in r7 around call to PROCINFO_INITFUNC. After commit 95731b8ee63e ("ARM: 9059/1: cache-v7: get rid of mini-stack") r7 is used as a scratch register, so we have to reload __secondary_data before we setup the stack pointer. Fixes: 95731b8ee63e ("ARM: 9059/1: cache-v7: get rid of mini-stack") Signed-off-by: Vladimir Murzin <vladimir.murzin@arm.com> Signed-off-by: Russell King (Oracle) <rmk+kernel@armlinux.org.uk>
2021-12-17ARM: reduce the information printed in call tracesRussell King
A while back, Linus complained about the numeric values printed by the ARM backtracing code. Printing these values does not make sense if one does not have access to the kernel ELF image (as is normally the case when helping a third party on a mailing list), but if one does, they can be very useful to find the code, rather than searching for the function name, and then doing hex math to work out where the backtrace entry is referring to. Provide an option to control whether this information is included, which will only be visible if EXPERT is enabled. Signed-off-by: Russell King <rmk+kernel@armlinux.org.uk>
2021-12-17ARM: 9168/1: Add support for Cortex-M55 processorTigran Tadevosyan
Add processor info object for ARM Cortex-M55 CPU which inherits the setup procedure, the processor and cache operation function from Cortex-M7 processor info object. Signed-off-by: Tigran Tadevosyan <tigran.tadevosyan@arm.com> Signed-off-by: Vladimir Murzin <vladimir.murzin@arm.com> Signed-off-by: Russell King (Oracle) <rmk+kernel@armlinux.org.uk>
2021-12-17ARM: 9167/1: Add support for Cortex-M33 processorVladimir Murzin
Cortex-M33 is the first feature rich implementation of the Armv8-M architecture (still compatible with v7M) Signed-off-by: Vladimir Murzin <vladimir.murzin@arm.com> Signed-off-by: Russell King (Oracle) <rmk+kernel@armlinux.org.uk>
2021-12-17ARM: 9166/1: Support KFENCE for ARMWang Kefeng
Add architecture specific implementation details for KFENCE and enable KFENCE on ARM. In particular, this implements the required interface in <asm/kfence.h>. KFENCE requires that attributes for pages from its memory pool can individually be set. Therefore, force the kfence pool to be mapped at page granularity. Testing this patch using the testcases in kfence_test.c and all passed with or without ARM_LPAE. Acked-by: Marco Elver <elver@google.com> Signed-off-by: Kefeng Wang <wangkefeng.wang@huawei.com> Signed-off-by: Russell King (Oracle) <rmk+kernel@armlinux.org.uk>
2021-12-17ARM: 9165/1: mm: Provide is_write_fault()Wang Kefeng
The function will check whether the fault is caused by a write access, it will be called in die_kernel_fault() too in next patch, so put it before the function of die_kernel_fault(). Acked-by: Marco Elver <elver@google.com> Signed-off-by: Kefeng Wang <wangkefeng.wang@huawei.com> Signed-off-by: Russell King (Oracle) <rmk+kernel@armlinux.org.uk>
2021-12-17ARM: 9164/1: mm: Provide set_memory_valid()Wang Kefeng
This function validates and invalidates PTE entries, it will be used in the later patch. Acked-by: Marco Elver <elver@google.com> Signed-off-by: Kefeng Wang <wangkefeng.wang@huawei.com> Signed-off-by: Russell King (Oracle) <rmk+kernel@armlinux.org.uk>
2021-12-17ARM: 9163/1: amba: Move of_amba_device_decode_irq() into amba_probe()Wang Kefeng
Similar to other resources the AMBA bus "gets" for the device, move irq obtain from amba_device_add() to amba_probe(). Signed-off-by: Kefeng Wang <wangkefeng.wang@huawei.com> Signed-off-by: Russell King (Oracle) <rmk+kernel@armlinux.org.uk>
2021-12-17ARM: 9162/1: amba: Kill sysfs attribute file of irqWang Kefeng
As Rob said[1], there doesn't seem to be any users about the sysfs attribute file of irq[0] and irq[1]. And we don't need to include <asm/irq.h> as NO_IRQ has gone. Let's kill both of them. [1] https://lkml.org/lkml/2021/8/25/461 Acked-by: Rob Herring <robh@kernel.org> Signed-off-by: Kefeng Wang <wangkefeng.wang@huawei.com> Signed-off-by: Russell King (Oracle) <rmk+kernel@armlinux.org.uk>
2021-12-17ARM: 9161/1: mm: mark private VM_FAULT_X defines as vm_fault_tWang Kefeng
This fixes several sparse warnings for fault.c: arch/arm/mm/fault.c:210:24: sparse: expected restricted vm_fault_t arch/arm/mm/fault.c:210:24: sparse: got int ... arch/arm/mm/fault.c:345:24: sparse: sparse: restricted vm_fault_t degrades to integer Reported-by: kernel test robot <lkp@intel.com> Fixes: caed89dab0ca ("ARM: 9128/1: mm: Refactor the __do_page_fault()") Signed-off-by: Kefeng Wang <wangkefeng.wang@huawei.com> Signed-off-by: Russell King (Oracle) <rmk+kernel@armlinux.org.uk>
2021-12-17ARM: 9159/1: decompressor: Avoid UNPREDICTABLE NOP encodingAndre Przywara
In the decompressor's head.S we need to start with an instruction that is some kind of NOP, but also mimics as the PE/COFF header, when the kernel is linked as an UEFI application. The clever solution here is "tstne r0, #0x4d000", which in the worst case just clobbers the condition flags, and bears the magic "MZ" signature in the lowest 16 bits. However the encoding used (0x13105a4d) is actually not valid, since bits [15:12] are supposed to be 0 (written as "(0)" in the ARM ARM). Violating this is UNPREDICTABLE, and *can* trigger an UNDEFINED exception. Common Cortex cores seem to ignore those bits, but QEMU chooses to trap, so the code goes fishing because of a missing exception handler at this point. We are just saved by the fact that commonly (with -kernel or when running from U-Boot) the "Z" bit is set, so the instruction is never executed. See [0] for more details. To make things more robust and avoid UNPREDICTABLE behaviour in the kernel code, lets replace this with a "two-instruction NOP": The first instruction is an exclusive OR, the effect of which the second instruction reverts. This does not leave any trace, neither in a register nor in the condition flags. Also it's a perfectly valid encoding. Kudos to Peter Maydell for coming up with this gem. [0] https://lore.kernel.org/qemu-devel/YTPIdbUCmwagL5%2FD@os.inf.tu-dresden.de/T/ Link: https://lore.kernel.org/linux-arm-kernel/20210908162617.104962-1-andre.przywara@arm.com/T/ Fixes: 81a0bc39ea19 ("ARM: add UEFI stub support") Signed-off-by: Andre Przywara <andre.przywara@arm.com> Reported-by: Adam Lackorzynski <adam@l4re.org> Suggested-by: Peter Maydell <peter.maydell@linaro.org> Reviewed-by: Ard Biesheuvel <ardb@kernel.org> Reviewed-by: Linus Walleij <linus.walleij@linaro.org> Signed-off-by: Russell King (Oracle) <rmk+kernel@armlinux.org.uk>
2021-12-17ARM: 9158/1: leave it to core code to manage thread_info::cpuArd Biesheuvel
Since commit bcf9033e5449 ("sched: move CPU field back into thread_info if THREAD_INFO_IN_TASK=y"), the CPU field in thread_info went back to being managed by the core code, so we no longer have to keep it in sync in arch code. While at it, mark THREAD_INFO_IN_TASK as done for ARM in the documentation. Reviewed-by: Linus Walleij <linus.walleij@linaro.org> Signed-off-by: Ard Biesheuvel <ardb@kernel.org> Signed-off-by: Russell King (Oracle) <rmk+kernel@armlinux.org.uk>
2021-12-17ARM: 9154/1: decompressor: do not copy source files while buildingMasahiro Yamada
As commit 7ae4a78daacf ("ARM: 8969/1: decompressor: simplify libfdt builds") stated, copying source files during the build time may not end up with as clean code as expected. Do similar for the other library files for further cleanups of the Makefile and .gitignore. Signed-off-by: Masahiro Yamada <masahiroy@kernel.org> Signed-off-by: Russell King (Oracle) <rmk+kernel@armlinux.org.uk>
2021-12-17Merge tag 'intel-gpio-v5.17-1' of ↵Bartosz Golaszewski
gitolite.kernel.org:pub/scm/linux/kernel/git/andy/linux-gpio-intel into gpio/for-next intel-gpio for v5.17-1 - Don't set type for IRQ already in use in case of ACPI - Drop unused call from GPIO ACPI library - Clean up ML IOH and PCH GPIO drivers to make it closer to each other - Clarify use of register file version in DesignWare driver - other minor tweaks
2021-12-17gpiolib: allow line names from device props to override driver namesPeter Rosin
Some GPIO providers set names for GPIO lines that match the names of the pins on the SoC, or variations on that theme. These names are generic more often that not, such as pioC12 in the at91 case. These generic names block the possibility to set more useful GPIO line names with device properties (i.e. gpio-line-names). Allow overriding a generic name given by the GPIO driver if there is a name given to the GPIO line using device properties, but leave the generic name alone if no better name is available. However, there is a risk. If user space is depending on the above mentioned fixed GPIO names, AND there are device properties that previously did not reach the surface, the name change might cause regressions. But hopefully this stays below the radar... Reviewed-by: Andy Shevchenko <andy.shevchenko@gmail.com> Tested-by: Alexander Dahl <ada@thorsis.com> Signed-off-by: Peter Rosin <peda@axentia.se> Signed-off-by: Bartosz Golaszewski <brgl@bgdev.pl>
2021-12-17selftests: gpio: gpio-sim: avoid forking test twiceBartosz Golaszewski
Use '-o' within [] in order to avoid spawning two processes for test. Suggested-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Signed-off-by: Bartosz Golaszewski <brgl@bgdev.pl> Reviewed-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
2021-12-17selftests: gpio: gpio-sim: remove bashismsBartosz Golaszewski
'==' is a bashisms and not understood by POSIX shell. Drop it from gpio-sim selftests. Signed-off-by: Bartosz Golaszewski <brgl@bgdev.pl>
2021-12-17gpio: amdpt: add new device ID and 24-pin supportHsu Yuchang
Add an ACPI HID(AMDIF031) and pin number in the pt_gpio_acpi_match. Signed-off-by: Yuchang Hsu <Richard_Hsu@asmedia.com.tw> Reviewed-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Signed-off-by: Bartosz Golaszewski <brgl@bgdev.pl>
2021-12-17gpio: tegra186: Add support for Tegra234Prathamesh Shete
Extend the existing Tegra186 GPIO controller driver with support for the GPIO controller found on Tegra234. While the programming model remains the same, the number of pins has slightly changed. Signed-off-by: Prathamesh Shete <pshete@nvidia.com> Reviewed-by: Linus Walleij <linus.walleij@linaro.org> Signed-off-by: Thierry Reding <treding@nvidia.com> Signed-off-by: Bartosz Golaszewski <brgl@bgdev.pl>
2021-12-17dt-bindings: gpio: Add Tegra234 supportPrathamesh Shete
Extend the existing Tegra186 GPIO controller device tree bindings with support for the GPIO controller found on Tegra234. The number of pins is slightly different, but the programming model remains the same. Signed-off-by: Prathamesh Shete <pshete@nvidia.com> Reviewed-by: Linus Walleij <linus.walleij@linaro.org> Reviewed-by: Rob Herring <robh@kernel.org> [treding@nvidia.com: update device tree bindings] Signed-off-by: Thierry Reding <treding@nvidia.com> Signed-off-by: Bartosz Golaszewski <brgl@bgdev.pl>
2021-12-17dt-bindings: gpio: tegra186: Convert to json-schemaThierry Reding
Convert the Tegra186 GPIO controller device tree bindings from free-form text format to json-schema. Reviewed-by: Linus Walleij <linus.walleij@linaro.org> Reviewed-by: Rob Herring <robh@kernel.org> Signed-off-by: Thierry Reding <treding@nvidia.com> Signed-off-by: Bartosz Golaszewski <brgl@bgdev.pl>
2021-12-17dt-bindings: gpio: tegra: Convert to json-schemaThierry Reding
Convert the NVIDIA Tegra GPIO controller device tree bindings from free-form text format to json-schema. Reviewed-by: Linus Walleij <linus.walleij@linaro.org> Reviewed-by: Rob Herring <robh@kernel.org> Signed-off-by: Thierry Reding <treding@nvidia.com> Signed-off-by: Bartosz Golaszewski <brgl@bgdev.pl>
generated by cgit (git 2.34.1) at 2025-09-28 23:44:13 +0000