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2017-02-16drm/i915: A hotfix for making aliasing PPGTT work for GVT-gZhi Wang
This patch makes PPGTT page table non-shrinkable when using aliasing PPGTT mode. It's just a temporary solution for making GVT-g work. Fixes: 2ce5179fe826 ("drm/i915/gtt: Free unused lower-level page tables") Cc: Tvrtko Ursulin <tvrtko.ursulin@linux.intel.com> Cc: Michal Winiarski <michal.winiarski@intel.com> Cc: Michel Thierry <michel.thierry@intel.com> Cc: Mika Kuoppala <mika.kuoppala@intel.com> Cc: Joonas Lahtinen <joonas.lahtinen@linux.intel.com> Cc: Chris Wilson <chris@chris-wilson.co.uk> Cc: Daniel Vetter <daniel.vetter@intel.com> Cc: Zhenyu Wang <zhenyuw@linux.intel.com> Cc: Zhiyuan Lv <zhiyuan.lv@intel.com> Signed-off-by: Zhi Wang <zhi.a.wang@intel.com> Link: http://patchwork.freedesktop.org/patch/msgid/1486559013-25251-2-git-send-email-zhi.a.wang@intel.com Reviewed-by: Chris Wilson <chris@chris-wilson.co.uk> Cc: <stable@vger.kernel.org> # v4.10 Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk> (cherry picked from commit e81ecb5e31db6c2a259d694738cf620d9fa70861) Signed-off-by: Jani Nikula <jani.nikula@intel.com>
2017-02-16drm/i915: Restore context and pd for ringbuffer submission after resetChris Wilson
Following a reset, the context and page directory registers are lost. However, the queue of requests that we resubmit after the reset may depend upon them - the registers are restored from a context image, but that restore may be inhibited and may simply be absent from the request if it was in the middle of a sequence using the same context. If we prime the CCID/PD registers with the first request in the queue (even for the hung request), we prevent invalid memory access for the following requests (and continually hung engines). v2: Magic BIT(8), reserved for future use but still appears unused. v3: Some commentary on handling innocent vs guilty requests v4: Add a wait for PD_BASE fetch. The reload appears to be instant on my Ivybridge, but this bit probably exists for a reason. Fixes: 821ed7df6e2a ("drm/i915: Update reset path to fix incomplete requests") Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk> Cc: Tvrtko Ursulin <tvrtko.ursulin@intel.com> Cc: Mika Kuoppala <mika.kuoppala@intel.com> Link: http://patchwork.freedesktop.org/patch/msgid/20170207152437.4252-1-chris@chris-wilson.co.uk Reviewed-by: Mika Kuoppala <mika.kuoppala@intel.com> (cherry picked from commit c0dcb203fb009678e5be9e7782329dcfbbf16439) Signed-off-by: Jani Nikula <jani.nikula@intel.com>
2017-02-16drm/i915: Let execlist_update_context() cover !FULL_PPGTT mode.Zhi Wang
execlist_update_context() will try to update PDPs in a context before a ELSP submission only for full PPGTT mode, while PDPs was populated during context initialization. Now the latter code path is removed. Let execlist_update_context() also cover !FULL_PPGTT mode. Fixes: 34869776c76b ("drm/i915: check ppgtt validity when init reg state") Cc: Tvrtko Ursulin <tvrtko.ursulin@linux.intel.com> Cc: Michal Winiarski <michal.winiarski@intel.com> Cc: Michel Thierry <michel.thierry@intel.com> Cc: Joonas Lahtinen <joonas.lahtinen@linux.intel.com> Cc: Chris Wilson <chris@chris-wilson.co.uk> Cc: Zhenyu Wang <zhenyuw@linux.intel.com> Cc: Zhiyuan Lv <zhiyuan.lv@intel.com> Signed-off-by: Zhi Wang <zhi.a.wang@intel.com> Link: http://patchwork.freedesktop.org/patch/msgid/1486377436-15380-1-git-send-email-zhi.a.wang@intel.com Reviewed-by: Chris Wilson <chris@chris-wilson.co.uk> Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk> (cherry picked from commit 04da811b3d821567e7a9a8a0baf48a6c1718b582) Signed-off-by: Jani Nikula <jani.nikula@intel.com>
2017-02-16drm/i915/lspcon: Fix resume time initialization due to unasserted HPDImre Deak
During system resume time initialization the HPD level on LSPCON ports can stay low for an extended amount of time, leading to failed AUX transfers and LSPCON initialization. Fix this by waiting for HPD to get asserted. Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=99178 Cc: Shashank Sharma <shashank.sharma@intel.com> Cc: Jani Nikula <jani.nikula@linux.intel.com> Cc: Ville Syrjälä <ville.syrjala@linux.intel.com> Cc: Daniel Vetter <daniel.vetter@ffwll.ch> Cc: <stable@vger.kernel.org> # v4.9+ Signed-off-by: Imre Deak <imre.deak@intel.com> Reviewed-by: Shashank Sharma <shashank.sharma@intel.com> Link: http://patchwork.freedesktop.org/patch/msgid/1485509961-9010-3-git-send-email-imre.deak@intel.com (cherry picked from commit 390b4e00241ce14ca3967c4698c8f6a158c5a674) Signed-off-by: Jani Nikula <jani.nikula@intel.com>
2017-02-16drm/i915/gen9+: Enable hotplug detection earlyImre Deak
For LSPCON resume time initialization we need to sample the corresponding pin's HPD level, but this is only available when HPD detection is enabled. Currently we enable detection only when enabling HPD interrupts which is too late, so bring the enabling of detection earlier. This is needed by the next patch. Cc: Shashank Sharma <shashank.sharma@intel.com> Cc: Jani Nikula <jani.nikula@linux.intel.com> Cc: Ville Syrjälä <ville.syrjala@linux.intel.com> Cc: Daniel Vetter <daniel.vetter@ffwll.ch> Cc: <stable@vger.kernel.org> # v4.9+ Signed-off-by: Imre Deak <imre.deak@intel.com> Reviewed-by: Shashank Sharma <shashank.sharma@intel.com> Link: http://patchwork.freedesktop.org/patch/msgid/1485509961-9010-2-git-send-email-imre.deak@intel.com (cherry picked from commit 7fff8126d9cc902b2636d05d5d34894a75174993) Signed-off-by: Jani Nikula <jani.nikula@intel.com>
2017-02-16drm/i915: Reject set-tiling-ioctl with stride==0 and a tiling modeChris Wilson
In commit 957870f93412 ("drm/i915: Split out i915_gem_object_set_tiling()"), I swapped an alignment check for IS_ALIGNED and in the process removed the less-than check. That check turns out to be important as it was the only rejection for stride == 0. Tvrtko did spot it, but I was overconfident in the IS_ALIGNED() conversion. Fixes: 957870f93412 ("drm/i915: Split out i915_gem_object_set_tiling()") Testcase: igt/gem_tiling_max_stride Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk> Cc: Chris Wilson <chris@chris-wilson.co.uk> Cc: Tvrtko Ursulin <tvrtko.ursulin@intel.com> Link: http://patchwork.freedesktop.org/patch/msgid/20170203105652.27819-1-chris@chris-wilson.co.uk Reviewed-by: Tvrtko Ursulin <tvrtko.ursulin@intel.com> (cherry picked from commit 52da22e7aba155be238faff4f6e97b2eb9de64f3) Signed-off-by: Jani Nikula <jani.nikula@intel.com>
2017-02-16drm/i915: Recreate internal objects with single page segments if dmar failsChris Wilson
If we fail to dma-map the object, the most common cause is lack of space inside the SW-IOTLB due to fragmentation. If we recreate the_sg_table using segments of PAGE_SIZE (and single page allocations), we may succeed in remapping the scatterlist. First became a significant problem for the mock selftests after commit 5584f1b1d73e ("drm/i915: fix i915 running as dom0 under Xen") increased the max_order. Fixes: 920cf4194954 ("drm/i915: Introduce an internal allocator for disposable private objects") Fixes: 5584f1b1d73e ("drm/i915: fix i915 running as dom0 under Xen") Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk> Cc: Tvrtko Ursulin <tvrtko.ursulin@linux.intel.com> Link: http://patchwork.freedesktop.org/patch/msgid/20170202132721.12711-1-chris@chris-wilson.co.uk Reviewed-by: Tvrtko Ursulin <tvrtko.ursulin@linux.intel.com> Cc: <stable@vger.kernel.org> # v4.10 (cherry picked from commit bb96dcf5830e5d81a1da2e2a14e6c0f7dfc64348) Signed-off-by: Jani Nikula <jani.nikula@intel.com>
2017-02-16Merge tag 'gvt-next-2017-02-15' of https://github.com/01org/gvt-linux into ↵Jani Nikula
drm-intel-next-fixes gvt-next-2017-02-15 - Chuanxiao's IOMMU workaround fix - debug message cleanup from Changbin - oops fix in fail path of workload submission when GPU reset from Changbin - other misc fixes Signed-off-by: Jani Nikula <jani.nikula@intel.com>
2017-02-16Merge tag 'gvt-next-2017-02-07' of https://github.com/01org/gvt-linux into ↵Jani Nikula
drm-intel-next-fixes From Zhenyu, "These are GVT-g changes for 4.11 merge window, mostly for gvt init order fix that impacted resource handling for device model, the one i915 change has been reviewed and acked." Signed-off-by: Jani Nikula <jani.nikula@intel.com>
2017-02-14drm/i915/gvt: return error code if dma map iova failedChuanxiao Dong
When doing dma map failed for a pfn, kvmgt should unpin the pfn and return error code to device module driver Signed-off-by: Chuanxiao Dong <chuanxiao.dong@intel.com> Cc: xinda.zhao@intel.com Signed-off-by: Zhenyu Wang <zhenyuw@linux.intel.com>
2017-02-14drm/i915/gvt: optimize the inhibit context mmio loadChuanxiao Dong
For the inhibit ctx, load all mmio in render mmio list into HW by MMIO write for ctx initialization. For the none-inhibit ctx, only load the render mmio which is not in_context into HW by MMIO write. Skip the MMIO write for in_context mmio as context image will load it. Signed-off-by: Chuanxiao Dong <chuanxiao.dong@intel.com> Signed-off-by: Zhenyu Wang <zhenyuw@linux.intel.com>
2017-02-14drm/i915/gvt: add sprite plane flip done support.Xu Han
* Add flip done event support for sprite plane on SKL platform. * Fix bug #1452, "Call Trace:handle_default_event_virt+0xef/0x100 [i915]" while booting up guest. Signed-off-by: Xu Han <xu.han@intel.com> Signed-off-by: Zhenyu Wang <zhenyuw@linux.intel.com>
2017-02-14drm/i915/gvt: add missing display part reset for vGPU resetChangbin Du
We also need reset vGPU virtual display emulation. Since all vreg has been cleared, we need reset display related vreg to reflect our display setting. Signed-off-by: Changbin Du <changbin.du@intel.com> Cc: Ping Gao <ping.a.gao@intel.com> Signed-off-by: Zhenyu Wang <zhenyuw@linux.intel.com>
2017-02-14drm/i915/gvt: Fix shadow context descriptorZhenyu Wang
We need to be careful to only update addr mode for gvt shadow context descriptor but keep other valid config. This fixes GPU hang caused by invalid descriptor submitted for gvt workload. Signed-off-by: Zhenyu Wang <zhenyuw@linux.intel.com>
2017-02-14drm/i915/gvt: Fix alignment for GTT allocationZhenyu Wang
We need to properly setup alignment for GTT start/end/size as required. Fixed warning from i915 gem. Signed-off-by: Zhenyu Wang <zhenyuw@linux.intel.com>
2017-02-10drm/i915/gvt: fix crash at function release_shadow_wa_ctxChangbin Du
In function dispatch_workload(), if it fail before calling intel_gvt_scan_and_shadow_wa_ctx(), the indirect ctx will not be shadowed so no cleaup need. wa_ctx->indirect_ctx.obj indicate whether indirect_ctx is shadowed. The obj is null if it is unshadowed. BUG: unable to handle kernel NULL pointer dereference at 00000000000001a0 IP: complete_execlist_workload+0x2c9/0x3e0 [i915] Oops: 0002 [#1] SMP task: ffff939546d2d880 task.stack: ffffbd9b82ac4000 RIP: 0010:complete_execlist_workload+0x2c9/0x3e0 [i915] RSP: 0018:ffffbd9b82ac7dd8 EFLAGS: 00010202 RAX: 0000000000000000 RBX: ffff9393c725b540 RCX: 0000000000000006 RDX: 0000000000000007 RSI: 0000000000000202 RDI: ffff939559c8dd00 RBP: ffffbd9b82ac7e18 R08: 0000000000000001 R09: 000000000120dd8f R10: 0000000000000000 R11: 000000000120dd8f R12: ffff9393c725b540 R13: ffff9393c725b618 R14: ffffbd9b81f0d000 R15: ffff939520e0e000 FS: 0000000000000000(0000) GS:ffff939559c80000(0000) knlGS:0000000000000000 CS: 0010 DS: 0000 ES: 0000 CR0: 0000000080050033 CR2: 00000000000001a0 CR3: 000000043d664000 CR4: 00000000003426e0 DR0: 0000000000000000 DR1: 0000000000000000 DR2: 0000000000000000 DR3: 0000000000000000 DR6: 00000000fffe0ff0 DR7: 0000000000000400 Call Trace: workload_thread+0x312/0xd70 [i915] ? __wake_up_sync+0x20/0x20 ? wake_atomic_t_function+0x60/0x60 kthread+0x101/0x140 Signed-off-by: Changbin Du <changbin.du@intel.com> Signed-off-by: Zhenyu Wang <zhenyuw@linux.intel.com>
2017-02-10Merge branch 'drm-next-4.11' of git://people.freedesktop.org/~agd5f/linux ↵Dave Airlie
into drm-next Some additional fixes for 4.11. Delayed a bit due to Chinese New Year. Highlights: - Powerplay fixes - VCE and UVD powergating fixes - Clean up amdgpu SI gfx code to match CI and VI - Misc bug fixes * 'drm-next-4.11' of git://people.freedesktop.org/~agd5f/linux: (30 commits) drm/amdgpu: report the number of bytes moved at buffer creation drm/amdgpu: fix a potential deadlock in amdgpu_bo_create_restricted() drm/amdgpu: add support for new smc firmware on polaris drm/amd/powerplay: refine code to avoid potential bug that the memory not cleared. drm/amdgpu: shut up #warning for compile testing drm/amdgpu/virt: fix double kfree on bo_va drm/radeon: remove some dead code drm/radeon: avoid kernel segfault in vce when gpu fails to resume drm/amd/powerplay: set fan speed to max in profile peak mode only. drm/amd/gfx6: update gb_addr_config drm/amdgpu: update HAINAN_GB_ADDR_CONFIG_GOLDEN drm/amdgpu: update VERDE_GB_ADDR_CONFIG_GOLDEN drm/amdgpu: refine si_read_register drm/amdgpu/gfx6: clean up spi configuration drm/amdgpu/gfx6: clean up cu configuration drm/amdgpu/gfx6: clean up rb configuration drm/amdgpu: refine vce3.0 code and related powerplay pg code. drm/amdgpu: move subfunctions to the front of vce_v2_0.c. drm/amdgpu: enable vce pg feature on Kv. drm/amdgpu: refine code for VCE2.0 and related dpm code. ...
2017-02-10Merge tag 'drm-fsl-dcu-for-v4.11' of ↵Dave Airlie
http://git.agner.ch/git/linux-drm-fsl-dcu into drm-next two minor fixes. * tag 'drm-fsl-dcu-for-v4.11' of http://git.agner.ch/git/linux-drm-fsl-dcu: drm/fsl-dcu: check for clk_prepare_enable() error drm/fsl-dcu: remove unneeded 'ret' assignment
2017-02-10Merge tag 'drm-misc-next-fixes-2017-02-09' of ↵Dave Airlie
git://anongit.freedesktop.org/git/drm-misc into drm-next Just 3 bugfixes for 4.11 merge window: - fbdev module unload oops fix from Chris - patch from Dan that look really dangers, better safe than sorry * tag 'drm-misc-next-fixes-2017-02-09' of git://anongit.freedesktop.org/git/drm-misc: drm/atomic: fix an error code in mode_fixup() drm: Cancel drm_fb_helper_resume_work on unload drm: Cancel drm_fb_helper_dirty_work on unload
2017-02-09drm/amdgpu: report the number of bytes moved at buffer creationSamuel Pitoiset
Like ttm_bo_validate(), ttm_bo_init() might need to move BO and the number of bytes moved by TTM should be reported. This can help the throttle buffer migration mechanism to make a better decision. v2: fix computation Reviewed-by: Christian König <christian.koenig@amd.com> Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2017-02-09drm/amdgpu: fix a potential deadlock in amdgpu_bo_create_restricted()Samuel Pitoiset
When ttm_bo_init() fails, the reservation mutex should be unlocked. In debug build, the kernel reported "possible recursive locking detected" in this codepath. For debugging purposes, I also added a "WARN_ON(ww_mutex_is_locked())" when ttm_bo_init() fails and the mutex was locked as expected. This should fix (random) GPU hangs. The easy way to reproduce the issue is to change the "Super Sampling" option from 1.0 to 2.0 in Hitman. It will create a huge buffer, evict a bunch of buffers (around ~5k) and deadlock. This regression has been introduced pretty recently. v2: only release the mutex if resv is NULL Fixes: 12a852219583 ("drm/amdgpu: improve AMDGPU_GEM_CREATE_VRAM_CLEARED handling (v2)") Reviewed-by: Christian König <christian.koenig@amd.com> Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2017-02-09drm/amdgpu: add support for new smc firmware on polarisAlex Deucher
Some polaris variants require new smc firmware. Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2017-02-09drm/amd/powerplay: refine code to avoid potential bug that the memory not ↵Rex Zhu
cleared. Signed-off-by: Rex Zhu <Rex.Zhu@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2017-02-09drm/i915/gvt: enable IOMMU for gvtChuanxiao Dong
gvt driver has a check which doesn't allow to use gvt when host gpu iommu is enabled. This check can be removed after enable the iommu support in gvt Signed-off-by: Chuanxiao Dong <chuanxiao.dong@intel.com> Signed-off-by: Zhenyu Wang <zhenyuw@linux.intel.com>
2017-02-09drm/i915/gvt: map pfn for PTE entry in kvmChuanxiao Dong
When host i915 iommu enabled, gvt needs to use a mapped pfn in PTE entry So before kvm returns the pfn, map this pfn and return the mapped address which is so called iova. Signed-off-by: Chuanxiao Dong <chuanxiao.dong@intel.com> Signed-off-by: Zhenyu Wang <zhenyuw@linux.intel.com>
2017-02-09drm/i915/gvt: Map shadow page before using it in shadow page tableChuanxiao Dong
MFN usually refers to "Machine Frame Number" in virtulization world. Currently GVT-g populates the shadow PPGTT/GGTT page table with MFN according to the translation between MFN and Guest PFN. When host IOMMU is enabled, GPU DMA transactions go through the IOMMU, GPU needs an IOVA<->MFN mapping to walk the shadow page table in host main memory. This patch will map a page in IOMMU page table before using it in shadow page table and release the map when a shadow page is going to be freed. Signed-off-by: Zhi Wang <zhi.a.wang@intel.com> Signed-off-by: Chuanxiao Dong <chuanxiao.dong@intel.com> Signed-off-by: Zhenyu Wang <zhenyuw@linux.intel.com>
2017-02-09drm/i915/gvt: reduce the line of interrupt logs and log friendlyChangbin Du
Reduce the line of logs in below functions and log friendly. o intel_vgpu_reg_imr_handler o intel_vgpu_reg_master_irq_handler o intel_vgpu_reg_ier_handler o intel_vgpu_reg_iir_handler Signed-off-by: Changbin Du <changbin.du@intel.com> Signed-off-by: Zhenyu Wang <zhenyuw@linux.intel.com>
2017-02-09drm/i915/gvt: remove a redundant end of line in debug logChangbin Du
Remove a redundant end of line in below log. 'will complete workload %p\n, status: %d\n' Signed-off-by: Changbin Du <changbin.du@intel.com> Signed-off-by: Zhenyu Wang <zhenyuw@linux.intel.com>
2017-02-09drm/i915/gvt: remove a noisy unimportant log in sched_policyChangbin Du
Remove below unimportant log which is too noisy. 'no current vgpu search from q head' Signed-off-by: Changbin Du <changbin.du@intel.com> Signed-off-by: Zhenyu Wang <zhenyuw@linux.intel.com>
2017-02-09drm/amdgpu: shut up #warning for compile testingArnd Bergmann
My randconfig tests on linux-next showed a newly introduced warning: drivers/gpu/drm/amd/amdgpu/amdgpu_object.c: In function 'amdgpu_bo_create_restricted': drivers/gpu/drm/amd/amdgpu/amdgpu_object.c:377:2: error: #warning Please enable CONFIG_MTRR and CONFIG_X86_PAT for better performance thanks to write-combining [-Werror=cpp] Generally speaking, warnings about bad kernel configuration are not particularly helpful. We could enforce the selection of X86_PAT through Kconfig, so the driver cannot even be used unless it is enabled, or we could just rely on the runtime warning that is also there. In this version, I'm making the warning conditional on CONFIG_COMPILE_TEST, which shuts it up for me, but not people that may actually want to run the kernel as a compromize. Fixes: a2e2f29970aa ("drm/amdgpu: Bring bo creation in line with radeon driver (v2)") Reviewed-by: Michel Dänzer <michel.daenzer@amd.com> Signed-off-by: Arnd Bergmann <arnd@arndb.de> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2017-02-08drm/amdgpu/virt: fix double kfree on bo_vaColin Ian King
bo_va is being kfree'd twice, once in the call to amdgpu_vm_bo_rmv and then a short while later. Fix this double free by removing the 2nd kfree. Detected by CoverityScan, CID#1399524 ("Double Free") Reviewed-by: Monk Liu <monk.liu@amd.com> Signed-off-by: Colin Ian King <colin.king@canonical.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2017-02-08drm/radeon: remove some dead codeDan Carpenter
If "rdev->bios" is NULL then we don't need to free it. Reviewed-by: Michel Dänzer <michel.daenzer@amd.com> Signed-off-by: Dan Carpenter <dan.carpenter@oracle.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2017-02-08drm/radeon: avoid kernel segfault in vce when gpu fails to resumeJérôme Glisse
When GPU fails to resume we can not trust that value we write to GPU memory will post and we might get garbage (more like 0xffffffff on x86) when reading them back. This trigger out of range memory access in the kernel inside the vce resume code path. This patch use canonical value to compute offset instead of reading back value from GPU memory. Reviewed-by: Christian König <christian.koenig@amd.com> Signed-off-by: Jérôme Glisse <jglisse@redhat.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2017-02-08drm/amd/powerplay: set fan speed to max in profile peak mode only.Rex Zhu
Signed-off-by: Rex Zhu <Rex.Zhu@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2017-02-08drm/amd/gfx6: update gb_addr_configFlora Cui
Signed-off-by: Flora Cui <Flora.Cui@amd.com> Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2017-02-08drm/amdgpu: update HAINAN_GB_ADDR_CONFIG_GOLDENFlora Cui
Signed-off-by: Flora Cui <Flora.Cui@amd.com> Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2017-02-08drm/amdgpu: update VERDE_GB_ADDR_CONFIG_GOLDENFlora Cui
Signed-off-by: Flora Cui <Flora.Cui@amd.com> Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2017-02-08drm/amdgpu: refine si_read_registerFlora Cui
Signed-off-by: Flora Cui <Flora.Cui@amd.com> Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2017-02-08drm/amdgpu/gfx6: clean up spi configurationFlora Cui
Signed-off-by: Flora Cui <Flora.Cui@amd.com> Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2017-02-08drm/amdgpu/gfx6: clean up cu configurationFlora Cui
Signed-off-by: Flora Cui <Flora.Cui@amd.com> Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2017-02-08drm/amdgpu/gfx6: clean up rb configurationFlora Cui
Signed-off-by: Flora Cui <Flora.Cui@amd.com> Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2017-02-08drm/amdgpu: refine vce3.0 code and related powerplay pg code.Rex Zhu
1. not start vce3.0 when hw_init 2. stop vce3.0 when vce idle. 3. pg mask used to ctrl power down/up vce. 4. change cg pg sequence in powerplay. Signed-off-by: Rex Zhu <Rex.Zhu@amd.com> Acked-by: Christian König <christian.koenig@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2017-02-08drm/amdgpu: move subfunctions to the front of vce_v2_0.c.Rex Zhu
Signed-off-by: Rex Zhu <Rex.Zhu@amd.com> Acked-by: Christian König <christian.koenig@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2017-02-08drm/amdgpu: enable vce pg feature on Kv.Rex Zhu
Signed-off-by: Rex Zhu <Rex.Zhu@amd.com> Acked-by: Christian König <christian.koenig@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2017-02-08drm/amdgpu: refine code for VCE2.0 and related dpm code.Rex Zhu
v2: clean up vce cg function. use sw cg when vce stoped. 1. implement vce_stop function. 2. not start vce when hw_init. 3. refine vce cg/pg code. 4. delete bypass mode. Signed-off-by: Rex Zhu <Rex.Zhu@amd.com> Acked-by: Christian König <christian.koenig@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2017-02-08drm/amdgpu: when dpm disabled, also need to stop/start vce.Rex Zhu
Signed-off-by: Rex Zhu <Rex.Zhu@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Acked-by: Christian König <christian.koenig@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2017-02-08drm/amdgpu: refine uvd5.0/6.0 code.Rex Zhu
1. delete redundant cg pg mask check. pg mask use to ctrl power on/down uvd. not start/stop uvd. cg mask will be check when enable mgcg. 2. no need to start uvd when initializ. when ring test/ib test/encode, uvd was enabled. when uvd idle, uvd was stopped. 3. chang cg pg sequence in powerplay. Signed-off-by: Rex Zhu <Rex.Zhu@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Acked-by: Christian König <christian.koenig@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2017-02-08drm/amdgpu: fix uvd can't initialized when dpm disabled on Ci.Rex Zhu
need to start smc when dpm disabled. otherwise, uvd can't get response from smu. so uvd ring test and ib test will timeout. Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2017-02-08drm/amdgpu: refine uvd4.2 init/stop code.Rex Zhu
1. set uvd_status busy before uvd_start. 2. clear uvd_status to 0 after uvd stop. smu firmware may check uvd_status. 3. wait uvd idle before stop uvd. 4. not start uvd when hw_init. Signed-off-by: Rex Zhu <Rex.Zhu@amd.com> Acked-by: Alex Deucher <alexander.deucher@amd.com> Acked-by: Christian König <christian.koenig@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2017-02-08drm/amdgpu: refine uvd pg code in kv_dpm.cRex Zhu
1. no need to set cg as use hw dynamic cg. 2. when uvd idle, stop uvd. encode, start uvd. 3. if pg feature enabled, power on/down uvd by smu. 4. drm/amdgpu: dpm do not set uvd pg status. Signed-off-by: Rex Zhu <Rex.Zhu@amd.com> Acked-by: Christian König <christian.koenig@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
generated by cgit (git 2.34.1) at 2025-09-07 08:18:23 +0000