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2024-12-11iio: consumers: ensure read buffers for labels and ext_info are page alignedMatteo Martelli
Attributes of iio providers are exposed via sysfs. Typically, providers pass attribute values to the iio core, which handles formatting and printing to sysfs. However, some attributes, such as labels or extended info, are directly formatted and printed to sysfs by provider drivers using sysfs_emit() and sysfs_emit_at(). These helpers assume the read buffer, allocated by sysfs fop, is page-aligned. When these attributes are accessed by consumer drivers, the read buffer is allocated by the consumer and may not be page-aligned, leading to failures in the provider's callback that utilizes sysfs_emit*. Add a check to ensure that read buffers for labels and external info attributes are page-aligned. Update the prototype documentation as well. Signed-off-by: Matteo Martelli <matteomartelli3@gmail.com> Link: https://patch.msgid.link/20241202-iio-kmalloc-align-v1-1-aa9568c03937@gmail.com Signed-off-by: Jonathan Cameron <Jonathan.Cameron@huawei.com>
2024-12-11iio: pressure: bmp280: Make time vars intuitive and move to fsleepVasileios Amoiridis
Move sleep functions to the new fsleep() implementation. While at it, add time unit abbreviation as a suffix of time describing variables to make them more intuitive. Signed-off-by: Vasileios Amoiridis <vassilisamir@gmail.com> Link: https://patch.msgid.link/20241202181907.21471-4-vassilisamir@gmail.com Signed-off-by: Jonathan Cameron <Jonathan.Cameron@huawei.com>
2024-12-11iio: pressure: bmp280: Use sizeof() for denominatorVasileios Amoiridis
Instead of using magic number 2 as a denominator, make it intuitive by using sizeof(). Reviewed-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Signed-off-by: Vasileios Amoiridis <vassilisamir@gmail.com> Link: https://patch.msgid.link/20241202181907.21471-3-vassilisamir@gmail.com Signed-off-by: Jonathan Cameron <Jonathan.Cameron@huawei.com>
2024-12-11iio: chemical: bme680: add power managementVasileios Amoiridis
Add runtime power management to the device. Signed-off-by: Vasileios Amoiridis <vassilisamir@gmail.com> Link: https://patch.msgid.link/20241202192341.33187-4-vassilisamir@gmail.com Signed-off-by: Jonathan Cameron <Jonathan.Cameron@huawei.com>
2024-12-11iio: chemical: bme680: add regulatorsVasileios Amoiridis
Add support for the regulators described in the dt-binding. Reviewed-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Signed-off-by: Vasileios Amoiridis <vassilisamir@gmail.com> Link: https://patch.msgid.link/20241202192341.33187-3-vassilisamir@gmail.com Signed-off-by: Jonathan Cameron <Jonathan.Cameron@huawei.com>
2024-12-11dt-bindings: iio: bosch,bme680: Move from trivial-devices and add suppliesVasileios Amoiridis
Move dt-binding for BME680 out of trivial-devices.yaml and extend it by adding the missing supplies. Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Signed-off-by: Vasileios Amoiridis <vassilisamir@gmail.com> Link: https://patch.msgid.link/20241202192341.33187-2-vassilisamir@gmail.com Signed-off-by: Jonathan Cameron <Jonathan.Cameron@huawei.com>
2024-12-11iio: imu: st_lsm6dsx: don't always auto-enable I2C, I3C and SPI interface ↵Sean Nyekjaer
drivers This patch makes I2C, I3C and SPI interface drivers for ST lsm6dsx individually selectable via Kconfig. The default is kept unchanged - I2C, I3C and SPI interface drivers are still selected by default if the corresponding bus support is available. However, the patch makes it possible to explicitly disable drivers that are not needed for a particular target. Signed-off-by: Sean Nyekjaer <sean@geanix.com> Link: https://patch.msgid.link/20241203-lsm6dsx-v1-1-6d7893443bc8@geanix.com Signed-off-by: Jonathan Cameron <Jonathan.Cameron@huawei.com>
2024-12-11dt-bindings: iio: accel: fxls8962af: add wakeup-source propertySean Nyekjaer
Add a wakeup-source property to the binding to describe whether the wakeup interrupts from the accelerometer can wake the system from suspend. Signed-off-by: Sean Nyekjaer <sean@geanix.com> Acked-by: Conor Dooley <conor.dooley@microchip.com> Link: https://patch.msgid.link/20241203-fxlsdt-v2-1-ef523461b507@geanix.com Signed-off-by: Jonathan Cameron <Jonathan.Cameron@huawei.com>
2024-12-11iio: accel: adxl345: rename variable data to stLothar Rubusch
Rename the locally used variable data to st. The st refers to "state", representing the internal state of the driver object. Further it prepares the usage of an internal data pointer needed for the implementation of the sensor features. Signed-off-by: Lothar Rubusch <l.rubusch@gmail.com> Link: https://patch.msgid.link/20241205171343.308963-3-l.rubusch@gmail.com Signed-off-by: Jonathan Cameron <Jonathan.Cameron@huawei.com>
2024-12-11iio: accel: adxl345: refrase comment on probeLothar Rubusch
Refrase comment on the probe function, avoid naming different hardware. Signed-off-by: Lothar Rubusch <l.rubusch@gmail.com> Link: https://patch.msgid.link/20241205171343.308963-2-l.rubusch@gmail.com Signed-off-by: Jonathan Cameron <Jonathan.Cameron@huawei.com>
2024-12-11iio: adc: ad7124: Implement temperature measurementUwe Kleine-König
If the maximal count of channels the driver supports isn't fully utilized, add an attribute providing the internal temperature. Signed-off-by: Uwe Kleine-König <u.kleine-koenig@baylibre.com> Link: https://patch.msgid.link/433211af8ac3f02dee58586ecb51d2e98246a095.1733504533.git.u.kleine-koenig@baylibre.com Signed-off-by: Jonathan Cameron <Jonathan.Cameron@huawei.com>
2024-12-11iio: adc: ad7124: Add error reporting during probeUwe Kleine-König
A driver that silently fails to probe is annoying and hard to debug. So add messages in the error paths of the probe function. Signed-off-by: Uwe Kleine-König <u.kleine-koenig@baylibre.com> Link: https://patch.msgid.link/55e24392f1e4d5b9896f00a52a93c1c4b1feac43.1733504533.git.u.kleine-koenig@baylibre.com Signed-off-by: Jonathan Cameron <Jonathan.Cameron@huawei.com>
2024-12-11iio: adc: ad_sigma_delta: Check for previous ready signalsUwe Kleine-König
It can happen if a previous conversion was aborted the ADC pulls down the R̅D̅Y̅ line but the event wasn't handled before. In that case enabling the irq might immediately fire (depending on the irq controller capabilities) and even with a rdy-gpio isn't identified as an unrelated one. To cure that problem check for a pending event before the measurement is started and clear it if needed. Signed-off-by: Uwe Kleine-König <u.kleine-koenig@baylibre.com> Link: https://patch.msgid.link/3ec6b61fb1e527e935133dc56f589aab4b2094a3.1733504533.git.u.kleine-koenig@baylibre.com Signed-off-by: Jonathan Cameron <Jonathan.Cameron@huawei.com>
2024-12-11iio: adc: ad_sigma_delta: Store information about reset sequence lengthUwe Kleine-König
The various chips can be reset using a sequence of SPI transfers with MOSI = 1. The length of such a sequence varies from chip to chip. Store that length in struct ad_sigma_delta_info and replace the respective parameter to ad_sd_reset() with it. Note the ad7192 used to pass 48 as length but the documentation specifies 40 as the required length. Assuming the latter is right. (Using a too long sequence doesn't hurt apart from using a longer spi transfer than necessary, so this is no relevant fix.) The motivation for storing this information is that this is useful to clear a pending R̅D̅Y̅ signal in the next change. Signed-off-by: Uwe Kleine-König <u.kleine-koenig@baylibre.com> Link: https://patch.msgid.link/9750db62fce638bf140ff48172c23bff7f785e5b.1733504533.git.u.kleine-koenig@baylibre.com Signed-off-by: Jonathan Cameron <Jonathan.Cameron@huawei.com>
2024-12-11iio: adc: ad_sigma_delta: Fix a race conditionUwe Kleine-König
The ad_sigma_delta driver helper uses irq_disable_nosync(). With that one it is possible that the irq handler still runs after the irq_disable_nosync() function call returns. Also to properly synchronize irq disabling in the different threads proper locking is needed and because it's unclear if the irq handler's irq_disable_nosync() call comes first or the one in the enabler's error path, all code locations that disable the irq must check for .irq_dis first to ensure there is exactly one disable call per enable call. So add a spinlock to the struct ad_sigma_delta and use it to synchronize irq enabling and disabling. Also only act in the irq handler if the irq is still enabled. Fixes: af3008485ea0 ("iio:adc: Add common code for ADI Sigma Delta devices") Signed-off-by: Uwe Kleine-König <u.kleine-koenig@baylibre.com> Link: https://patch.msgid.link/9e6def47e2e773e0e15b7a2c29d22629b53d91b1.1733504533.git.u.kleine-koenig@baylibre.com Signed-off-by: Jonathan Cameron <Jonathan.Cameron@huawei.com>
2024-12-11iio: adc: ad_sigma_delta: Handle CS assertion as intended in ↵Uwe Kleine-König
ad_sd_read_reg_raw() When struct ad_sigma_delta::keep_cs_asserted was introduced only register writing was adapted to honor this new flag. Also respect it when reading a register. Fixes: df1d80aee963 ("iio: ad_sigma_delta: Properly handle SPI bus locking vs CS assertion") Reviewed-by: Trevor Gamblin <tgamblin@baylibre.com> Signed-off-by: Uwe Kleine-König <u.kleine-koenig@baylibre.com> Link: https://patch.msgid.link/8d76b4ea4a4363b269886c71193b840821c724ea.1733504533.git.u.kleine-koenig@baylibre.com Signed-off-by: Jonathan Cameron <Jonathan.Cameron@huawei.com>
2024-12-11iio: adc: ad_sigma_delta: Add support for reading irq status using a GPIOUwe Kleine-König
Some of the ADCs by Analog signal their irq condition on the MISO line. So typically that line is connected to an SPI controller and a GPIO. The GPIO is used as input and the respective interrupt is enabled when the last SPI transfer is completed. Depending on the GPIO controller the toggling MISO line might make the interrupt pending even while it's masked. In that case the irq handler is called immediately after irq_enable() and so before the device actually pulls that line low which results in non-sense values being reported to the upper layers. The only way to find out if the line was actually pulled low is to read the GPIO. (There is a flag in AD7124's status register that also signals if an interrupt was asserted, but reading that register toggles the MISO line and so might trigger another spurious interrupt.) Add the possibility to specify an interrupt GPIO in the machine description in addition to the plain interrupt. This GPIO is used then to check if the irq line is actually active in the irq handler. Signed-off-by: Uwe Kleine-König <u.kleine-koenig@baylibre.com> Link: https://patch.msgid.link/5be9a4cc4dc600ec384c88db01dd661a21506b9c.1733504533.git.u.kleine-koenig@baylibre.com Signed-off-by: Jonathan Cameron <Jonathan.Cameron@huawei.com>
2024-12-11dt-bindings: iio: adc: adi,ad7{124,173,192,780}: Allow specifications of a ↵Uwe Kleine-König
gpio for irq line For the AD7124 chip and some of its cousins the logical irq line (R̅D̅Y̅) is physically on the same pin as the spi MISO output (DOUT) and so reading a register might trigger an interrupt. For correct operation it's critical that the actual state of the pin can be read to judge if an interrupt event is a real one or just a spurious one triggered by toggling the line in its MISO mode. Allow specification of an "rdy-gpios" property that references a GPIO that can be used for that purpose. While this is typically the same GPIO also used (implicitly) as interrupt source, it is still supposed that the interrupt is specified as before and usual. Acked-by: Conor Dooley <conor.dooley@microchip.com> Signed-off-by: Uwe Kleine-König <u.kleine-koenig@baylibre.com> Link: https://patch.msgid.link/7fc92a8539e55802d514332e70ee836a3ed08b66.1733504533.git.u.kleine-koenig@baylibre.com Signed-off-by: Jonathan Cameron <Jonathan.Cameron@huawei.com>
2024-12-11iio: adc: ad7124: Refuse invalid input specifiersUwe Kleine-König
The ad7124-4 has 8 analog inputs; the input select values 8 to 15 are reserved and not to be used. These are fine for ad7124-8. For both ad7124-4 and ad7124-8 values bigger than 15 are internal channels that might appear as inputs in the channels specified in the device description according to the description of commit f1794fd7bdf7 ("iio: adc: ad7124: Remove input number limitation"), values bigger than 31 don't fit into the respective register bit field and the driver masked them to smaller values. Check for these invalid input specifiers and fail to probe if one is found. Fixes: f1794fd7bdf7 ("iio: adc: ad7124: Remove input number limitation") Signed-off-by: Uwe Kleine-König <u.kleine-koenig@baylibre.com> Link: https://patch.msgid.link/80e3bd629d2b755ab5e061c8731dafa57d08698a.1733504533.git.u.kleine-koenig@baylibre.com Signed-off-by: Jonathan Cameron <Jonathan.Cameron@huawei.com>
2024-12-11iio: adc: ad7124: Don't create more channels than the driver can handleUwe Kleine-König
The ad7124-4 and ad7124-8 both support 16 channel registers and assigns each channel defined in dt statically such a register. While the driver could be a bit more clever about this, it currently isn't and specifying more than 16 channels yields broken behaviour. So just refuse to bind in this situation. Fixes: b3af341bbd96 ("iio: adc: Add ad7124 support") Signed-off-by: Uwe Kleine-König <u.kleine-koenig@baylibre.com> Link: https://patch.msgid.link/1b9a5a1d334e5501294f7f9f9d5893f1cdf1b0ec.1733504533.git.u.kleine-koenig@baylibre.com Signed-off-by: Jonathan Cameron <Jonathan.Cameron@huawei.com>
2024-12-11iio: adc: rzg2l_adc: Add support for Renesas RZ/G3SClaudiu Beznea
Add ADC support for the Renesas RZ/G3S SoC. The key features of this IP include: - 9 channels, with one dedicated to reading the temperature reported by the Thermal Sensor Unit (TSU) - A different default ADCMP value, which is written to the ADM3 register. - Different default sampling rates - ADM3.ADSMP field is 8 bits wide - ADINT.INTEN field is 11 bits wide Signed-off-by: Claudiu Beznea <claudiu.beznea.uj@bp.renesas.com> Link: https://patch.msgid.link/20241206111337.726244-14-claudiu.beznea.uj@bp.renesas.com Signed-off-by: Jonathan Cameron <Jonathan.Cameron@huawei.com>
2024-12-11dt-bindings: iio: adc: renesas,rzg2l-adc: Document RZ/G3S SoCClaudiu Beznea
Document the ADC IP available on the RZ/G3S SoC. The ADC IP on the RZ/G3S differs slightly from the one found on the RZ/G2L. The identified differences are as follows: - different number of channels (one being used for temperature conversion); consequently, various registers differ; the temperature channel support was not available for the RZ/G2L variant; the #io-channel-cells property was added to be able to request the temperature channel from the thermal driver - different default sampling periods - the RZ/G3S variant lacks the ADVIC register. Acked-by: Conor Dooley <conor.dooley@microchip.com> Signed-off-by: Claudiu Beznea <claudiu.beznea.uj@bp.renesas.com> Link: https://patch.msgid.link/20241206111337.726244-13-claudiu.beznea.uj@bp.renesas.com Signed-off-by: Jonathan Cameron <Jonathan.Cameron@huawei.com>
2024-12-11iio: adc: rzg2l_adc: Add suspend/resume supportClaudiu Beznea
The Renesas RZ/G3S SoC features a power-saving mode where power to most of the SoC components is turned off, including the ADC IP. Suspend/resume support has been added to the rzg2l_adc driver to restore functionality after resuming from this power-saving mode. During suspend, the ADC resets are asserted, and the ADC is powered down. On resume, the ADC resets are de-asserted, the hardware is re-initialized, and the ADC power is restored using the runtime PM APIs. Signed-off-by: Claudiu Beznea <claudiu.beznea.uj@bp.renesas.com> Reviewed-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com> Link: https://patch.msgid.link/20241206111337.726244-12-claudiu.beznea.uj@bp.renesas.com Signed-off-by: Jonathan Cameron <Jonathan.Cameron@huawei.com>
2024-12-11iio: adc: rzg2l_adc: Add support for channel 8Claudiu Beznea
The ADC on the Renesas RZ/G3S SoC includes an additional channel (channel 8) dedicated to reading temperature values from the Thermal Sensor Unit (TSU). There is a direct in-SoC connection between the ADC and TSU IPs. To read the temperature reported by the TSU, a different sampling rate (compared to channels 0-7) must be configured in the ADM3 register. The rzg2l_adc driver has been updated to support reading the TSU temperature. Signed-off-by: Claudiu Beznea <claudiu.beznea.uj@bp.renesas.com> Reviewed-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com> Link: https://patch.msgid.link/20241206111337.726244-11-claudiu.beznea.uj@bp.renesas.com Signed-off-by: Jonathan Cameron <Jonathan.Cameron@huawei.com>
2024-12-11iio: adc: rzg2l_adc: Prepare for the addition of RZ/G3S supportClaudiu Beznea
The ADC IP available on the RZ/G3S differs slightly from the one found on the RZ/G2L. The identified differences are as follows: - different number of channels (one being used for temperature conversion); consequently, various registers differ - different default sampling periods - the RZ/G3S variant lacks the ADVIC register. To accommodate these differences, the rzg2l_adc driver has been updated by introducing the struct rzg2l_adc_hw_params, which encapsulates the hardware-specific differences between the IP variants. A pointer to an object of type struct rzg2l_adc_hw_params is embedded in struct rzg2l_adc_data. Additionally, the completion member of struct rzg2l_adc_data was relocated to avoid potential padding, if any. The code has been adjusted to utilize hardware-specific parameters stored in the new structure instead of relying on plain macros. The check of chan->channel in rzg2l_adc_read_raw() function, against the driver specific mask was removed as the subsystem should have already been done this before reaching the rzg2l_adc_read_raw() function. Along with it the local variable ch was dropped as chan->channel could be used instead. Signed-off-by: Claudiu Beznea <claudiu.beznea.uj@bp.renesas.com> Reviewed-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com> Link: https://patch.msgid.link/20241206111337.726244-10-claudiu.beznea.uj@bp.renesas.com Signed-off-by: Jonathan Cameron <Jonathan.Cameron@huawei.com>
2024-12-11iio: adc: rzg2l_adc: Enable runtime PM autosuspend supportClaudiu Beznea
Enable runtime PM autosuspend support for the rzg2l_adc driver. With this change, consecutive conversion requests will no longer cause the device to be runtime-enabled/disabled after each request. Instead, the device will transition based on the delay configured by the user. This approach reduces the frequency of hardware register access during runtime PM suspend/resume cycles, thereby saving CPU cycles. Signed-off-by: Claudiu Beznea <claudiu.beznea.uj@bp.renesas.com> Reviewed-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com> Link: https://patch.msgid.link/20241206111337.726244-9-claudiu.beznea.uj@bp.renesas.com Signed-off-by: Jonathan Cameron <Jonathan.Cameron@huawei.com>
2024-12-11iio: adc: rzg2l_adc: Simplify the locking scheme in rzg2l_adc_read_raw()Claudiu Beznea
Simplify the locking scheme in rzg2l_adc_read_raw() by using guard(mutex)(). Signed-off-by: Claudiu Beznea <claudiu.beznea.uj@bp.renesas.com> Reviewed-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com> Link: https://patch.msgid.link/20241206111337.726244-8-claudiu.beznea.uj@bp.renesas.com Signed-off-by: Jonathan Cameron <Jonathan.Cameron@huawei.com>
2024-12-11iio: adc: rzg2l_adc: Use read_poll_timeout()Claudiu Beznea
Replace the driver-specific implementation with the read_poll_timeout() function. This change simplifies the code and improves maintainability by leveraging the standardized helper. Signed-off-by: Claudiu Beznea <claudiu.beznea.uj@bp.renesas.com> Reviewed-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com> Link: https://patch.msgid.link/20241206111337.726244-7-claudiu.beznea.uj@bp.renesas.com Signed-off-by: Jonathan Cameron <Jonathan.Cameron@huawei.com>
2024-12-11iio: adc: rzg2l_adc: Switch to RUNTIME_PM_OPS() and pm_ptr()Claudiu Beznea
The use of SET_RUNTIME_PM_OPS() is now deprecated and requires __maybe_unused annotations to avoid warnings about unused functions. Switching to RUNTIME_PM_OPS() and pm_ptr() eliminates the need for such annotations because the compiler can directly reference the runtime PM functions, thereby suppressing the warnings. As a result, the __maybe_unused markings can be removed. Signed-off-by: Claudiu Beznea <claudiu.beznea.uj@bp.renesas.com> Reviewed-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com> Link: https://patch.msgid.link/20241206111337.726244-6-claudiu.beznea.uj@bp.renesas.com Signed-off-by: Jonathan Cameron <Jonathan.Cameron@huawei.com>
2024-12-11iio: adc: rzg2l_adc: Simplify the runtime PM codeClaudiu Beznea
All Renesas SoCs using the rzg2l_adc driver manage ADC clocks through PM domains. Calling pm_runtime_{resume_and_get, put_sync}() implicitly sets the state of the clocks. As a result, the code in the rzg2l_adc driver that explicitly manages ADC clocks can be removed, leading to simpler and cleaner implementation. Additionally, replace the use of rzg2l_adc_set_power() with direct PM runtime API calls to further simplify and clean up the code. Signed-off-by: Claudiu Beznea <claudiu.beznea.uj@bp.renesas.com> Reviewed-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com> Link: https://patch.msgid.link/20241206111337.726244-5-claudiu.beznea.uj@bp.renesas.com Signed-off-by: Jonathan Cameron <Jonathan.Cameron@huawei.com>
2024-12-11iio: adc: rzg2l_adc: Use devres helpers to request pre-deasserted reset controlsClaudiu Beznea
Starting with commit d872bed85036 ("reset: Add devres helpers to request pre-deasserted reset controls"), devres helpers are available to simplify the process of requesting pre-deasserted reset controls. Update the rzg2l_adc driver to utilize these helpers, reducing complexity in this way. Signed-off-by: Claudiu Beznea <claudiu.beznea.uj@bp.renesas.com> Reviewed-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com> Link: https://patch.msgid.link/20241206111337.726244-4-claudiu.beznea.uj@bp.renesas.com Signed-off-by: Jonathan Cameron <Jonathan.Cameron@huawei.com>
2024-12-11iio: adc: rzg2l_adc: Convert dev_err() to dev_err_probe()Claudiu Beznea
Convert all occurrences of dev_err() in the probe path to dev_err_probe(). This improves readability and simplifies the code. Signed-off-by: Claudiu Beznea <claudiu.beznea.uj@bp.renesas.com> Reviewed-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com> Link: https://patch.msgid.link/20241206111337.726244-3-claudiu.beznea.uj@bp.renesas.com Signed-off-by: Jonathan Cameron <Jonathan.Cameron@huawei.com>
2024-12-11ASoC: fsl_spdif: change IFACE_PCM to IFACE_MIXERShengjiu Wang
As the snd_soc_card_get_kcontrol() is updated to use snd_ctl_find_id_mixer() in commit 897cc72b0837 ("ASoC: soc-card: Use snd_ctl_find_id_mixer() instead of open-coding") which make the iface fix to be IFACE_MIXER. Fixes: 897cc72b0837 ("ASoC: soc-card: Use snd_ctl_find_id_mixer() instead of open-coding") Signed-off-by: Shengjiu Wang <shengjiu.wang@nxp.com> Link: https://patch.msgid.link/20241126053254.3657344-3-shengjiu.wang@nxp.com Signed-off-by: Mark Brown <broonie@kernel.org>
2024-12-11ASoC: fsl_xcvr: change IFACE_PCM to IFACE_MIXERShengjiu Wang
As the snd_soc_card_get_kcontrol() is updated to use snd_ctl_find_id_mixer() in commit 897cc72b0837 ("ASoC: soc-card: Use snd_ctl_find_id_mixer() instead of open-coding") which make the iface fix to be IFACE_MIXER. Fixes: 897cc72b0837 ("ASoC: soc-card: Use snd_ctl_find_id_mixer() instead of open-coding") Signed-off-by: Shengjiu Wang <shengjiu.wang@nxp.com> Link: https://patch.msgid.link/20241126053254.3657344-2-shengjiu.wang@nxp.com Signed-off-by: Mark Brown <broonie@kernel.org>
2024-12-11libperf: evlist: Fix --cpu argument on hybrid platformJames Clark
Since the linked fixes: commit, specifying a CPU on hybrid platforms results in an error because Perf tries to open an extended type event on "any" CPU which isn't valid. Extended type events can only be opened on CPUs that match the type. Before (working): $ perf record --cpu 1 -- true [ perf record: Woken up 1 times to write data ] [ perf record: Captured and wrote 2.385 MB perf.data (7 samples) ] After (not working): $ perf record -C 1 -- true WARNING: A requested CPU in '1' is not supported by PMU 'cpu_atom' (CPUs 16-27) for event 'cycles:P' Error: The sys_perf_event_open() syscall returned with 22 (Invalid argument) for event (cpu_atom/cycles:P/). /bin/dmesg | grep -i perf may provide additional information. (Ignore the warning message, that's expected and not particularly relevant to this issue). This is because perf_cpu_map__intersect() of the user specified CPU (1) and one of the PMU's CPUs (16-27) correctly results in an empty (NULL) CPU map. However for the purposes of opening an event, libperf converts empty CPU maps into an any CPU (-1) which the kernel rejects. Fix it by deleting evsels with empty CPU maps in the specific case where user requested CPU maps are evaluated. Fixes: 251aa040244a ("perf parse-events: Wildcard most "numeric" events") Reviewed-by: Ian Rogers <irogers@google.com> Tested-by: Thomas Falcon <thomas.falcon@intel.com> Signed-off-by: James Clark <james.clark@linaro.org> Tested-by: Arnaldo Carvalho de Melo <acme@redhat.com> Link: https://lore.kernel.org/r/20241114160450.295844-2-james.clark@linaro.org Signed-off-by: Namhyung Kim <namhyung@kernel.org>
2024-12-11perf test expr: Fix system_tsc_freq for only x86Ian Rogers
The refactoring of tool PMU events to have a PMU then adding the expr literals to the tool PMU made it so that the literal system_tsc_freq was only supported on x86. Update the test expectations to match - namely the parsing is x86 specific and only yields a non-zero value on Intel. Fixes: 609aa2667f67 ("perf tool_pmu: Switch to standard pmu functions and json descriptions") Reported-by: Athira Rajeev <atrajeev@linux.vnet.ibm.com> Closes: https://lore.kernel.org/linux-perf-users/20241022140156.98854-1-atrajeev@linux.vnet.ibm.com/ Co-developed-by: Athira Rajeev <atrajeev@linux.vnet.ibm.com> Tested-by: Namhyung Kim <namhyung@kernel.org> Signed-off-by: Ian Rogers <irogers@google.com> Cc: James Clark <james.clark@linaro.org> Cc: akanksha@linux.ibm.com Cc: hbathini@linux.ibm.com Cc: kjain@linux.ibm.com Cc: maddy@linux.ibm.com Cc: disgoel@linux.vnet.ibm.com Cc: linuxppc-dev@lists.ozlabs.org Link: https://lore.kernel.org/r/20241205022305.158202-1-irogers@google.com Signed-off-by: Namhyung Kim <namhyung@kernel.org>
2024-12-11selftests/ftrace: adjust offset for kprobe syntax error testHari Bathini
In 'NOFENTRY_ARGS' test case for syntax check, any offset X of `vfs_read+X` except function entry offset (0) fits the criterion, even if that offset is not at instruction boundary, as the parser comes before probing. But with "ENDBR64" instruction on x86, offset 4 is treated as function entry. So, X can't be 4 as well. Thus, 8 was used as offset for the test case. On 64-bit powerpc though, any offset <= 16 can be considered function entry depending on build configuration (see arch_kprobe_on_func_entry() for implementation details). So, use `vfs_read+20` to accommodate that scenario too. Link: https://lore.kernel.org/r/20241129202621.721159-1-hbathini@linux.ibm.com Fixes: 4231f30fcc34a ("selftests/ftrace: Add BTF arguments test cases") Suggested-by: Masami Hiramatsu <mhiramat@kernel.org> Signed-off-by: Hari Bathini <hbathini@linux.ibm.com> Acked-by: Steven Rostedt (Google) <rostedt@goodmis.org> Signed-off-by: Shuah Khan <skhan@linuxfoundation.org>
2024-12-11Bluetooth: Improve setsockopt() handling of malformed user inputMichal Luczaj
The bt_copy_from_sockptr() return value is being misinterpreted by most users: a non-zero result is mistakenly assumed to represent an error code, but actually indicates the number of bytes that could not be copied. Remove bt_copy_from_sockptr() and adapt callers to use copy_safe_from_sockptr(). For sco_sock_setsockopt() (case BT_CODEC) use copy_struct_from_sockptr() to scrub parts of uninitialized buffer. Opportunistically, rename `len` to `optlen` in hci_sock_setsockopt_old() and hci_sock_setsockopt(). Fixes: 51eda36d33e4 ("Bluetooth: SCO: Fix not validating setsockopt user input") Fixes: a97de7bff13b ("Bluetooth: RFCOMM: Fix not validating setsockopt user input") Fixes: 4f3951242ace ("Bluetooth: L2CAP: Fix not validating setsockopt user input") Fixes: 9e8742cdfc4b ("Bluetooth: ISO: Fix not validating setsockopt user input") Fixes: b2186061d604 ("Bluetooth: hci_sock: Fix not validating setsockopt user input") Reviewed-by: Luiz Augusto von Dentz <luiz.von.dentz@intel.com> Reviewed-by: David Wei <dw@davidwei.uk> Signed-off-by: Michal Luczaj <mhal@rbox.co> Signed-off-by: Luiz Augusto von Dentz <luiz.von.dentz@intel.com>
2024-12-11scripts/kernel-doc: Get -export option working againAkira Yokosawa
Since commit cdd30ebb1b9f ("module: Convert symbol namespace to string literal"), exported symbols marked by EXPORT_SYMBOL_NS(_GPL) are ignored by "kernel-doc -export" in fresh build of "make htmldocs". This is because regex in the perl script for those markers fails to match the new signatures: - EXPORT_SYMBOL_NS(symbol, "ns"); - EXPORT_SYMBOL_NS_GPL(symbol, "ns"); Update the regex so that it matches quoted string. Note: Escape sequence of \w is good for C identifiers, but can be too strict for quoted strings. Instead, use \S, which matches any non-whitespace character, for compatibility with possible extension of namespace convention in the future [1]. Fixes: cdd30ebb1b9f ("module: Convert symbol namespace to string literal") Link: https://lore.kernel.org/CAK7LNATMufXP0EA6QUE9hBkZMa6vJO6ZiaYuak2AhOrd2nSVKQ@mail.gmail.com/ [1] Signed-off-by: Akira Yokosawa <akiyks@gmail.com> Cc: Masahiro Yamada <masahiroy@kernel.org> Tested-by: Randy Dunlap <rdunlap@infradead.org> Acked-by: Randy Dunlap <rdunlap@infradead.org> Signed-off-by: Jonathan Corbet <corbet@lwn.net> Link: https://lore.kernel.org/r/e5c43f36-45cd-49f4-b7b8-ff342df3c7a4@gmail.com
2024-12-11ASoC: tas2781: Fix calibration issue in stress testShenghao Ding
One specific test condition: the default registers of p[j].reg ~ p[j+3].reg are 0, TASDEVICE_REG(0x00, 0x14, 0x38)(PLT_FLAG_REG), TASDEVICE_REG(0x00, 0x14, 0x40)(SINEGAIN_REG), and TASDEVICE_REG(0x00, 0x14, 0x44)(SINEGAIN2_REG). After first calibration, they are freshed to TASDEVICE_REG(0x00, 0x1a, 0x20), TASDEVICE_REG(0x00, 0x16, 0x58)(PLT_FLAG_REG), TASDEVICE_REG(0x00, 0x14, 0x44)(SINEGAIN_REG), and TASDEVICE_REG(0x00, 0x16, 0x64)(SINEGAIN2_REG) via "Calibration Start" kcontrol. In second calibration, the p[j].reg ~ p[j+3].reg have already become tas2781_cali_start_reg. However, p[j+2].reg, TASDEVICE_REG(0x00, 0x14, 0x44)(SINEGAIN_REG), will be freshed to TASDEVICE_REG(0x00, 0x16, 0x64), which is the third register in the input params of the kcontrol. This is why only first calibration can work, the second-time, third-time or more-time calibration always failed without reboot. Of course, if no p[j].reg is in the list of tas2781_cali_start_reg, this stress test can work well. Fixes: 49e2e353fb0d ("ASoC: tas2781: Add Calibration Kcontrols for Chromebook") Signed-off-by: Shenghao Ding <shenghao-ding@ti.com> Link: https://patch.msgid.link/20241211043859.1328-1-shenghao-ding@ti.com Signed-off-by: Mark Brown <broonie@kernel.org>
2024-12-11coresight: Fix dsb_mode_store() unsigned val is never less than zeroPei Xiao
dsb_mode_store() warn: unsigned 'val' is never less than zero. Reported-by: kernel test robot <lkp@intel.com> Closes: https://lore.kernel.org/oe-kbuild-all/202410150702.UaZ7kvet-lkp@intel.com/ Fixes: 018e43ad1eee ("coresight-tpdm: Add node to set dsb programming mode") Signed-off-by: Pei Xiao <xiaopei01@kylinos.cn> Reviewed-by: James Clark <james.clark@linaro.org> Signed-off-by: Suzuki K Poulose <suzuki.poulose@arm.com> Link: https://lore.kernel.org/r/122503017ada249fbf12be3fa4ee6ccb8f8c78cc.1732156624.git.xiaopei01@kylinos.cn
2024-12-11coresight: dummy: Add static trace id support for dummy sourceMao Jinlong
Some dummy source has static trace id configured in HW and it cannot be changed via software programming. Configure the trace id in device tree and reserve the id when device probe. Signed-off-by: Mao Jinlong <quic_jinlmao@quicinc.com> Link: https://lore.kernel.org/r/20241121062829.11571-4-quic_jinlmao@quicinc.com [ Fix Date and Version to December 2024, v6.14 ] Signed-off-by: Suzuki K Poulose <suzuki.poulose@arm.com>
2024-12-11coresight: Add support to get static id for system trace sourcesMao Jinlong
Dynamic trace id was introduced in coresight subsystem, so trace id is allocated dynamically. However, some hardware ATB source has static trace id and it cannot be changed via software programming. For such source, it can call coresight_get_static_trace_id to get the fixed trace id from device node and pass id to coresight_trace_id_get_static_system_id to reserve the id. Signed-off-by: Mao Jinlong <quic_jinlmao@quicinc.com> Reviewed-by: Mike Leach <mike.leach@linaro.org> Signed-off-by: Suzuki K Poulose <suzuki.poulose@arm.com> Link: https://lore.kernel.org/r/20241121062829.11571-3-quic_jinlmao@quicinc.com
2024-12-11dt-bindings: arm: Add arm,static-trace-id for coresight dummy sourceMao Jinlong
Some dummy source HW has static trace id which cannot be changed via software programming. Add arm,static-trace-id for static id support to coresight dummy source. Signed-off-by: Mao Jinlong <quic_jinlmao@quicinc.com> Reviewed-by: Rob Herring (Arm) <robh@kernel.org> Reviewed-by: Mike Leach <mike.leach@linaro.org> Signed-off-by: Suzuki K Poulose <suzuki.poulose@arm.com> Link: https://lore.kernel.org/r/20241121062829.11571-2-quic_jinlmao@quicinc.com
2024-12-11coresight: Drop atomics in connection refcountsJames Clark
These belong to the device being enabled or disabled and are only ever used inside the device's spinlock. Remove the atomics to not imply that there are any other concurrent accesses. If atomics were necessary I don't think they would have been enough anyway. There would be nothing to prevent an enable or disable running concurrently if not for the spinlock. Signed-off-by: James Clark <james.clark@linaro.org> Reviewed-by: Yeoreum Yun <yeoreum.yun@arm.com> Signed-off-by: Suzuki K Poulose <suzuki.poulose@arm.com> Link: https://lore.kernel.org/r/20241128121414.2425119-1-james.clark@linaro.org
2024-12-11Coresight: Narrow down the matching range of tpdmSongwei Chai
The format of tpdm's peripheral id is 1f0exx. To avoid potential conflicts in the future, update the .id_table's id to 0x001f0e00. This update will narrow down the matching range and prevent incorrect matches. For example, another component's peripheral id might be f0e00, which would incorrectly match the old id. Fixes: b3c71626a933 ("Coresight: Add coresight TPDM source driver") Signed-off-by: Songwei Chai <quic_songchai@quicinc.com> [ trimmmed Fixes commit sha to 12 chars ] Signed-off-by: Suzuki K Poulose <suzuki.poulose@arm.com> Link: https://lore.kernel.org/r/20241009091728.1638-1-quic_songchai@quicinc.com
2024-12-10net: renesas: rswitch: handle stop vs interrupt raceNikita Yushchenko
Currently the stop routine of rswitch driver does not immediately prevent hardware from continuing to update descriptors and requesting interrupts. It can happen that when rswitch_stop() executes the masking of interrupts from the queues of the port being closed, napi poll for that port is already scheduled or running on a different CPU. When execution of this napi poll completes, it will unmask the interrupts. And unmasked interrupt can fire after rswitch_stop() returns from napi_disable() call. Then, the handler won't mask it, because napi_schedule_prep() will return false, and interrupt storm will happen. This can't be fixed by making rswitch_stop() call napi_disable() before masking interrupts. In this case, the interrupt storm will happen if interrupt fires between napi_disable() and masking. Fix this by checking for priv->opened_ports bit when unmasking interrupts after napi poll. For that to be consistent, move priv->opened_ports changes into spinlock-protected areas, and reorder other operations in rswitch_open() and rswitch_stop() accordingly. Signed-off-by: Nikita Yushchenko <nikita.yoush@cogentembedded.com> Reviewed-by: Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com> Fixes: 3590918b5d07 ("net: ethernet: renesas: Add support for "Ethernet Switch"") Link: https://patch.msgid.link/20241209113204.175015-1-nikita.yoush@cogentembedded.com Signed-off-by: Jakub Kicinski <kuba@kernel.org>
2024-12-10Merge branch 'net-renesas-rswitch-several-fixes'Jakub Kicinski
Nikita Yushchenko says: ==================== net: renesas: rswitch: several fixes This series fixes several glitches found in the rswitch driver. Repost of https://lore.kernel.org/20241206190015.4194153-1-nikita.yoush@cogentembedded.com ==================== Link: https://patch.msgid.link/20241208095004.69468-1-nikita.yoush@cogentembedded.com Signed-off-by: Jakub Kicinski <kuba@kernel.org>
2024-12-10net: renesas: rswitch: avoid use-after-put for a device tree nodeNikita Yushchenko
The device tree node saved in the rswitch_device structure is used at several driver locations. So passing this node to of_node_put() after the first use is wrong. Move of_node_put() for this node to exit paths. Fixes: b46f1e579329 ("net: renesas: rswitch: Simplify struct phy * handling") Signed-off-by: Nikita Yushchenko <nikita.yoush@cogentembedded.com> Reviewed-by: Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com> Link: https://patch.msgid.link/20241208095004.69468-5-nikita.yoush@cogentembedded.com Signed-off-by: Jakub Kicinski <kuba@kernel.org>
2024-12-10net: renesas: rswitch: fix leaked pointer on error pathNikita Yushchenko
If error path is taken while filling descriptor for a frame, skb pointer is left in the entry. Later, on the ring entry reuse, the same entry could be used as a part of a multi-descriptor frame, and skb for that new frame could be stored in a different entry. Then, the stale pointer will reach the completion routine, and passed to the release operation. Fix that by clearing the saved skb pointer at the error path. Fixes: d2c96b9d5f83 ("net: rswitch: Add jumbo frames handling for TX") Signed-off-by: Nikita Yushchenko <nikita.yoush@cogentembedded.com> Reviewed-by: Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com> Link: https://patch.msgid.link/20241208095004.69468-4-nikita.yoush@cogentembedded.com Signed-off-by: Jakub Kicinski <kuba@kernel.org>
generated by cgit (git 2.34.1) at 2025-09-19 13:29:30 +0000