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2024-04-30platform/chrome: cros_ec: Handle events during suspend after resume completionKarthikeyan Ramasubramanian
Commit 47ea0ddb1f56 ("platform/chrome: cros_ec_lpc: Separate host command and irq disable") re-ordered the resume sequence. Before that change, cros_ec resume sequence is: 1) Enable IRQ 2) Send resume event 3) Handle events during suspend After commit 47ea0ddb1f56 ("platform/chrome: cros_ec_lpc: Separate host command and irq disable"), cros_ec resume sequence is: 1) Enable IRQ 2) Handle events during suspend 3) Send resume event. This re-ordering leads to delayed handling of any events queued between items 2) and 3) with the updated sequence. Also in certain platforms, EC skips triggering interrupt for certain events eg. mkbp events until the resume event is received. Such events are stuck in the host event queue indefinitely. This change puts back the original order to avoid any delay in handling the pending events. Fixes: 47ea0ddb1f56 ("platform/chrome: cros_ec_lpc: Separate host command and irq disable") Cc: <stable@vger.kernel.org> Cc: Lalith Rajendran <lalithkraj@chromium.org> Cc: <chrome-platform@lists.linux.dev> Signed-off-by: Karthikeyan Ramasubramanian <kramasub@chromium.org> Link: https://lore.kernel.org/r/20240429121343.v2.1.If2e0cef959f1f6df9f4d1ab53a97c54aa54208af@changeid Signed-off-by: Tzung-Bi Shih <tzungbi@kernel.org>
2024-04-29Merge tag 'wq-for-6.9-rc6-fixes' of ↵Linus Torvalds
git://git.kernel.org/pub/scm/linux/kernel/git/tj/wq Pull workqueue fixes from Tejun Heo: "Two doc update patches and the following three fixes: - On single node systems, the default pool is used but the node_nr_active for the default pool was set to min_active. This effectively limited the max concurrency of unbound pools on single node systems to 8 causing performance regressions on some workloads. Fixed by setting the default pool's node_nr_active to max_active. - wq_update_node_max_active() could trigger divide-by-zero if the intersection between the allowed CPUs for an unbound workqueue and online CPUs becomes empty. - When kick_pool() was trying to repatriate a worker to a CPU in its pod by setting task->wake_cpu, it didn't consider whether the CPU being selected is online or not which obviously can lead to subobtimal behaviors. On s390, this triggered a crash in arch code. The workqueue patch removes the gross misbehavior but doesn't fix the crash completely as there's a race window in which CPUs can go down after wake_cpu is set. Need to decide whether the fix should be on the core or arch side" * tag 'wq-for-6.9-rc6-fixes' of git://git.kernel.org/pub/scm/linux/kernel/git/tj/wq: workqueue: Fix divide error in wq_update_node_max_active() workqueue: The default node_nr_active should have its max set to max_active workqueue: Fix selection of wake_cpu in kick_pool() docs/zh_CN: core-api: Update translation of workqueue.rst to 6.9-rc1 Documentation/core-api: Update events_freezable_power references.
2024-04-30iommu/vt-d: Enable posted mode for device MSIsJacob Pan
With posted MSI feature enabled on the CPU side, iommu interrupt remapping table entries (IRTEs) for device MSI/x can be allocated, activated, and programed in posted mode. This means that IRTEs are linked with their respective PIDs of the target CPU. Handlers for the posted MSI notification vector will de-multiplex device MSI handlers. CPU notifications are coalesced if interrupts arrive at a high frequency. Posted interrupts are only used for device MSI and not for legacy devices (IO/APIC, HPET). Introduce a new irq_chip for posted MSIs, which has a dummy irq_ack() callback as EOI is performed in the notification handler once. When posted MSI is enabled, MSI domain/chip hierarchy will look like this example: domain: IR-PCI-MSIX-0000:50:00.0-12 hwirq: 0x29 chip: IR-PCI-MSIX-0000:50:00.0 flags: 0x430 IRQCHIP_SKIP_SET_WAKE IRQCHIP_ONESHOT_SAFE parent: domain: INTEL-IR-10-13 hwirq: 0x2d0000 chip: INTEL-IR-POST flags: 0x0 parent: domain: VECTOR hwirq: 0x77 chip: APIC Suggested-by: Thomas Gleixner <tglx@linutronix.de> Signed-off-by: Jacob Pan <jacob.jun.pan@linux.intel.com> Signed-off-by: Thomas Gleixner <tglx@linutronix.de> Link: https://lore.kernel.org/r/20240423174114.526704-13-jacob.jun.pan@linux.intel.com
2024-04-30iommu/vt-d: Make posted MSI an opt-in command line optionJacob Pan
Add a command line opt-in option for posted MSI if CONFIG_X86_POSTED_MSI=y. Also introduce a helper function for testing if posted MSI is supported on the platform. Signed-off-by: Jacob Pan <jacob.jun.pan@linux.intel.com> Signed-off-by: Thomas Gleixner <tglx@linutronix.de> Link: https://lore.kernel.org/r/20240423174114.526704-12-jacob.jun.pan@linux.intel.com
2024-04-30x86/irq: Extend checks for pending vectors to posted interruptsJacob Pan
During interrupt affinity change, it is possible to have interrupts delivered to the old CPU after the affinity has changed to the new one. To prevent lost interrupts, local APIC IRR is checked on the old CPU. Similar checks must be done for posted MSIs given the same reason. Consider the following scenario: Device system agent iommu memory CPU/LAPIC 1 FEEX_XXXX 2 Interrupt request 3 Fetch IRTE -> 4 ->Atomic Swap PID.PIR(vec) Push to Global Observable(GO) 5 if (ON*) done;* else 6 send a notification -> * ON: outstanding notification, 1 will suppress new notifications If the affinity change happens between 3 and 5 in the IOMMU, the old CPU's posted interrupt request (PIR) could have the pending bit set for the vector being moved. Add a helper function to check individual vector status. Then use the helper to check for pending interrupts on the source CPU's PID. Signed-off-by: Jacob Pan <jacob.jun.pan@linux.intel.com> Signed-off-by: Thomas Gleixner <tglx@linutronix.de> Link: https://lore.kernel.org/r/20240423174114.526704-11-jacob.jun.pan@linux.intel.com
2024-04-30x86/irq: Factor out common code for checking pending interruptsJacob Pan
Use a common function for checking pending interrupt vector in APIC IRR instead of duplicated open coding them. Additional checks for posted MSI vectors can then be contained in this function. Signed-off-by: Jacob Pan <jacob.jun.pan@linux.intel.com> Signed-off-by: Thomas Gleixner <tglx@linutronix.de> Link: https://lore.kernel.org/r/20240423174114.526704-10-jacob.jun.pan@linux.intel.com
2024-04-30x86/irq: Install posted MSI notification handlerJacob Pan
All MSI vectors are multiplexed into a single notification vector when posted MSI is enabled. It is the responsibility of the notification vector handler to demultiplex MSI vectors. In the handler the MSI vector handlers are dispatched without IDT delivery for each pending MSI interrupt. For example, the interrupt flow will change as follows: (3 MSIs of different vectors arrive in a a high frequency burst) BEFORE: interrupt(MSI) irq_enter() handler() /* EOI */ irq_exit() process_softirq() interrupt(MSI) irq_enter() handler() /* EOI */ irq_exit() process_softirq() interrupt(MSI) irq_enter() handler() /* EOI */ irq_exit() process_softirq() AFTER: interrupt /* Posted MSI notification vector */ irq_enter() atomic_xchg(PIR) handler() handler() handler() pi_clear_on() apic_eoi() irq_exit() process_softirq() Except for the leading MSI, CPU notifications are skipped/coalesced. For MSIs which arrive at a low frequency, the demultiplexing loop does not wait for more interrupts to coalesce. Therefore, there's no additional latency other than the processing time. Signed-off-by: Jacob Pan <jacob.jun.pan@linux.intel.com> Signed-off-by: Thomas Gleixner <tglx@linutronix.de> Link: https://lore.kernel.org/r/20240423174114.526704-9-jacob.jun.pan@linux.intel.com
2024-04-30x86/irq: Factor out handler invocation from common_interrupt()Jacob Pan
Prepare for calling external interrupt handlers directly from the posted MSI demultiplexing loop. Extract the common code from common_interrupt() to avoid code duplication. Signed-off-by: Jacob Pan <jacob.jun.pan@linux.intel.com> Signed-off-by: Thomas Gleixner <tglx@linutronix.de> Link: https://lore.kernel.org/r/20240423174114.526704-8-jacob.jun.pan@linux.intel.com
2024-04-30x86/irq: Set up per host CPU posted interrupt descriptorsJacob Pan
To support posted MSIs, create a posted interrupt descriptor (PID) for each host CPU. Later on, when setting up interrupt affinity, the IOMMU's interrupt remapping table entry (IRTE) will point to the physical address of the matching CPU's PID. Each PID is initialized with the owner CPU's physical APICID as the destination. Originally-by: Thomas Gleixner <tglx@linutronix.de> Signed-off-by: Jacob Pan <jacob.jun.pan@linux.intel.com> Signed-off-by: Thomas Gleixner <tglx@linutronix.de> Link: https://lore.kernel.org/r/20240423174114.526704-7-jacob.jun.pan@linux.intel.com
2024-04-30x86/irq: Reserve a per CPU IDT vector for posted MSIsJacob Pan
When posted MSI is enabled, all device MSIs are multiplexed into a single notification vector. MSI handlers will be de-multiplexed at run-time by system software without IDT delivery. Signed-off-by: Jacob Pan <jacob.jun.pan@linux.intel.com> Signed-off-by: Thomas Gleixner <tglx@linutronix.de> Link: https://lore.kernel.org/r/20240423174114.526704-6-jacob.jun.pan@linux.intel.com
2024-04-30x86/irq: Add a Kconfig option for posted MSIJacob Pan
This option will be used to support delivering MSIs as posted interrupts. Interrupt remapping is required. Signed-off-by: Jacob Pan <jacob.jun.pan@linux.intel.com> Signed-off-by: Thomas Gleixner <tglx@linutronix.de> Link: https://lore.kernel.org/r/20240423174114.526704-5-jacob.jun.pan@linux.intel.com
2024-04-30x86/irq: Remove bitfields in posted interrupt descriptorJacob Pan
Mixture of bitfields and types is weird and really not intuitive, remove bitfields and use typed data exclusively. Bitfields often result in inferior machine code. Suggested-by: Sean Christopherson <seanjc@google.com> Suggested-by: Thomas Gleixner <tglx@linutronix.de> Signed-off-by: Jacob Pan <jacob.jun.pan@linux.intel.com> Signed-off-by: Thomas Gleixner <tglx@linutronix.de> Link: https://lore.kernel.org/r/20240423174114.526704-4-jacob.jun.pan@linux.intel.com Link: https://lore.kernel.org/all/20240404101735.402feec8@jacob-builder/T/#mf66e34a82a48f4d8e2926b5581eff59a122de53a
2024-04-30x86/irq: Unionize PID.PIR for 64bit access w/o castingJacob Pan
Make the PIR field into u64 such that atomic xchg64 can be used without ugly casting. Suggested-by: Thomas Gleixner <tglx@linutronix.de> Signed-off-by: Jacob Pan <jacob.jun.pan@linux.intel.com> Signed-off-by: Thomas Gleixner <tglx@linutronix.de> Link: https://lore.kernel.org/r/20240423174114.526704-3-jacob.jun.pan@linux.intel.com
2024-04-30KVM: VMX: Move posted interrupt descriptor out of VMX codeJacob Pan
To prepare native usage of posted interrupts, move the PID declarations out of VMX code such that they can be shared. Signed-off-by: Jacob Pan <jacob.jun.pan@linux.intel.com> Signed-off-by: Thomas Gleixner <tglx@linutronix.de> Acked-by: Sean Christopherson <seanjc@google.com> Link: https://lore.kernel.org/r/20240423174114.526704-2-jacob.jun.pan@linux.intel.com
2024-04-30clocksource: Make the int help prompt unit readable in ncursesBorislav Petkov (AMD)
When doing make menuconfig and searching for the CLOCKSOURCE_WATCHDOG_MAX_SKEW_US config item, the help says: │ Symbol: CLOCKSOURCE_WATCHDOG_MAX_SKEW_US [=125] │ Type : integer │ Range : [50 1000] │ Defined at kernel/time/Kconfig:204 │ Prompt: Clocksource watchdog maximum allowable skew (in s) ^^^ │ Depends on: GENERIC_CLOCKEVENTS [=y] && CLOCKSOURCE_WATCHDOG [=y] because on some terminals, it cannot display the 'μ' char, unicode number 0x3bc. So simply write it out so that there's no trouble. Signed-off-by: Borislav Petkov (AMD) <bp@alien8.de> Signed-off-by: Thomas Gleixner <tglx@linutronix.de> Acked-by: Paul E. McKenney <paulmck@kernel.org> Acked-by: Randy Dunlap <rdunlap@infradead.org> Link: https://lore.kernel.org/r/20240428102143.26764-1-bp@kernel.org
2024-04-29Merge tag 'sunxi-clk-fixes-for-6.9-1' of ↵Stephen Boyd
https://git.kernel.org/pub/scm/linux/kernel/git/sunxi/linux into clk-fixes Pull Allwinner clk driver fixes from Jernej Skrabec: - fix H6 CPU rate change via reparenting - set A64 MIPI PLL min & max rate * tag 'sunxi-clk-fixes-for-6.9-1' of https://git.kernel.org/pub/scm/linux/kernel/git/sunxi/linux: clk: sunxi-ng: a64: Set minimum and maximum rate for PLL-MIPI clk: sunxi-ng: common: Support minimum and maximum rate clk: sunxi-ng: h6: Reparent CPUX during PLL CPUX rate change
2024-04-29Merge tag 'scsi-fixes' of ↵Linus Torvalds
git://git.kernel.org/pub/scm/linux/kernel/git/jejb/scsi Pull SCSI fix from James Bottomley: "Minor core fix to prevent the sd driver printing the stream count every time we rescan and instead print only if it's changed" * tag 'scsi-fixes' of git://git.kernel.org/pub/scm/linux/kernel/git/jejb/scsi: scsi: sd: Only print updates to permanent stream count
2024-04-29x86/tsc: Trust initial offset in architectural TSC-adjust MSRsDaniel J Blueman
When the BIOS configures the architectural TSC-adjust MSRs on secondary sockets to correct a constant inter-chassis offset, after Linux brings the cores online, the TSC sync check later resets the core-local MSR to 0, triggering HPET fallback and leading to performance loss. Fix this by unconditionally using the initial adjust values read from the MSRs. Trusting the initial offsets in this architectural mechanism is a better approach than special-casing workarounds for specific platforms. Signed-off-by: Daniel J Blueman <daniel@quora.org> Signed-off-by: Thomas Gleixner <tglx@linutronix.de> Reviewed-by: Steffen Persvold <sp@numascale.com> Reviewed-by: James Cleverdon <james.cleverdon.external@eviden.com> Reviewed-by: Dimitri Sivanich <sivanich@hpe.com> Reviewed-by: Prarit Bhargava <prarit@redhat.com> Link: https://lore.kernel.org/r/20240419085146.175665-1-daniel@quora.org
2024-04-29Merge tag 'nfsd-6.9-6' of ↵Linus Torvalds
git://git.kernel.org/pub/scm/linux/kernel/git/cel/linux Pull nfsd fix from Chuck Lever: - Avoid freeing unallocated memory (v6.7 regression) * tag 'nfsd-6.9-6' of git://git.kernel.org/pub/scm/linux/kernel/git/cel/linux: NFSD: Fix nfsd4_encode_fattr4() crasher
2024-04-29Merge tag 'ffa-updates-6.10' of ↵Arnd Bergmann
git://git.kernel.org/pub/scm/linux/kernel/git/sudeep.holla/linux into soc/drivers Arm FF-A updates for v6.10 1. Support for handling notification pending interrupt(NPI) The FF-A uses the notification pending interrupt to inform the receiver that it has a pending notification. This is a virtual interrupt and is used by the following type of receivers: - A guest/VM running under a hypervisor(normal world usecase) - An S-EL1 SP running under a S-EL2 SPMC(secure world only usecase) Also, when the FF-A driver is running inside a guest VM under an hypervisor, the driver/guest VM doesn't have the permission/capability to request the creation of notification bitmaps. For a VM, the hypervisor reserves memory for its VM and hypervisor framework notification bitmaps and the SPMC reserves memory for its SP and SPMC framework notification bitmaps before the hypervisor initializes it. These changes include skipping of creation of notification bitmaps, some refactoring around schedule receiver interrupt(SRI) handling and addition of support for NPI. 2. Support for FF-A indirect messaging The FFA_MSG_SEND2 can be used to transmit a partition message from the Tx buffer of the sender(the driver in this case) endpoint to the Rx buffer of the receiver endpoint and inform the scheduler that the receiver endpoint must be run. Apart from these two main features, there is an optimisation to avoid queuing of a work when already running on the worker queue. * tag 'ffa-updates-6.10' of git://git.kernel.org/pub/scm/linux/kernel/git/sudeep.holla/linux: firmware: arm_ffa: Avoid queuing work when running on the worker queue firmware: arm_ffa: Fix memory corruption in ffa_msg_send2() firmware: arm_ffa: Add support for FFA_MSG_SEND2 firmware: arm_ffa: Stash the partition properties for query purposes firmware: arm_ffa: Fix kernel warning about incorrect SRI/NPI firmware: arm_ffa: Add support for handling notification pending interrupt(NPI) firmware: arm_ffa: Refactor SRI handling in prepartion to add NPI support firmware: arm_ffa: Skip creation of the notification bitmaps Link: https://lore.kernel.org/r/20240426105051.1527016-1-sudeep.holla@arm.com Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2024-04-29Merge tag 'scmi-updates-6.10' of ↵Arnd Bergmann
git://git.kernel.org/pub/scm/linux/kernel/git/sudeep.holla/linux into soc/drivers Arm SCMI updates for v6.10 1. Basic support for SCMI v3.2 pincontrol protocol SCMI v3.2 introduces pincontrol protocol which is intended for controlling pins and their configuration. The pin control protocol provides commands to: - List the pins, groups of pins, available functions, and their association with each other. - Set the parameter configuration and multiplexing of the pins or groups of pins - Optionally request exclusive access to a pin or group of pins. - Optionally configure the permissions of an agent to access a pin or group of pins. These changes adds basic support for the same in the SCMI core layer and an implementation of the generic scmi-pinctrl driver with associated DT bindings. 2. Framework support for multiple vendors custom protocols With the fixed space for vendor protocols, the possibility of having multiple vendors implementing distinct SCMI vendor protocols with the same overlapping protocol number is very high and with the need to support them all in a single kernel image or a module is also high. In order to implement the same we assume: - vendor protocols has to be tagged at build time with a vendor_id - vendor protocols could also optionally be tagged at build time with sub_vendor_id and implementation version At the initialisation all the built vendor protocols are registered with the SCMI core using a key derived from the above tags 3. Logging and tracing improvements This includes using dev_err_probe() to bail out from probe, adding message dump traces for bad and unexpected replies and widening of the tag buffer in trace_scmi_dump_msg to allow diverse tag names 4. Miscellaneous updates or improvements This includes adding the accessor function get_max_msg_size() used in pinctl protocol, updation of dt-bindings examples for protocol@13 to promote new bindings and simplification of scmi_devm_notifier_unregister * tag 'scmi-updates-6.10' of git://git.kernel.org/pub/scm/linux/kernel/git/sudeep.holla/linux: pinctrl: Implementation of the generic scmi-pinctrl driver firmware: arm_scmi: Add basic support for SCMI v3.2 pincontrol protocol dt-bindings: firmware: Support SCMI pinctrl protocol firmware: arm_scmi: Introduce get_max_msg_size() helper/accessor firmware: arm_scmi: Add support for multiple vendors custom protocols dt-bindings: firmware: arm,scmi: Update examples for protocol@13 firmware: arm_scmi: Avoid non-constant printk format strings firmware: arm_scmi: Use dev_err_probe to bail out firmware: arm_scmi: Simplify scmi_devm_notifier_unregister firmware: arm_scmi: Add message dump traces for bad and unexpected replies firmware: arm_scmi: Add helper to trace bad messages include: trace: Widen the tag buffer in trace_scmi_dump_msg firmware: arm_scmi: Log the perf domain names in the error paths Link: https://lore.kernel.org/r/20240426105031.1526987-1-sudeep.holla@arm.com Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2024-04-29Merge tag 'tee-ts-for-v6.10' of ↵Arnd Bergmann
https://git.linaro.org/people/jens.wiklander/linux-tee into soc/drivers TEE driver for Trusted Services This introduces a TEE driver for Trusted Services [1]. Trusted Services is a TrustedFirmware.org project that provides a framework for developing and deploying device Root of Trust services in FF-A [2] Secure Partitions. The project hosts the reference implementation of Arm Platform Security Architecture [3] for Arm A-profile devices. The FF-A Secure Partitions are accessible through the FF-A driver in Linux. However, the FF-A driver doesn't have a user space interface so user space clients currently cannot access Trusted Services. The goal of this TEE driver is to bridge this gap and make Trusted Services functionality accessible from user space. [1] https://www.trustedfirmware.org/projects/trusted-services/ [2] https://developer.arm.com/documentation/den0077/ [3] https://www.arm.com/architecture/security-features/platform-security * tag 'tee-ts-for-v6.10' of https://git.linaro.org/people/jens.wiklander/linux-tee: MAINTAINERS: tee: tstee: Add entry Documentation: tee: Add TS-TEE driver tee: tstee: Add Trusted Services TEE driver tee: optee: Move pool_op helper functions tee: Refactor TEE subsystem header files Link: https://lore.kernel.org/r/20240425073119.GA3261080@rayden Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2024-04-29Merge tag 'optee-convert-platform-remove-callback-for-v6.10' of ↵Arnd Bergmann
https://git.linaro.org/people/jens.wiklander/linux-tee into soc/drivers OP-TEE Convert to platform remove callback returning void * tag 'optee-convert-platform-remove-callback-for-v6.10' of https://git.linaro.org/people/jens.wiklander/linux-tee: tee: optee: smc: Convert to platform remove callback returning void Link: https://lore.kernel.org/r/20240425072835.GA3258167@rayden Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2024-04-29Merge tag 'mtk-soc-for-v6.10' of ↵Arnd Bergmann
git://git.kernel.org/pub/scm/linux/kernel/git/mediatek/linux into soc/drivers MediaTek driver updates for v6.10 This adds a much needed cleanup for the MediaTek CMDQ helper driver and also some more helper functions which will be used in drivers using the MediaTek Global Command Engine (GCE) HW. Also adds support for MT8188's VPPSYS mutex for MDP3 support, a new SoC in the mtk-socinfo driver and changes the marketing name for the pre existing MT8188 SoC. * tag 'mtk-soc-for-v6.10' of git://git.kernel.org/pub/scm/linux/kernel/git/mediatek/linux: soc: mediatek: mtk-socinfo: Correct the marketing name for MT8188GV soc: mediatek: mtk-socinfo: Add entry for MT8395AV/ZA Genio 1200 soc: mediatek: mtk-mutex: Add support for MT8188 VPPSYS soc: mediatek: socinfo: Advertise about unknown MediaTek SoC soc: mediatek: cmdq: Don't log an error when gce-client-reg is not found soc: mediatek: mtk-cmdq: Add cmdq_pkt_acquire_event() function soc: mediatek: mtk-cmdq: Add cmdq_pkt_poll_addr() function soc: mediatek: mtk-cmdq: Add cmdq_pkt_mem_move() function soc: mediatek: mtk-cmdq: Add specific purpose register definitions for GCE soc: mediatek: cmdq: Refine cmdq_pkt_create() and cmdq_pkt_destroy() soc: mediatek: cmdq: Remove cmdq_pkt_flush_async() helper function soc: mediatek: cmdq: Add cmdq_pkt_eoc() helper function soc: mediatek: cmdq: Add cmdq_pkt_jump_rel() helper function soc: mediatek: cmdq: Rename cmdq_pkt_jump() to cmdq_pkt_jump_abs() soc: mediatek: cmdq: Add parameter shift_pa to cmdq_pkt_jump() soc: mediatek: cmdq: Fix typo of CMDQ_JUMP_RELATIVE Link: https://lore.kernel.org/r/20240429140245.238210-2-angelogioacchino.delregno@collabora.com Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2024-04-29Merge tag 'memory-controller-drv-6.10' of ↵Arnd Bergmann
https://git.kernel.org/pub/scm/linux/kernel/git/krzk/linux-mem-ctrl into soc/drivers Memory controller drivers for v6.10 Few cleanups: 1. Correct module auto-loading - missing aliases in the module. 2. Document bindings for the Samsung S5Pv210 SoC DMC memory controller. * tag 'memory-controller-drv-6.10' of https://git.kernel.org/pub/scm/linux/kernel/git/krzk/linux-mem-ctrl: memory: mtk-smi: fix module autoloading memory: brcmstb_memc: fix module autoloading dt-bindings: memory-controllers: add Samsung S5Pv210 SoC DMC Link: https://lore.kernel.org/r/20240428162001.28011-1-krzysztof.kozlowski@linaro.org Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2024-04-29Merge tag 'drivers-ti-sysc-for-v6.10-signed' of ↵Arnd Bergmann
git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap into soc/drivers Driver updates for ti-sysc A change to update the handling of no-reset-on-init quirk to make it init time only like it should be. And a change to add the missing copyrights. Also a series of changes to simplify the driver by dropping the old unused handling for interconnect targets tagged pm_runtime_irq_safe(). These are all non-urgent changes and can be queued whenever suitable. * tag 'drivers-ti-sysc-for-v6.10-signed' of git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap: bus: ti-sysc: Drop legacy idle quirk handling bus: ti-sysc: Drop legacy quirk handling for smartreflex bus: ti-sysc: Drop legacy quirk handling for uarts bus: ti-sysc: Add a description and copyrights bus: ti-sysc: Move check for no-reset-on-init Link: https://lore.kernel.org/r/pull-1714283210-549557@atomide.com Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2024-04-29Merge tag 'qcom-drivers-for-6.10' of ↵Arnd Bergmann
https://git.kernel.org/pub/scm/linux/kernel/git/qcom/linux into soc/drivers Qualcomm driver updates for v6.10 The Qualcomm SCM driver initialization order is improved, to avoid any potential for a client to find a half-initialized SCM instance. The handling of download mode bits is updated to not attempt QCOM_SCM_BOOT_SET_DLOAD_MODE if a io-address for the update is specified, and that path is changed to perform a read-modify-write to avoid updating unrelated bits. Error handling is corrected in the peripheral authentication service (PAS) functions, to release interconnect bandwidth votes in the case of an error. An unwanted error print on allocation error is also removed from this code path. The QSEECOM allow list is marked __maybe_unused to avoid build warnings when built with !OF. The error handling related to the interconnect API is cleaned up to avoid handling the impossible IS_ERR() condition. initcall level is bumped to "core" for cmd-db and rpmh-rsc, as dependent drivers like regulators, interconnects and clocks are registered at this level. Another attempt is made to remove the strncpy() usage in cmd-db, this time with strtomem_pad() which has the correct characteristics. The bwmon regmap cache is changed to maple tree. After an attempt to add missing MODULE_DEVICE_TABLEs to debug drivers, the intention of not having them automatically load is documented. Operations on the pmic_glink client list is put under mutual exclusion, to avoid races when clients are being registered. pmic_glink client registered after the firmware notification arrived was not informed that the firmware was up, this is resolved. More DSPs and the apss subsystem is added to the Qualcomm sleep stats driver. Checks for in-flight regulator requests in the RPMh RSC driver is improved to deal with the fact that these occupy multiple registers, so it's insufficient to just to direct address comparison. The socinfo drivers learns about X1 Elite and SMB2360 PMIC. The maintainers entry is split between the linux-arm-msm list and subset that is maintained in the qcom-soc tree, to avoid some confusion about maintainership. * tag 'qcom-drivers-for-6.10' of https://git.kernel.org/pub/scm/linux/kernel/git/qcom/linux: (21 commits) soc: qcom: cmd-db: replace deprecated strncpy with strtomem soc: qcom: rpmh-rsc: Enhance check for VRM in-flight request firmware: qcom: scm: Modify only the download bits in TCSR register firmware: qcom: scm: Fix __scm and waitq completion variable initialization firmware: qcom: scm: Rework dload mode availability check firmware: qcom: scm: Remove redundant scm argument from qcom_scm_waitq_wakeup() firmware: qcom: scm: Remove log reporting memory allocation failure soc: qcom: pmic_glink: notify clients about the current state soc: qcom: pmic_glink: don't traverse clients list without a lock soc: qcom: mention intentionally broken module autoloading firmware: qcom: qcm: fix unused qcom_scm_qseecom_allowlist MAINTAINERS: Split Qualcomm SoC and linux-arm-msm entries soc: qcom: qcom_stats: Add DSPs and apss subsystem stats dt-bindings: soc: qcom: qcom,pmic-glink: document QCM6490 compatible soc: qcom: socinfo: Add SMB2360 PMIC soc: qcom: socinfo: Add X1E80100 SoC ID table entry dt-bindings: arm: qcom,ids: Add SoC ID for X1E80100 soc: qcom: Update init level to core_initcall() for cmd-db and rpmh-rsc soc: qcom: icc-bwmon: Convert to use maple tree register cache firmware: qcom_scm: remove IS_ERR() checks from qcom_scm_bw_{en,dis}able() ... Link: https://lore.kernel.org/r/20240427160917.1431354-1-andersson@kernel.org Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2024-04-29Merge tag 'tegra-for-6.10-soc' of ↵Arnd Bergmann
git://git.kernel.org/pub/scm/linux/kernel/git/tegra/linux into soc/drivers soc/tegra: Changes for v6.10-rc1 This contains a single commit that adds a wake event for Ethernet for some devices. * tag 'tegra-for-6.10-soc' of git://git.kernel.org/pub/scm/linux/kernel/git/tegra/linux: soc/tegra: pmc: Add EQOS wake event for Tegra194 and Tegra234 Link: https://lore.kernel.org/r/20240426180519.3972626-1-thierry.reding@gmail.com Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2024-04-29Merge tag 'stm32-bus-firewall-for-v6.10-1' of ↵Arnd Bergmann
git://git.kernel.org/pub/scm/linux/kernel/git/atorgue/stm32 into soc/drivers STM32 Firewall bus for v6.10, round 1 Highlights: --------- Introduce STM32 Firewall framework for STM32MP1x and STM32MP2x platforms. STM32MP1x(ETZPC) and STM32MP2x(RIFSC) Firewall controllers register to the framework to offer firewall services such as access granting. This series of patches is a new approach on the previous STM32 system bus, history is available here: https://lore.kernel.org/lkml/20230127164040.1047583/ The need for such framework arises from the fact that there are now multiple hardware firewalls implemented across multiple products. Drivers are shared between different products, using the same code. When it comes to firewalls, the purpose mostly stays the same: Protect hardware resources. But the implementation differs, and there are multiple types of firewalls: peripheral, memory, ... Some hardware firewall controllers such as the RIFSC implemented on STM32MP2x platforms may require to take ownership of a resource before being able to use it, hence the requirement for firewall services to take/release the ownership of such resources. On the other hand, hardware firewall configurations are becoming more and more complex. These mecanisms prevent platform crashes or other firewall-related incoveniences by denying access to some resources. The stm32 firewall framework offers an API that is defined in firewall controllers drivers to best fit the specificity of each firewall. For every peripherals protected by either the ETZPC or the RIFSC, the firewall framework checks the firewall controlelr registers to see if the peripheral's access is granted to the Linux kernel. If not, the peripheral is configured as secure, the node is marked populated, so that the driver is not probed for that device. The firewall framework relies on the access-controller device tree binding. It is used by peripherals to reference a domain access controller. In this case a firewall controller. The bus uses the ID referenced by the access-controller property to know where to look in the firewall to get the security configuration for the peripheral. This allows a device tree description rather than a hardcoded peripheral table in the bus driver. The STM32 ETZPC device is responsible for filtering accesses based on security level, or co-processor isolation for any resource connected to it. The RIFSC is responsible for filtering accesses based on Compartment ID / security level / privilege level for any resource connected to it. * tag 'stm32-bus-firewall-for-v6.10-1' of git://git.kernel.org/pub/scm/linux/kernel/git/atorgue/stm32: bus: stm32_firewall: fix off by one in stm32_firewall_get_firewall() bus: etzpc: introduce ETZPC firewall controller driver bus: rifsc: introduce RIFSC firewall controller driver of: property: fw_devlink: Add support for "access-controller" firewall: introduce stm32_firewall framework dt-bindings: bus: document ETZPC dt-bindings: bus: document RIFSC dt-bindings: treewide: add access-controllers description dt-bindings: document generic access controllers Link: https://lore.kernel.org/r/7dc64226-5429-4ab7-a8c8-6053b12e3cf5@foss.st.com Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2024-04-29Merge tag 'hisi-drivers-for-6.10' of https://github.com/hisilicon/linux-hisi ↵Arnd Bergmann
into soc/drivers HiSilicon driver updates for v6.10 - Add the check for obtaining complete port attribute in the HCCS driver - Replace MAILBOX dependency with PCC for the HCCS driver * tag 'hisi-drivers-for-6.10' of https://github.com/hisilicon/linux-hisi: soc: hisilicon: kunpeng_hccs: replace MAILBOX dependency with PCC soc: hisilicon: kunpeng_hccs: Add the check for obtaining complete port attribute Link: https://lore.kernel.org/r/662A3EDE.5070708@hisilicon.com Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2024-04-29Merge tag 'renesas-drivers-for-v6.10-tag1' of ↵Arnd Bergmann
git://git.kernel.org/pub/scm/linux/kernel/git/geert/renesas-devel into soc/drivers Renesas driver updates for v6.10 - Identify the new RZ/V2H (R9A09G057) SoC, - Enable support for the TMU (Timer Unit) on R-Car Gen2 SoCs. * tag 'renesas-drivers-for-v6.10-tag1' of git://git.kernel.org/pub/scm/linux/kernel/git/geert/renesas-devel: soc: renesas: Enable TMU support on R-Car Gen2 soc: renesas: Add identification support for RZ/V2H SoC Link: https://lore.kernel.org/r/cover.1712915532.git.geert+renesas@glider.be Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2024-04-29Merge tag 'imx-soc-6.10' of ↵Arnd Bergmann
git://git.kernel.org/pub/scm/linux/kernel/git/shawnguo/linux into soc/arm i.MX SoC changes for 6.10: - Assign the pmu->dev parent to be the platform device for MMDC driver, so that it doesn't appear directly under /sys/devices/. * tag 'imx-soc-6.10' of git://git.kernel.org/pub/scm/linux/kernel/git/shawnguo/linux: ARM: imx: Assign parents for mmdc event_source devices Link: https://lore.kernel.org/r/20240428121247.10370-1-shawnguo2@yeah.net Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2024-04-29arm64: dts: ti: k3-am625-beagleplay: Fix Ethernet PHY RESET GPIOsRoger Quadros
The RESET GPIO pinmux should be part of MDIO bus node so that they can be in the right state before the PHY can be probed via MDIO bus scan. The GPIO pin should be setup with PIN_INPUT so that input circuitry is enabled in case software wants to check pin status. Without this, incorrect status is shown in /sys/kernel/debug/gpio. Add GPIO reset for the Gigabit Ethernet PHY. As per RTL8211F datasheet, reset assert width is 10ms and PHY registers can be access accessed after 50ms of reset deassert. Fixes: f5a731f0787f ("arm64: dts: ti: Add k3-am625-beagleplay") Signed-off-by: Roger Quadros <rogerq@kernel.org> Link: https://lore.kernel.org/r/20240305-b4-for-v6-9-am65-beagleplay-ethernet-reset-v2-1-2bf463a7bf13@kernel.org Signed-off-by: Nishanth Menon <nm@ti.com>
2024-04-29Merge tag 'imx-defconfig-6.10' of ↵Arnd Bergmann
git://git.kernel.org/pub/scm/linux/kernel/git/shawnguo/linux into soc/defconfig i.MX defconfig changes for 6.10: - Enable DW HDMI bridge driver for i.MX8M Plus SoC in arm64 defconfig - Enable ONBOAD_USB_DEV driver in imx_v6_v7_defconfig to support USB2514 Hub found on imx6qdl-udoo board * tag 'imx-defconfig-6.10' of git://git.kernel.org/pub/scm/linux/kernel/git/shawnguo/linux: ARM: imx_v6_v7_defconfig: Update ONBOARD_USB_HUB to ONBOAD_USB_DEV ARM: imx_v6_v7_defconfig: Select CONFIG_USB_ONBOARD_HUB arm64: defconfig: Enable DRM_IMX8MP_DW_HDMI_BRIDGE as module Link: https://lore.kernel.org/r/20240428121247.10370-5-shawnguo2@yeah.net Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2024-04-29Merge tag 'qcom-arm64-defconfig-for-6.10' of ↵Arnd Bergmann
https://git.kernel.org/pub/scm/linux/kernel/git/qcom/linux into soc/defconfig Qualcomm Arm64 Defconfig updates for v6.10 Ext4 security labels are enabled, as the expectation of setcap being functional is widespread. SC7280 display and GPU clock controllers are enabled, to make available related functionality. The driver for the Novatek display panel found in QCM6490 IDP is enabled. The X1E80100 sound card and reset-gpio drivers are enabled to provide the necessary drivers for this. The regulator driver providing VBUS power on a few different platforms is enabled. ath12k is present on several recent platforms, so this is enabled as well. * tag 'qcom-arm64-defconfig-for-6.10' of https://git.kernel.org/pub/scm/linux/kernel/git/qcom/linux: arm64: defconfig: enable REGULATOR_QCOM_USB_VBUS arm64: defconfig: enable ext4 security labels arm64: defconfig: qcom: enable X1E80100 sound card arm64: defconfig: build ath12k as a module arm64: defconfig: Enable sc7280 display and gpu clock controllers arm64: defconfig: enable reset-gpio driver as module arm64: defconfig: enable Novatek NT36672E DSI Panel driver Link: https://lore.kernel.org/r/20240427162037.1431822-1-andersson@kernel.org Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2024-04-29Merge tag 'tegra-for-6.10-arm64-defconfig' of ↵Arnd Bergmann
git://git.kernel.org/pub/scm/linux/kernel/git/tegra/linux into soc/defconfig arm64: tegra: Default configuration updates for v6.10-rc1 Enables the Security Engine driver for the corresponding devices found on Tegra234. * tag 'tegra-for-6.10-arm64-defconfig' of git://git.kernel.org/pub/scm/linux/kernel/git/tegra/linux: arm64: defconfig: Enable Tegra Security Engine Link: https://lore.kernel.org/r/20240426180519.3972626-5-thierry.reding@gmail.com Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2024-04-29Merge tag 'sunxi-config-for-6.10-1' of ↵Arnd Bergmann
https://git.kernel.org/pub/scm/linux/kernel/git/sunxi/linux into soc/defconfig - add dependency for DRM_SUN8I_DW_HDMI in sunxi defconfig * tag 'sunxi-config-for-6.10-1' of https://git.kernel.org/pub/scm/linux/kernel/git/sunxi/linux: ARM: configs: sunxi: Enable DRM_DW_HDMI Link: https://lore.kernel.org/r/20240426164354.GA101098@jernej-laptop Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2024-04-29arm64: dts: ti: k3-am625-phyboard-lyra-rdk: Add USB-CGarrett Giordano
The USB-C PD manages plug orientation, power delivery, and our endpoint for the USB interface. Add this node and include its endpoint. Configure USB0 for role-switching and wire it to our USB-C PD endpoint. Signed-off-by: Garrett Giordano <ggiordano@phytec.com> Reviewed-by: Wadim Egorov <w.egorov@phytec.de> Link: https://lore.kernel.org/r/20240425152558.485763-1-ggiordano@phytec.com Signed-off-by: Nishanth Menon <nm@ti.com>
2024-04-29arm64: dts: ti: k3-j784s4: Add main esm address rangeUdit Kumar
Main ESM address change was missing for J784S4 SOC, So adding main ESM address mapping. Signed-off-by: Udit Kumar <u-kumar1@ti.com> Link: https://lore.kernel.org/r/20240424075423.1229127-3-u-kumar1@ti.com Signed-off-by: Nishanth Menon <nm@ti.com>
2024-04-29arm64: dts: ti: k3-j721s2: Add main esm address rangeUdit Kumar
Main ESM address change was missing for J721S2 SOC, So adding main ESM address mapping. Signed-off-by: Udit Kumar <u-kumar1@ti.com> Link: https://lore.kernel.org/r/20240424075423.1229127-2-u-kumar1@ti.com Signed-off-by: Nishanth Menon <nm@ti.com>
2024-04-29arm64: dts: ti: k3-am62-verdin-dahlia: support sleep-mociStefan Eichenberger
Previously, we had the sleep-moci pin set to always on. However, the Dahlia carrier board supports disabling the sleep-moci when the system is suspended to power down peripherals that support it. This reduces overall power consumption. This commit adds support for this feature by disabling the reg_force_sleep_moci regulator and adding a new regulator for the USB hub that can be turned off when the system is suspended. Signed-off-by: Stefan Eichenberger <stefan.eichenberger@toradex.com> Reviewed-by: Francesco Dolcini <francesco.dolcini@toradex.com> Link: https://lore.kernel.org/r/20240301084901.16656-3-eichest@gmail.com Signed-off-by: Nishanth Menon <nm@ti.com>
2024-04-29arm64: dts: ti: k3-am62-verdin: replace sleep-moci hog with regulatorStefan Eichenberger
The Verdin family has a signal called sleep-moci which can be used to turn off peripherals on the carrier board when the SoM goes into suspend. So far we have hogged this signal, which means the peripherals are always on and it is not possible to add peripherals that depend on the sleep-moci to be on. With this change, we replace the hog with a regulator so that peripherals can add their own regulators that use the same gpio. Carrier boards that allow peripherals to be powered off in suspend can disable this regulator and implement their own regulator to control the sleep-moci. Signed-off-by: Stefan Eichenberger <stefan.eichenberger@toradex.com> Reviewed-by: Francesco Dolcini <francesco.dolcini@toradex.com> Link: https://lore.kernel.org/r/20240301084901.16656-2-eichest@gmail.com Signed-off-by: Nishanth Menon <nm@ti.com>
2024-04-29arm64: dts: ti: k3-j722s-evm: Enable UHS support for MMCSDBhavya Kapoor
Enable the UHS modes for MMCSD in J722S by removing the no-1-8-v property. Signed-off-by: Bhavya Kapoor <b-kapoor@ti.com> Reviewed-by: Judith Mendez <jm@ti.com> Link: https://lore.kernel.org/r/20240422131840.34642-1-b-kapoor@ti.com Signed-off-by: Nishanth Menon <nm@ti.com>
2024-04-29arm64: dts: ti: k3-j784s4-main: Enable support for UHS modeDasnavis Sabiya
Remove sdhci-caps-mask to enable support for SDR104 speed mode for SD card and remove no-1-8-v property so that SD card can work in any UHS-1 high speed mode it can support. Fixes: 4664ebd8346a ("arm64: dts: ti: Add initial support for J784S4 SoC") Signed-off-by: Bhavya Kapoor <b-kapoor@ti.com> Signed-off-by: Dasnavis Sabiya <sabiya.d@ti.com> Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com> Signed-off-by: Judith Mendez <jm@ti.com> Link: https://lore.kernel.org/r/20240423151732.3541894-6-jm@ti.com Signed-off-by: Nishanth Menon <nm@ti.com>
2024-04-29arm64: dts: ti: k3-j721s2-main: Enable support for SDR104 speed modeBhavya Kapoor
According to TRM for J721S2, SDR104 speed mode is supported by the SoC but its capabilities were masked in device tree. Remove sdhci-caps-mask to enable support for SDR104 speed mode for SD card in J721S2 SoC. [+] Refer to : section 12.3.6.1.1 MMCSD Features, in J721S2 TRM - https://www.ti.com/lit/zip/spruj28 Fixes: b8545f9d3a54 ("arm64: dts: ti: Add initial support for J721S2 SoC") Signed-off-by: Bhavya Kapoor <b-kapoor@ti.com> Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com> Link: https://lore.kernel.org/r/20240423151732.3541894-5-jm@ti.com Signed-off-by: Nishanth Menon <nm@ti.com>
2024-04-29arm64: dts: ti: k3-am62a: Enable UHS mode support for SD cardsVignesh Raghavendra
Hook up required IO voltage regulators and drop no-1-8-v to support UHS modes on SD cards. Fixes: 5fc6b1b62639 ("arm64: dts: ti: Introduce AM62A7 family of SoCs") Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com> Signed-off-by: Judith Mendez <jm@ti.com> Link: https://lore.kernel.org/r/20240423151732.3541894-4-jm@ti.com Signed-off-by: Nishanth Menon <nm@ti.com>
2024-04-29arm64: dts: ti: k3-am65-main: Remove unused properties in sdhci nodesJudith Mendez
On AM65x platform, sdhci0 is for eMMC and sdhci1 is for SD. Remove the properties that are not applicable for each device. Fixes: eac99d38f861 ("arm64: dts: ti: k3-am654-main: Update otap-del-sel values") Fixes: d7600d070fb0 ("arm64: dts: ti: k3-am65-main: Add support for sdhci1") Signed-off-by: Judith Mendez <jm@ti.com> Link: https://lore.kernel.org/r/20240423151732.3541894-3-jm@ti.com Signed-off-by: Nishanth Menon <nm@ti.com>
2024-04-29arm64: dts: ti: k3-am65-main: Fix sdhci node propertiesJudith Mendez
Update otap-del-sel properties as per datasheet [0]. Add missing clkbuf-sel and itap-del-sel values also as per datasheet [0]. Move clkbuf-sel and ti,trm-icp above the otap-del-sel properties so the sdhci nodes could be more uniform across platforms. [0] https://www.ti.com/lit/ds/symlink/am6548.pdf Fixes: eac99d38f861 ("arm64: dts: ti: k3-am654-main: Update otap-del-sel values") Fixes: d7600d070fb0 ("arm64: dts: ti: k3-am65-main: Add support for sdhci1") Signed-off-by: Judith Mendez <jm@ti.com> Link: https://lore.kernel.org/r/20240423151732.3541894-2-jm@ti.com Signed-off-by: Nishanth Menon <nm@ti.com>
2024-04-29arm64: dts: ti: Enable overlays for the am625-phyboard-lyraNathan Morrisson
Add symbols when building the am625-phyboard-lyra-rdk DTB so overlays can be applied. Fixes: d8280f30a9cd ("arm64: dts: ti: am62-phyboard-lyra: Add overlay to enable a GPIO fan") Signed-off-by: Nathan Morrisson <nmorrisson@phytec.com> Reviewed-by: Wadim Egorov <w.egorov@phytec.de> Link: https://lore.kernel.org/r/20240419193552.3090343-1-nmorrisson@phytec.com Signed-off-by: Nishanth Menon <nm@ti.com>
2024-04-29arm64: dts: ti: am64-phyboard-electra: Add overlay to enable a GPIO fanNathan Morrisson
The phyBOARD-Electra has a GPIO fan header. This overlay enables the fan header and sets the fan to turn on at 65C. Signed-off-by: Nathan Morrisson <nmorrisson@phytec.com> Reviewed-by: Wadim Egorov <w.egorov@phytec.de> Link: https://lore.kernel.org/r/20240419193114.3090084-1-nmorrisson@phytec.com Signed-off-by: Nishanth Menon <nm@ti.com>
generated by cgit (git 2.34.1) at 2025-09-14 08:33:24 +0000