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2020-05-16arm64: dts: mt2712: use non-empty ranges for usb-phyChunfeng Yun
Use non-empty ranges for usb-phy to make the layout of its registers clearer; Replace deprecated compatible by generic Signed-off-by: Chunfeng Yun <chunfeng.yun@mediatek.com> Signed-off-by: Matthias Brugger <matthias.bgg@gmail.com>
2020-05-16arm64: dts: mt8173: fix mdp aliases property nameHsin-Yi Wang
Fix warning: Warning (alias_paths): /aliases: aliases property name must include only lowercase and '-' Signed-off-by: Hsin-Yi Wang <hsinyi@chromium.org> Reviewed-by: Chun-Kuang Hu <chunkuang.hu@kernel.org> Link: https://lore.kernel.org/r/20200414030815.192104-1-hsinyi@chromium.org Signed-off-by: Matthias Brugger <matthias.bgg@gmail.com>
2020-05-16arm64: dts: mediatek: Switch to SPDX license identifier for MT6797 SoCManivannan Sadhasivam
Switch to SPDX license identifier for MT6797 SoC. Signed-off-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org> Link: https://lore.kernel.org/r/20200222162444.11590-5-manivannan.sadhasivam@linaro.org Signed-off-by: Matthias Brugger <matthias.bgg@gmail.com>
2020-05-16arm64: dts: mediatek: Enable I2C support for 96Boards X20 Development boardManivannan Sadhasivam
There are 7 I2C ports used on this board. Hence, enable all of them. Signed-off-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org> Link: https://lore.kernel.org/r/20200222162444.11590-4-manivannan.sadhasivam@linaro.org Signed-off-by: Matthias Brugger <matthias.bgg@gmail.com>
2020-05-16arm64: dts: mediatek: Add I2C support for MT6797 SoCManivannan Sadhasivam
Add I2C support for Mediatek MT6797 SoC. There are a total of 8 I2C controllers in this SoC (2 being shared) and they are same as the controllers present in MT6577 SoC. Hence, the driver support is added with DT fallback method. As per the datasheet, there are controllers with _imm prefix like i2c2_imm and i2c3_imm. These appears to be in different memory regions but sharing the same pins with i2c2 and i2c3 respectively. Since there is no clear evidence of what they really are, I've adapted the numbering/naming scheme from the downstream code by Mediatek. Signed-off-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org> Link: https://lore.kernel.org/r/20200222162444.11590-3-manivannan.sadhasivam@linaro.org Signed-off-by: Matthias Brugger <matthias.bgg@gmail.com>
2020-05-16dt-bindings: i2c: Document I2C controller binding for MT6797 SoCManivannan Sadhasivam
I2C controller driver for MT6577 SoC is reused for MT6797 SoC. Hence, document that in DT binding. Signed-off-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org> Acked-by: Rob Herring <robh@kernel.org> Acked-by: Wolfram Sang <wsa@kernel.org> Link: https://lore.kernel.org/r/20200222162444.11590-2-manivannan.sadhasivam@linaro.org Signed-off-by: Matthias Brugger <matthias.bgg@gmail.com>
2020-05-15arm64: dts: qcom: sc7180: Add A618 gpu dt blobSharat Masetty
This patch adds the required dt nodes and properties to enabled A618 GPU. Tested-by: Douglas Anderson <dianders@chromium.org> Reviewed-by: Douglas Anderson <dianders@chromium.org> Signed-off-by: Sharat Masetty <smasetty@codeaurora.org> Link: https://lore.kernel.org/r/1588329036-18732-1-git-send-email-smasetty@codeaurora.org Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
2020-05-15dt-bindings: arm-smmu: Add sc7180 compatible stringSharat Masetty
This patch simply adds a new compatible string for SC7180 platform. Reviewed-by: Douglas Anderson <dianders@chromium.org> Signed-off-by: Sharat Masetty <smasetty@codeaurora.org> Link: https://lore.kernel.org/r/1588329036-18732-2-git-send-email-smasetty@codeaurora.org Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
2020-05-15ARM: dts: at91: Configure I2C SCL gpio as open drainCodrin Ciubotariu
The SCL gpio pin used by I2C bus for recovery needs to be configured as open drain. Fixes: 455fec938bbb ("ARM: dts: at91: sama5d2: add i2c gpio pinctrl") Fixes: a4bd8da893a3 ("ARM: dts: at91: sama5d3: add i2c gpio pinctrl") Fixes: 8fb82f050cf6 ("ARM: dts: at91: sama5d4: add i2c gpio pinctrl") Signed-off-by: Codrin Ciubotariu <codrin.ciubotariu@microchip.com> Link: https://lore.kernel.org/r/20200515140001.287932-1-codrin.ciubotariu@microchip.com Signed-off-by: Alexandre Belloni <alexandre.belloni@bootlin.com>
2020-05-15arm64: dts: mt8173: fix cooling device rangeMichael Kao
When thermal reaches target temperature,it would be pinned to state 0 (max frequency and power). Fix the throttling range to no limit. Signed-off-by: Hsin-Yi Wang <hsinyi@chromium.org> Signed-off-by: Michael Kao <michael.kao@mediatek.com> Link: https://lore.kernel.org/r/20200424082340.4127-1-michael.kao@mediatek.com Signed-off-by: Matthias Brugger <matthias.bgg@gmail.com>
2020-05-15ARM: dts: at91: sama5d2_xplained: Describe the flx0 I2C functionTudor Ambarus
Users can choose which flexcom function to use. Describe the I2C Flexcom0 function. Add alias for the i2c2 node in order to not rely on probe order for the i2c device numbering. The sama5d2 SoC has two dedicated i2c buses and five flexcoms that can function as i2c. The i2c0 and i2c1 aliases are kept for the dedicated i2c buses, the i2c flexcom functions can be numbered in order starting from i2c2. Signed-off-by: Tudor Ambarus <tudor.ambarus@microchip.com> Link: https://lore.kernel.org/r/20200514050301.147442-16-tudor.ambarus@microchip.com Signed-off-by: Alexandre Belloni <alexandre.belloni@bootlin.com>
2020-05-15ARM: dts: at91: sama5d2_ptc_ek: Add comments to describe the aliasesTudor Ambarus
Indicate which i2c alias is for which connector on the board. Specify that serial0 is for DBGU. This eases tester's life. Signed-off-by: Tudor Ambarus <tudor.ambarus@microchip.com> Link: https://lore.kernel.org/r/20200514050301.147442-17-tudor.ambarus@microchip.com Signed-off-by: Alexandre Belloni <alexandre.belloni@bootlin.com>
2020-05-15ARM: dts: at91: sama5d2_xplained: Add alias for DBGUTudor Ambarus
The aliases should be defined in the board dts rather than in the SoC dtsi. Don't rely on the aliases defined in the SoC dtsi and define the alias for the Serial DBGU in the board dts file. sama5d2 boards use the "serial0" alias for the Serial DBGU, do the same for sama5d2_xplained. Signed-off-by: Tudor Ambarus <tudor.ambarus@microchip.com> Link: https://lore.kernel.org/r/20200514050301.147442-15-tudor.ambarus@microchip.com Signed-off-by: Alexandre Belloni <alexandre.belloni@bootlin.com>
2020-05-15ARM: dts: at91: sama5d2: Add missing flexcom definitionsTudor Ambarus
Describe all the flexcom functions for all the flexcom nodes. Signed-off-by: Tudor Ambarus <tudor.ambarus@microchip.com> Link: https://lore.kernel.org/r/20200514050301.147442-13-tudor.ambarus@microchip.com Signed-off-by: Alexandre Belloni <alexandre.belloni@bootlin.com>
2020-05-15ARM: dts: at91: sama5d2: Remove i2s and tcb aliases from SoC dtsiTudor Ambarus
Device aliases are board-specific, if needed one should define them in board dts rather than in the SoC dtsi. If an alias from the SoC dtsi is addressed by a driver that does not use any of the of_alias*() methods, we can drop it. This is the case for the i2s aliases, drop them. tcb aliases point to nodes that are not enabled in any of the sama5d2 based platforms. atmel_tclib.c is scheduled to go away, any board using that alias is already broken, so get rid of the tcb aliases too. Signed-off-by: Tudor Ambarus <tudor.ambarus@microchip.com> Link: https://lore.kernel.org/r/20200514050301.147442-14-tudor.ambarus@microchip.com Signed-off-by: Alexandre Belloni <alexandre.belloni@bootlin.com>
2020-05-15ARM: dts: at91: sama5d2: Add DMA bindings for the SPI and I2C flx0 functionsTudor Ambarus
Spare boards of duplicating the DMA bindings. Describe the flx0 DMA bindings in the SoC dtsi. Users that don't want to use DMA for their flexcom functions have to overwrite the flexcom DMA bindings in their board device tree. Signed-off-by: Tudor Ambarus <tudor.ambarus@microchip.com> Link: https://lore.kernel.org/r/20200514050301.147442-12-tudor.ambarus@microchip.com Signed-off-by: Alexandre Belloni <alexandre.belloni@bootlin.com>
2020-05-15ARM: dts: at91: sama5d2: Add DMA bindings for the flx1 I2C functionTudor Ambarus
Spare boards of duplicating the DMA bindings. Describe the flx1 DMA bindings in the SoC dtsi. Users that don't want to use DMA for their flexcom functions have to overwrite the flexcom DMA bindings in their board device tree. Signed-off-by: Tudor Ambarus <tudor.ambarus@microchip.com> Link: https://lore.kernel.org/r/20200514050301.147442-11-tudor.ambarus@microchip.com Signed-off-by: Alexandre Belloni <alexandre.belloni@bootlin.com>
2020-05-15ARM: dts: at91: sama5d2: Add DMA bindings for the flx3 SPI functionTudor Ambarus
Spare boards of duplicating the DMA bindings. Describe the flx3 DMA bindings in the SoC dtsi. Users that don't want to use DMA for their flexcom functions have to overwrite the flexcom DMA bindings in their board device tree. Signed-off-by: Tudor Ambarus <tudor.ambarus@microchip.com> Link: https://lore.kernel.org/r/20200514050301.147442-10-tudor.ambarus@microchip.com Signed-off-by: Alexandre Belloni <alexandre.belloni@bootlin.com>
2020-05-15ARM: dts: at91: sama5d2: Add DMA bindings for the SPI and UART flx4 functionsTudor Ambarus
Spare boards of duplicating the DMA bindings. Describe the flx4 DMA bindings in the SoC dtsi. Users that don't want to use DMA for their flexcom functions have to overwrite the flexcom DMA bindings in their board device tree. Signed-off-by: Tudor Ambarus <tudor.ambarus@microchip.com> Link: https://lore.kernel.org/r/20200514050301.147442-9-tudor.ambarus@microchip.com Signed-off-by: Alexandre Belloni <alexandre.belloni@bootlin.com>
2020-05-15ARM: dts: at91: sama5d2: Specify the FIFO size for the Flexcom UARTTudor Ambarus
The UART submodule in Flexcom has 32-byte Transmit and Receive FIFOs. Tested uart7 on sama5d2-icp, which has both DMA and FIFO enabled. Signed-off-by: Tudor Ambarus <tudor.ambarus@microchip.com> Link: https://lore.kernel.org/r/20200514050301.147442-8-tudor.ambarus@microchip.com Signed-off-by: Alexandre Belloni <alexandre.belloni@bootlin.com>
2020-05-15ARM: dts: at91: sama5d2: Move flx0 definitions in the SoC dtsiTudor Ambarus
The Flexcom IP is part of the sama5d2 SoC. Move the flx0 node together with its function definitions in sama5d2.dtsi. Boards will just fill the pins and enable the desired functions. There is a single functional change in this patch. With the move of the flx0 uart5 definition in the SoC dtsi, the uart5 from at91-sama5d27_wlsom1_ek.dts inherits the following optional property: atmel,fifo-size = <32>; This particular change was tested by Codrin. Signed-off-by: Tudor Ambarus <tudor.ambarus@microchip.com> Tested-by: Codrin Ciubotariu <codrin.ciubotariu@microchip.com> Link: https://lore.kernel.org/r/20200514050301.147442-7-tudor.ambarus@microchip.com Signed-off-by: Alexandre Belloni <alexandre.belloni@bootlin.com>
2020-05-15ARM: dts: at91: sama5d2: Move flx1 definitions in the SoC dtsiTudor Ambarus
The Flexcom IP is part of the sama5d2 SoC. Move the flx0 node together with its function definitions in sama5d2.dtsi. Boards will just fill the pins and enable the desired functions. Signed-off-by: Tudor Ambarus <tudor.ambarus@microchip.com> Link: https://lore.kernel.org/r/20200514050301.147442-6-tudor.ambarus@microchip.com Signed-off-by: Alexandre Belloni <alexandre.belloni@bootlin.com>
2020-05-15ARM: dts: at91: sama5d2: Move flx2 definitions in the SoC dtsiTudor Ambarus
The Flexcom IP is part of the sama5d2 SoC. Move the flx2 node together with its function definitions in sama5d2.dtsi. Boards will just fill the pins and enable the desired functions. Signed-off-by: Tudor Ambarus <tudor.ambarus@microchip.com> Link: https://lore.kernel.org/r/20200514050301.147442-5-tudor.ambarus@microchip.com Signed-off-by: Alexandre Belloni <alexandre.belloni@bootlin.com>
2020-05-15ARM: dts: at91: sama5d2: Move flx3 definitions in the SoC dtsiTudor Ambarus
The Flexcom IP is part of the sama5d2 SoC. Move the flx3 node together with its function definitions in sama5d2.dtsi. Boards will just fill the pins and enable the desired functions. Signed-off-by: Tudor Ambarus <tudor.ambarus@microchip.com> Link: https://lore.kernel.org/r/20200514050301.147442-4-tudor.ambarus@microchip.com Signed-off-by: Alexandre Belloni <alexandre.belloni@bootlin.com>
2020-05-15ARM: dts: at91: sama5d2: Move flx4 definitions in the SoC dtsiTudor Ambarus
The Flexcom IP is part of the sama5d2 SoC. Move the flx0 node together with its function definitions in sama5d2.dtsi. Boards will just fill the pins and enable the desired functions. Signed-off-by: Tudor Ambarus <tudor.ambarus@microchip.com> Link: https://lore.kernel.org/r/20200514050301.147442-3-tudor.ambarus@microchip.com Signed-off-by: Alexandre Belloni <alexandre.belloni@bootlin.com>
2020-05-15ARM: dts: at91: sama5d2: Fix the label numbering for flexcom functionsTudor Ambarus
The sama5d2 SoC has the following IPs: [uart0, uart4], {spi0, spi1}, {i2c0, i2c1}. Label the flexcom functions in order: flx0: uart5, spi2, i2c2 flx1: uart6, spi3, i2c3 flx2: uart7, spi4, i2c4 flx3: uart8, spi5, i2c5 flx4: uart9, spi6, i2c6 Some boards respected this scheme, others not. Fix the ones that didn't. Signed-off-by: Tudor Ambarus <tudor.ambarus@microchip.com> Link: https://lore.kernel.org/r/20200514050301.147442-2-tudor.ambarus@microchip.com Signed-off-by: Alexandre Belloni <alexandre.belloni@bootlin.com>
2020-05-15dt-bindings: arm: renesas: Document iW-RainboW-G21D-Qseven-RZG1H boardLad Prabhakar
Document the iW-RainboW-G21D-Qseven-RZG1H device tree bindings, listing it as a supported board. Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com> Reviewed-by: Marian-Cristian Rotariu <marian-cristian.rotariu.rb@bp.renesas.com> Acked-by: Rob Herring <robh@kernel.org> Link: https://lore.kernel.org/r/1588542414-14826-9-git-send-email-prabhakar.mahadev-lad.rj@bp.renesas.com Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
2020-05-15dt-bindings: arm: renesas: Document iW-RainboW-G21M-Qseven-RZG1H SoMLad Prabhakar
Document the iW-RainboW-G21M-Qseven-RZG1H device tree bindings, listing it as a supported system on module. Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com> Reviewed-by: Marian-Cristian Rotariu <marian-cristian.rotariu.rb@bp.renesas.com> Acked-by: Rob Herring <robh@kernel.org> Link: https://lore.kernel.org/r/1588542414-14826-8-git-send-email-prabhakar.mahadev-lad.rj@bp.renesas.com Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
2020-05-15arm64: dts: allwinner: h6: Add IOMMUMaxime Ripard
Now that we have a driver for the IOMMU, let's start using it. Signed-off-by: Maxime Ripard <maxime@cerno.tech>
2020-05-14arm64: dts: qcom: msm8996: Make GPU node control GPU_GX GDSCBjorn Andersson
Presumably the GPU node needs to control both the GPU and GPU GX power domains, but given that GPU GX now depends on the GPU GDSC both can effectively be controlled by controlling GPU GX. So use this instead. Reviewed-by: Vinod Koul <vkoul@kernel.org> Link: https://lore.kernel.org/r/20200417070044.1376212-5-bjorn.andersson@linaro.org Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
2020-05-14arm64: dts: qcom: db820c: Add vdd_gfx and tie it into mmccRajendra Nayak
Add the SPMI regulator node in the PMI8994, use it to give us VDD_GX at a fixed max nominal voltage for the db820c and specify this as supply for the MMSS GPU_GX GDSC. With the introduction of CPR support the range for VDD_GX should be expanded. Reviewed-by: Vinod Koul <vkoul@kernel.org> Signed-off-by: Rajendra Nayak <rnayak@codeaurora.org> Link: https://lore.kernel.org/r/20200417070044.1376212-4-bjorn.andersson@linaro.org [bjorn: Split between pmi8994 and db820c, changed voltage, rewrote commit message] Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
2020-05-14arm64: dts: qcom: apq8016-sbc: merge -pins.dtsi into main .dtsiStephan Gerhold
apq8016-sbc.dtsi is the only remaining device which takes up 4 files since it has its pinctrl split into separate files. Actually this does not really make the device tree easier to read (just harder to find nodes). For db820c the files were merged in commit 88264f1f6bf5 ("arm64: dts: qcom: db820c: Remove pin specific files"). Do the same for apq8016-sbc (db410c) and move the pinctrl definitions into apq8016-sbc.dtsi. Signed-off-by: Stephan Gerhold <stephan@gerhold.net> Link: https://lore.kernel.org/r/20200514112754.148919-3-stephan@gerhold.net Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
2020-05-14arm64: dts: qcom: msm8916: move gpu opp table to gpu nodeStephan Gerhold
In msm8916.dtsi the GPU OPP table is defined under the root node, whereas in msm8996.dtsi/sdm845.dtsi it is a subnode of the gpu device (which makes it easier to find). Move it to the gpu device node to make this consistent. Signed-off-by: Stephan Gerhold <stephan@gerhold.net> Link: https://lore.kernel.org/r/20200514112754.148919-2-stephan@gerhold.net Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
2020-05-14arm64: dts: qcom: msm8916: avoid using _ in node namesStephan Gerhold
Many nodes in the MSM8916 device trees use '_' in node names (especially pinctrl), even though (seemingly) '-' is preferred now. Make this more consistent by replacing '_' with '-' where possible. Similar naming is used for pinctrl in newer device trees (e.g. sdm845.dtsi). Signed-off-by: Stephan Gerhold <stephan@gerhold.net> Link: https://lore.kernel.org/r/20200514112754.148919-1-stephan@gerhold.net Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
2020-05-14arm64: dts: qcom: c630: Specify UFS device resetBjorn Andersson
On some device the reset line for the UFS memory needs to be tickled in order for UFS to initialize properly, add this to the ufs_mem_hc node. Reviewed-by: Robert Foss <robert.foss@linaro.org> Reviewed-by: Vinod Koul <vkoul@kernel.org> Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org> Link: https://lore.kernel.org/r/20200406060049.227029-1-bjorn.andersson@linaro.org Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
2020-05-14arm64: dts: qcom: c630: Add WiFi nodeBjorn Andersson
Specify regulators and enable the &wifi node. The firmware uses the 8 bit version of the host capability message, so specify this quirk. Reviewed-by: Robert Foss <robert.foss@linaro.org> Reviewed-by: Vinod Koul <vkoul@kernel.org> Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org> Link: https://lore.kernel.org/r/20191018055841.3729591-1-bjorn.andersson@linaro.org Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
2020-05-14arm64: dts: qcom: msm8916-samsung-a3u: add nodes for display panelMichael Srba
This patch wires up display support on Samsung Galaxy A3 2015. Signed-off-by: Michael Srba <michael.srba@seznam.cz> Link: https://lore.kernel.org/r/20200514170129.10902-1-michael.srba@seznam.cz Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
2020-05-14ARM: dts: stm32: Split Avenger96 into DHCOR SoM and Avenger96 boardMarek Vasut
The Avenger96 is in fact an assembly of DH Electronics DHCOR SoM on top of an Avenger96 reference board. The DHCOR SoM can be populated with any STM32MP15xx. Split the DTs to reflect this such that the common SoM and Avenger96 parts are now in stm32mp15xx-dhcor-*dtsi and a specific example implementation of STM32MP157A SoM and Avenger96 board is separated into stm32mp157a-dhcor-*dts* . The stm32mp157a-avenger96.dts is retained for the sake of backward naming compatibility. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Alexandre Torgue <alexandre.torgue@st.com> Cc: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org> Cc: Maxime Coquelin <mcoquelin.stm32@gmail.com> Cc: Patrice Chotard <patrice.chotard@st.com> Cc: Patrick Delaunay <patrick.delaunay@st.com> Cc: linux-stm32@st-md-mailman.stormreply.com To: linux-arm-kernel@lists.infradead.org Reviewed-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org> Signed-off-by: Alexandre Torgue <alexandre.torgue@st.com>
2020-05-14ARM: dts: stm32: Split SoC-independent parts of DHCOM SOM and PDK2Marek Vasut
The DH Electronics PDK2 can be populated with SoM with any STM32MP15xx variant. Split the SoC-independent parts of the SoM and PDK2 into the stm32mp15xx-dhcom-*.dtsi and reduce stm32mp157c-dhcom-*dts* to example of adding STM32MP157C variant of the SoM into a PDK2 carrier board. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Alexandre Torgue <alexandre.torgue@st.com> Cc: Maxime Coquelin <mcoquelin.stm32@gmail.com> Cc: Patrice Chotard <patrice.chotard@st.com> Cc: Patrick Delaunay <patrick.delaunay@st.com> Cc: linux-stm32@st-md-mailman.stormreply.com To: linux-arm-kernel@lists.infradead.org Signed-off-by: Alexandre Torgue <alexandre.torgue@st.com>
2020-05-14ARM: dts: stm32: Add GPIO LEDs for STM32MP1 DHCOM PDK2Marek Vasut
Add bindings for the four GPIO LEDs on DH PDK2 board. Note that LED5 GPIO-E may conflict with touchscreen interrupt, hence LED5 must be disabled when using the DH 560-200 display unit with touchscreen. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Alexandre Torgue <alexandre.torgue@st.com> Cc: Maxime Coquelin <mcoquelin.stm32@gmail.com> Cc: Patrice Chotard <patrice.chotard@st.com> Cc: Patrick Delaunay <patrick.delaunay@st.com> Cc: linux-stm32@st-md-mailman.stormreply.com To: linux-arm-kernel@lists.infradead.org Signed-off-by: Alexandre Torgue <alexandre.torgue@st.com>
2020-05-14ARM: dts: stm32: Add GPIO keys for STM32MP1 DHCOM PDK2Marek Vasut
Add bindings for the four GPIO keys on DH PDK2 board. Note that TA1 key is polled because it's IRQ line conflicts with ethernet IRQ, the rest of the GPIO keys, TA2, TA3, TA4, are interrupt-driven and wake up sources. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Alexandre Torgue <alexandre.torgue@st.com> Cc: Maxime Coquelin <mcoquelin.stm32@gmail.com> Cc: Patrice Chotard <patrice.chotard@st.com> Cc: Patrick Delaunay <patrick.delaunay@st.com> Cc: linux-stm32@st-md-mailman.stormreply.com To: linux-arm-kernel@lists.infradead.org Signed-off-by: Alexandre Torgue <alexandre.torgue@st.com>
2020-05-14arm64: dts: qcom: db820c: Fix invalid pm8994 suppliesBjorn Andersson
It's uncertain where the "vreg_s8a_l3a_input" comes from, but the supply for VDD_L3_L11 on PM8994 should be VREG_S3A_1P3, so correct this - and drop the vreg_s8a_l3a_input. Reviewed-by: Vinod Koul <vkoul@kernel.org> Fixes: 83d9ed4342a3 ("arm64: dts: qcom: db820c: Use regulator names from schematics") Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org> Link: https://lore.kernel.org/r/20200417070712.1376355-1-bjorn.andersson@linaro.org Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
2020-05-14arm64: dts: qcom: db820c: Add pmi8994 RPM regulatorsBjorn Andersson
The PMI8994 provides 3 SPMS regulators and one boost/bypass regulator. Define s1 and the boot/bypass and update pm8994 to appropriately describe the supply from PMI8994. Reviewed-by: Vinod Koul <vkoul@kernel.org> Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org> Link: https://lore.kernel.org/r/20200417070303.1376290-1-bjorn.andersson@linaro.org Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
2020-05-14ARM: dts: stm32: Add IoT Box board supportManivannan Sadhasivam
IoT Box is an IoT gateway device based on Stinger96 board powered by STM32MP1 SoC, designed and manufactured by Shiratech Solutions. This device makes use of Stinger96 board by having it as a base board with one additional mezzanine on top. Following are the features exposed by this device in addition to the Stinger96 board: * WiFi/BT * CCS811 VOC sensor * 2x Digital microphones IM69D130 * 12x WS2812B LEDs Following peripherals are tested and known to work: * WiFi/BT * CCS811 More information about this device can be found in Shiratech website: https://www.shiratech-solutions.com/products/iot-box/ Signed-off-by: Manivannan Sadhasivam <mani@kernel.org> Signed-off-by: Alexandre Torgue <alexandre.torgue@st.com>
2020-05-14dt-bindings: arm: stm32: Document IoT Box compatibleManivannan Sadhasivam
Document devicetree compatible of Shiratech IoT Box. Signed-off-by: Manivannan Sadhasivam <mani@kernel.org> Acked-by: Rob Herring <robh@kernel.org> Signed-off-by: Alexandre Torgue <alexandre.torgue@st.com>
2020-05-14ARM: dts: stm32: Add Stinger96 board supportManivannan Sadhasivam
Stinger96 is a 96Boards IoT Extended edition board designed and manufactured by Shiratech solutions based on STM32MP1 SoC. Following are the features of this board: * 256MB DDR * 125MB NAND Flash * Onboard BG96 modem * 1x uSD * 2x USB (1 available as external connector and another connected to BG96) * 1x SPI * 1x PCM * 2x UART (apart from serial console) * 2x I2C (apart from one connected to PMIC) Following peripherals are tested and known to work: * BG96 modem * 1x I2C (LS-I2C0) * 1x SPI * 1x UART (LS-UART0) * USB (Only Gadget mode) * uSD More information about this board can be found in Shiratech website: https://www.shiratech-solutions.com/products/stinger96/ Signed-off-by: Manivannan Sadhasivam <mani@kernel.org> Signed-off-by: Alexandre Torgue <alexandre.torgue@st.com>
2020-05-14dt-bindings: arm: stm32: Document Stinger96 compatibleManivannan Sadhasivam
Document devicetree compatible of Shiratech Stinger96 board. Signed-off-by: Manivannan Sadhasivam <mani@kernel.org> Acked-by: Rob Herring <robh@kernel.org> Signed-off-by: Alexandre Torgue <alexandre.torgue@st.com>
2020-05-14ARM: dts: stm32: Add missing pinctrl entries for STM32MP15Manivannan Sadhasivam
These pinctrl definitions will be used by Stinger96/IoTBox boards from Shiratech. Signed-off-by: Manivannan Sadhasivam <mani@kernel.org> Signed-off-by: Alexandre Torgue <alexandre.torgue@st.com>
2020-05-14dt-bindings: Add vendor prefix for Shiratech SolutionsManivannan Sadhasivam
This commit adds devicetree vendor prefix for Shiratech solutions, a SOM/embedded board manufacturing company. https://www.shiratech-solutions.com/ Signed-off-by: Manivannan Sadhasivam <mani@kernel.org> Acked-by: Rob Herring <robh@kernel.org> Signed-off-by: Alexandre Torgue <alexandre.torgue@st.com>
2020-05-13arm64: dts: qcom: msm8916: Disable coresight by defaultMichael Srba
On some msm8916 devices, attempts at initializing coresight cause the boot to fail. This was fixed by disabling the coresight-related nodes in the board dts files. However, a cleaner approach was chosen for fixing the same issue on msm8998: disabling coresight by default, and enabling it in board dts files where desired. This patch implements the same solution for msm8916, removes now redundant overwrites in board specific dts files and and enables coresight in db410c's board dts in order to keep the current behavior. Fixes: b1fcc5702a41 ("arm64: dts: qcom: msm8916: Add CTI options") Signed-off-by: Michael Srba <michael.srba@seznam.cz> Reviewed-by: Jeffrey Hugo <jeffrey.l.hugo@gmail.com> Link: https://lore.kernel.org/r/20200513184735.30104-1-michael.srba@seznam.cz Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
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