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2014-10-31Input: altera_ps2 - use correct type for irq return valueTobias Klauser
The irq function altera_ps2_rxint returns an irqreturn_t, so use the same type for variable storing the return value. Signed-off-by: Tobias Klauser <tklauser@distanz.ch> Signed-off-by: Dmitry Torokhov <dmitry.torokhov@gmail.com>
2014-10-31Input: altera_ps2 - write to correct register when disabling interruptsTobias Klauser
In altera_ps2_close, the data register (offset 0) is written instead of the control register (offset 4), leading to the RX interrupt not being disabled. Fix this by calling writel() with the offset for the proper register. Signed-off-by: Tobias Klauser <tklauser@distanz.ch> Signed-off-by: Dmitry Torokhov <dmitry.torokhov@gmail.com>
2014-10-31Input: max77693-haptic - fix potential overflowDmitry Torokhov
Expression haptic->pwm_dev->period * haptic->magnitude is of type 'unsigned int' and may overflow. We need to convert one of the operands to u64 before multiplying, instead of casting result (potentially overflown) to u64. Reported by Coverity: CID 1248753 Acked-by : Jaewon Kim <jaewon02.kim@samsung.com> Reviewed-by: Chanwoo Choi <cw00.choi@samsung.com> Signed-off-by: Dmitry Torokhov <dmitry.torokhov@gmail.com>
2014-10-31Merge git://git.kernel.org/pub/scm/linux/kernel/git/pablo/nfDavid S. Miller
Pablo Neira Ayuso says: ==================== netfilter/ipvs fixes for net The following patchset contains fixes for netfilter/ipvs. This round of fixes is larger than usual at this stage, specifically because of the nf_tables bridge reject fixes that I would like to see in 3.18. The patches are: 1) Fix a null-pointer dereference that may occur when logging errors. This problem was introduced by 4a4739d56b0 ("ipvs: Pull out crosses_local_route_boundary logic") in v3.17-rc5. 2) Update hook mask in nft_reject_bridge so we can also filter out packets from there. This fixes 36d2af5 ("netfilter: nf_tables: allow to filter from prerouting and postrouting"), which needs this chunk to work. 3) Two patches to refactor common code to forge the IPv4 and IPv6 reject packets from the bridge. These are required by the nf_tables reject bridge fix. 4) Fix nft_reject_bridge by avoiding the use of the IP stack to reject packets from the bridge. The idea is to forge the reject packets and inject them to the original port via br_deliver() which is now exported for that purpose. 5) Restrict nft_reject_bridge to bridge prerouting and input hooks. the original skbuff may cloned after prerouting when the bridge stack needs to flood it to several bridge ports, it is too late to reject the traffic. ==================== Signed-off-by: David S. Miller <davem@davemloft.net>
2014-10-31block: Fix computation of merged request priorityJan Kara
Priority of a merged request is computed by ioprio_best(). If one of the requests has undefined priority (IOPRIO_CLASS_NONE) and another request has priority from IOPRIO_CLASS_BE, the function will return the undefined priority which is wrong. Fix the function to properly return priority of a request with the defined priority. Fixes: d58cdfb89ce0c6bd5f81ae931a984ef298dbda20 CC: stable@vger.kernel.org Signed-off-by: Jan Kara <jack@suse.cz> Reviewed-by: Jeff Moyer <jmoyer@redhat.com> Signed-off-by: Jens Axboe <axboe@fb.com>
2014-10-31regulator: max77686: Add suspend disable for some LDOsKrzysztof Kozlowski
Some LDOs of Maxim 77686 PMIC support disabling during system suspend (LDO{2,6,7,8,10,11,12,14,15,16}). This was already implemented as part of set_suspend_mode function. In that case the mode was one of: - disable, - normal mode, - low power mode. However there are no bindings for setting the mode during suspend. Add suspend disable for LDO regulators supporting this. Re-use existing max77686_buck_set_suspend_disable() function. This helps reducing energy consumption during system sleep. Signed-off-by: Krzysztof Kozlowski <k.kozlowski@samsung.com> Reviewed-by: Javier Martinez Canillas <javier.martinez@collabora.co.uk> Signed-off-by: Mark Brown <broonie@kernel.org>
2014-10-31regulator: max77802: Remove suspend_enableKrzysztof Kozlowski
The Maxim 77802 PMIC regulators do not have special enable configuration for suspend. The driver instead enabled them manually which is not a best way to deal with suspend. Signed-off-by: Krzysztof Kozlowski <k.kozlowski@samsung.com> Acked-by: Javier Martinez Canillas <javier.martinez@collabora.co.uk> Signed-off-by: Mark Brown <broonie@kernel.org>
2014-10-31reset: sti: Document sti-picophyreset controllers bindings.Peter Griffin
Add DT bindings documentation for sti-picophyreset controller. Signed-off-by: Peter Griffin <peter.griffin@linaro.org> Acked-by: Lee Jones <lee.jones@linaro.org> Signed-off-by: Maxime Coquelin <maxime.coquelin@st.com>
2014-10-31reset: stih407: Add softreset, powerdown and picophy controllersPeter Griffin
This patch adds softreset, powerdown and picophy reset controllers for the STiH407 SoC. With this patch three new devices are registered: - 1. st,stih407-powerdown 2. st,stih407-softreset 3. st,stih407-picophyreset All three devices use system configuration registers mapped via regmap to perform the reset or powerdown. The powerdown controller also has an acknowledgement. A separate picophy reset controller manages the different reset channels within the picophy, which have a different polarity to the other system softresets. Managing these different picophy softreset channels is necessary to correctly handle resuming from suspend when USB2 devices are plugged into the USB3 port. Signed-off-by: Giuseppe Cavallaro <peppe.cavallaro@st.com> Signed-off-by: Peter Griffin <peter.griffin@linaro.org> Acked-by: Lee Jones <lee.jones@linaro.org> Signed-off-by: Maxime Coquelin <maxime.coquelin@st.com>
2014-10-31netfilter: nft_reject_bridge: restrict reject to prerouting and inputPablo Neira Ayuso
Restrict the reject expression to the prerouting and input bridge hooks. If we allow this to be used from forward or any other later bridge hook, if the frame is flooded to several ports, we'll end up sending several reject packets, one per cloned packet. Signed-off-by: Pablo Neira Ayuso <pablo@netfilter.org>
2014-10-31netfilter: nft_reject_bridge: don't use IP stack to reject trafficPablo Neira Ayuso
If the packet is received via the bridge stack, this cannot reject packets from the IP stack. This adds functions to build the reject packet and send it from the bridge stack. Comments and assumptions on this patch: 1) Validate the IPv4 and IPv6 headers before further processing, given that the packet comes from the bridge stack, we cannot assume they are clean. Truncated packets are dropped, we follow similar approach in the existing iptables match/target extensions that need to inspect layer 4 headers that is not available. This also includes packets that are directed to multicast and broadcast ethernet addresses. 2) br_deliver() is exported to inject the reject packet via bridge localout -> postrouting. So the approach is similar to what we already do in the iptables reject target. The reject packet is sent to the bridge port from which we have received the original packet. 3) The reject packet is forged based on the original packet. The TTL is set based on sysctl_ip_default_ttl for IPv4 and per-net ipv6.devconf_all hoplimit for IPv6. Signed-off-by: Pablo Neira Ayuso <pablo@netfilter.org>
2014-10-31netfilter: nf_reject_ipv6: split nf_send_reset6() in smaller functionsPablo Neira Ayuso
That can be reused by the reject bridge expression to build the reject packet. The new functions are: * nf_reject_ip6_tcphdr_get(): to sanitize and to obtain the TCP header. * nf_reject_ip6hdr_put(): to build the IPv6 header. * nf_reject_ip6_tcphdr_put(): to build the TCP header. Signed-off-by: Pablo Neira Ayuso <pablo@netfilter.org>
2014-10-31netfilter: nf_reject_ipv4: split nf_send_reset() in smaller functionsPablo Neira Ayuso
That can be reused by the reject bridge expression to build the reject packet. The new functions are: * nf_reject_ip_tcphdr_get(): to sanitize and to obtain the TCP header. * nf_reject_iphdr_put(): to build the IPv4 header. * nf_reject_ip_tcphdr_put(): to build the TCP header. Signed-off-by: Pablo Neira Ayuso <pablo@netfilter.org>
2014-10-31netfilter: nf_tables_bridge: update hook_mask to allow {pre,post}routingPablo Neira Ayuso
Fixes: 36d2af5 ("netfilter: nf_tables: allow to filter from prerouting and postrouting") Signed-off-by: Pablo Neira Ayuso <pablo@netfilter.org>
2014-10-31ARM: STi: DT: STiH407: Fix: clk-tmds-hdmi clock is missingGabriel FERNANDEZ
Signed-off-by: Gabriel Fernandez <gabriel.fernandez@linaro.org> Signed-off-by: Maxime Coquelin <maxime.coquelin@st.com>
2014-10-31ARM: STi: DT: STiH407: Add all defines for STiH407 DT clocksGabriel FERNANDEZ
This patch adds all clock defines for clockgen C0,D0,D2 and D3 Signed-off-by: Gabriel Fernandez <gabriel.fernandez@linaro.org> Signed-off-by: Maxime Coquelin <maxime.coquelin@st.com>
2014-10-31Return short read or 0 at end of a raw device, not EIODavid Jeffery
Author: David Jeffery <djeffery@redhat.com> Changes to the basic direct I/O code have broken the raw driver when reading to the end of a raw device. Instead of returning a short read for a read that extends partially beyond the device's end or 0 when at the end of the device, these reads now return EIO. The raw driver needs the same end of device handling as was added for normal block devices. Using blkdev_read_iter, which has the needed size checks, prevents the EIO conditions at the end of the device. Signed-off-by: David Jeffery <djeffery@redhat.com> Signed-off-by: Al Viro <viro@zeniv.linux.org.uk>
2014-10-31isofs: don't bother with ->d_op for normal caseAl Viro
we only need it for joliet and case-insensitive mounts Signed-off-by: Al Viro <viro@zeniv.linux.org.uk>
2014-10-31ARM: STi: DT: STiH407: 407 DT Entry for clockgenA9Gabriel FERNANDEZ
Patch adds DT entries for clockgen A9 Signed-off-by: Gabriel Fernandez <gabriel.fernandez@linaro.org> Signed-off-by: Olivier Bideau <olivier.bideau@st.com> Signed-off-by: Maxime Coquelin <maxime.coquelin@st.com>
2014-10-31ARM: STi: DT: STiH407: 407 DT Entry for clockgen D0/D2/D3Gabriel FERNANDEZ
Patch adds DT entries for clockgen D0/D2/D3 Signed-off-by: Gabriel Fernandez <gabriel.fernandez@linaro.org> Signed-off-by: Olivier Bideau <olivier.bideau@st.com> Signed-off-by: Maxime Coquelin <maxime.coquelin@st.com>
2014-10-31ARM: STi: DT: STiH407: 407 DT Entry for clockgen C0Gabriel FERNANDEZ
Patch adds DT entries for clockgen C0 Signed-off-by: Gabriel Fernandez <gabriel.fernandez@linaro.org> Signed-off-by: Olivier Bideau <olivier.bideau@st.com> Signed-off-by: Maxime Coquelin <maxime.coquelin@st.com>
2014-10-31ARM: STi: DT: STiH407: 407 DT Entry for clockgen A0Gabriel FERNANDEZ
Patch adds DT entries for clockgen A0 Signed-off-by: Gabriel Fernandez <gabriel.fernandez@linaro.org> Signed-off-by: Olivier Bideau <olivier.bideau@st.com> Signed-off-by: Maxime Coquelin <maxime.coquelin@st.com>
2014-10-31ARM: DT: STi: STiH416: Add DT node for ST's SATA deviceLee Jones
ARM: DT: STi: STiH416: Add DT node for ST's SATA device Cc: devicetree@vger.kernel.org Acked-by: Alexandre Torgue <alexandre.torgue@st.com> Signed-off-by: Lee Jones <lee.jones@linaro.org> Signed-off-by: Maxime Coquelin <maxime.coquelin@st.com>
2014-10-31ARM: DT: STi: STiH416: Add DT node for MiPHY365xLee Jones
The MiPHY365x is a Generic PHY which can serve various SATA or PCIe devices. It has 2 ports which it can use for either; both SATA, both PCIe or one of each in any configuration. Acked-by: Mark Rutland <mark.rutland@arm.com> Acked-by: Alexandre Torgue <alexandre.torgue@st.com> Signed-off-by: Lee Jones <lee.jones@linaro.org> Signed-off-by: Maxime Coquelin <maxime.coquelin@st.com>
2014-10-31ARM: STi: DT: STiH416: Supply Thermal Controller Device Tree nodesLee Jones
We supply two of these. The first is controlled by the System Configuration registers and the second one provided is a more traditional 'memory mapped' variant. Each are handled by they own sub-driver. Signed-off-by: Ajit Pal Singh <ajitpal.singh@st.com> Signed-off-by: Lee Jones <lee.jones@linaro.org> Signed-off-by: Maxime Coquelin <maxime.coquelin@st.com>
2014-10-31ARM: STi: DT: Enable second sdhci controller for stih416 b2020 boards.Peter Griffin
The second controller is only present on the stih416 SoC. Also mark this as non-removeable as its eMMC. Signed-off-by: Giuseppe Cavallaro <peppe.cavallaro@st.com> Signed-off-by: Peter Griffin <peter.griffin@linaro.org> Acked-by: Lee Jones <lee.jones@linaro.org> Acked-by: Maxime Coquelin <maxime.coquelin@st.com> Signed-off-by: Maxime Coquelin <maxime.coquelin@st.com>
2014-10-31ARM: STi: DT: Enable mmc0 for both stih415 and stih416 SoCsPeter Griffin
Because the first sdhci controller is present on both stih415 and stih416 SoC which can both populate the b2020 board, it can be enabled in the generic DT file. Signed-off-by: Giuseppe Cavallaro <peppe.cavallaro@st.com> Signed-off-by: Peter Griffin <peter.griffin@linaro.org> Acked-by: Lee Jones <lee.jones@linaro.org> Acked-by: Maxime Coquelin <maxime.coquelin@st.com> Signed-off-by: Maxime Coquelin <maxime.coquelin@st.com>
2014-10-31ARM: STi: DT: Add sdhci controller for stih415Peter Griffin
This patch adds device tree config for the sdhci controller on the stih415 SoC. Signed-off-by: Giuseppe Cavallaro <peppe.cavallaro@st.com> Signed-off-by: Peter Griffin <peter.griffin@linaro.org> Acked-by: Lee Jones <lee.jones@linaro.org> Acked-by: Maxime Coquelin <maxime.coquelin@st.com> Signed-off-by: Maxime Coquelin <maxime.coquelin@st.com>
2014-10-31ARM: STi: DT: Add sdhci pin configuration for stih415Peter Griffin
This patch adds the required pin config for the sdhci controller present in the stih415 SoC. Signed-off-by: Giuseppe Cavallaro <peppe.cavallaro@st.com> Signed-off-by: Peter Griffin <peter.griffin@linaro.org> Acked-by: Lee Jones <lee.jones@linaro.org> Acked-by: Maxime Coquelin <maxime.coquelin@st.com> Signed-off-by: Maxime Coquelin <maxime.coquelin@st.com>
2014-10-31ARM: STi: DT: Add sdhci controller for stih416Peter Griffin
This patch adds device tree config for both sdhci controllers on the stih416 SoC. Signed-off-by: Giuseppe Cavallaro <peppe.cavallaro@st.com> Signed-off-by: Peter Griffin <peter.griffin@linaro.org> Acked-by: Lee Jones <lee.jones@linaro.org> Acked-by: Maxime Coquelin <maxime.coquelin@st.com> Signed-off-by: Maxime Coquelin <maxime.coquelin@st.com>
2014-10-31ARM: STi: DT: Add sdhci pins for stih416Peter Griffin
This adds the required pin config for both SDHCI controllers on the stih416 SoC. Signed-off-by: Giuseppe Cavallaro <peppe.cavallaro@st.com> Signed-off-by: Peter Griffin <peter.griffin@linaro.org> Acked-by: Lee Jones <lee.jones@linaro.org> Acked-by: Maxime Coquelin <maxime.coquelin@st.com> Signed-off-by: Maxime Coquelin <maxime.coquelin@st.com>
2014-10-31ARM: sti: Add STiH407 reset controller support.Peter Griffin
This patch adds the reset controller DT nodes for the powerdown, softreset and picophy controllers. Signed-off-by: Peter Griffin <peter.griffin@linaro.org> Signed-off-by: Maxime Coquelin <maxime.coquelin@st.com>
2014-10-31ARM: sti: Add STiH407 Kconfig entry to select STIH407_RESETPeter Griffin
The STiH407 is a STMicroelectronics Digital Consumer electronics family, targetted at set-top-box and other audio/video applications. This patch selects the reset controller driver for this family which is essential to take various IP's on the SoC out of powerdown / reset. Signed-off-by: Peter Griffin <peter.griffin@linaro.org> Acked-by: Lee Jones <lee.jones@linaro.org> Signed-off-by: Maxime Coquelin <maxime.coquelin@st.com>
2014-10-31ARM: STi: DT: STiH41x: Convert all uppercase non-defines to lowercaseLee Jones
Suggested-by: Olof Johansson <olof@lixom.net> Signed-off-by: Lee Jones <lee.jones@linaro.org> Signed-off-by: Maxime Coquelin <maxime.coquelin@st.com>
2014-10-31drm/vmwgfx: Filter out modes those cannot be supported by the current VRAM size.Sinclair Yeh
When screen objects are enabled, the bpp is assumed to be 32, otherwise it is set to 16. v2: * Use u32 instead of u64 for assumed_bpp. * Fixed mechanism to check for screen objects * Limit the back buffer size to VRAM. Signed-off-by: Sinclair Yeh <syeh@vmware.com> Reviewed-by: Thomas Hellstrom <thellstrom@vmware.com> Cc: <stable@vger.kernel.org>
2014-10-31drm/vmwgfx: Fix hash key computationThomas Hellstrom
The hash key computation in vmw_cmdbuf_res_remove incorrectly didn't take the resource type into account, contrary to all the other related functions. This becomes important when the cmdbuf resource manager handles more than one resource type. Signed-off-by: Thomas Hellstrom <thellstrom@vmware.com> Reviewed-by: Brian Paul <brianp@vmware.com>
2014-10-31reset: stih407: Add reset controllers DT bindingsMaxime Coquelin
This patch adds softreset, powerdown and picophy reset controllers DT bindings for the STiH407 SoC. Signed-off-by: Giuseppe Cavallaro <peppe.cavallaro@st.com> Signed-off-by: Peter Griffin <peter.griffin@linaro.org> Acked-by: Lee Jones <lee.jones@linaro.org> Signed-off-by: Maxime Coquelin <maxime.coquelin@st.com>
2014-10-31drm/vmwgfx: fix lock breakageRob Clark
After: commit d059f652e73c35678d28d4cd09ab2cec89696af9 Author: Daniel Vetter <daniel.vetter@ffwll.ch> AuthorDate: Fri Jul 25 18:07:40 2014 +0200 drm: Handle legacy per-crtc locking with full acquire ctx drm_mode_cursor_common() was switched to use drm_modeset_(un)lock_crtc() which uses full aquire ctx. So dropping/reaquiring the lock via drm_modeset_(un)lock() directly isn't the right thing to do, as lockdep kindly points out. The 'FIXME's about sorting out whether vmwgfx *really* needs to lock-all for cursor updates still apply. Signed-off-by: Rob Clark <robdclark@gmail.com> Reviewed-by: Jakob Bornecrantz <jakob@vmware.com> Tested-by: Thomas Hellstrom <thellstrom@vmware.com>
2014-10-31ARM: dts: sun9i: Enable uart4 for A80 Optimus boardChen-Yu Tsai
The A80 Optimus board exposes uart4 on the GPIO expansion header. Enable it so we can use it. Also enable the internal pull-ups, as there doesn't seem to be external pull-up resistors for pins on the expansion header. Signed-off-by: Chen-Yu Tsai <wens@csie.org> Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
2014-10-31ARM: dts: sun9i: Add uart4 pinmux setting for A80 SoCChen-Yu Tsai
uart4 only has one possible pinmux setting on the A80 SoC. Signed-off-by: Chen-Yu Tsai <wens@csie.org> Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
2014-10-31ARM: dts: sun9i: Add GPIO LEDs for A80 Optimus boardChen-Yu Tsai
The A80 Optimus board has 3 usable LEDs that are controlled via GPIO. This patch adds support for 2 of them which are driver by GPIOs in the main pin controller. The remaining one uses GPIO from the R_PIO controller, which we don't support yet. Signed-off-by: Chen-Yu Tsai <wens@csie.org> Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
2014-10-31ARM: dts: sun9i: Enable i2c3 on A80 Optimus boardChen-Yu Tsai
i2c3 is exposed on the GPIO extension header. Enable it so we can use it. Also enable internal pull-ups on the pins, as they don't seem to have external pull-up resistors. Signed-off-by: Chen-Yu Tsai <wens@csie.org> Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
2014-10-31ARM: dts: sun9i: Add i2c3 pinmux setting for A80 SoCChen-Yu Tsai
i2c3 has only one possible pinmux setting on the A80 SoC. Signed-off-by: Chen-Yu Tsai <wens@csie.org> Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
2014-10-31ARM: dts: sun9i: Add i2c controller nodes to a80 dtsiChen-Yu Tsai
The A80 has 5 i2c controllers in the main processor block. Signed-off-by: Chen-Yu Tsai <wens@csie.org> Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
2014-10-31powerpc/powernv: Properly fix LPC debugfs endiannessBenjamin Herrenschmidt
Endian is hard, especially when I designed a stupid FW interface, and I should know better... oh well, this is attempt #2 at fixing this properly. This time it seems to work with all access sizes and I can run my flashing tool (which exercises all sort of access sizes and types to access the SPI controller in the BMC) just fine. Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org> CC: stable@vger.kernel.org Signed-off-by: Michael Ellerman <mpe@ellerman.id.au>
2014-10-31powerpc: do_notify_resume can be called with bad thread_info flags argumentAnton Blanchard
Back in 7230c5644188 ("powerpc: Rework lazy-interrupt handling") we added a call out to restore_interrupts() (written in c) before calling do_notify_resume: bl restore_interrupts addi r3,r1,STACK_FRAME_OVERHEAD bl do_notify_resume Unfortunately do_notify_resume takes two arguments, the second one being the thread_info flags: void do_notify_resume(struct pt_regs *regs, unsigned long thread_info_flags) We do populate r4 (the second argument) earlier, but restore_interrupts() is free to muck it up all it wants. My guess is the gcc compiler gods shone down on us and its register allocator never used r4. Sometimes, rarely, luck is on our side. LLVM on the other hand did trample r4. Signed-off-by: Anton Blanchard <anton@samba.org> Cc: stable@vger.kernel.org Signed-off-by: Michael Ellerman <mpe@ellerman.id.au>
2014-10-30drivers/net: macvtap and tun depend on INETBen Hutchings
These drivers now call ipv6_proxy_select_ident(), which is defined only if CONFIG_INET is enabled. However, they have really depended on CONFIG_INET for as long as they have allowed sending GSO packets from userland. Reported-by: kbuild test robot <fengguang.wu@intel.com> Signed-off-by: Ben Hutchings <ben@decadent.org.uk> Fixes: f43798c27684 ("tun: Allow GSO using virtio_net_hdr") Fixes: b9fb9ee07e67 ("macvtap: add GSO/csum offload support") Fixes: 5188cd44c55d ("drivers/net, ipv6: Select IPv6 fragment idents for virtio UFO packets") Signed-off-by: David S. Miller <davem@davemloft.net>
2014-10-30tracing/syscalls: Ignore numbers outside NR_syscalls' rangeRabin Vincent
ARM has some private syscalls (for example, set_tls(2)) which lie outside the range of NR_syscalls. If any of these are called while syscall tracing is being performed, out-of-bounds array access will occur in the ftrace and perf sys_{enter,exit} handlers. # trace-cmd record -e raw_syscalls:* true && trace-cmd report ... true-653 [000] 384.675777: sys_enter: NR 192 (0, 1000, 3, 4000022, ffffffff, 0) true-653 [000] 384.675812: sys_exit: NR 192 = 1995915264 true-653 [000] 384.675971: sys_enter: NR 983045 (76f74480, 76f74000, 76f74b28, 76f74480, 76f76f74, 1) true-653 [000] 384.675988: sys_exit: NR 983045 = 0 ... # trace-cmd record -e syscalls:* true [ 17.289329] Unable to handle kernel paging request at virtual address aaaaaace [ 17.289590] pgd = 9e71c000 [ 17.289696] [aaaaaace] *pgd=00000000 [ 17.289985] Internal error: Oops: 5 [#1] PREEMPT SMP ARM [ 17.290169] Modules linked in: [ 17.290391] CPU: 0 PID: 704 Comm: true Not tainted 3.18.0-rc2+ #21 [ 17.290585] task: 9f4dab00 ti: 9e710000 task.ti: 9e710000 [ 17.290747] PC is at ftrace_syscall_enter+0x48/0x1f8 [ 17.290866] LR is at syscall_trace_enter+0x124/0x184 Fix this by ignoring out-of-NR_syscalls-bounds syscall numbers. Commit cd0980fc8add "tracing: Check invalid syscall nr while tracing syscalls" added the check for less than zero, but it should have also checked for greater than NR_syscalls. Link: http://lkml.kernel.org/p/1414620418-29472-1-git-send-email-rabin@rab.in Fixes: cd0980fc8add "tracing: Check invalid syscall nr while tracing syscalls" Cc: stable@vger.kernel.org # 2.6.33+ Signed-off-by: Rabin Vincent <rabin@rab.in> Signed-off-by: Steven Rostedt <rostedt@goodmis.org>
2014-10-30Merge branch 'ufo-fix'David S. Miller
Ben Hutchings says: ==================== drivers/net,ipv6: Fix IPv6 fragment ID selection for virtio The virtio net protocol supports UFO but does not provide for passing a fragment ID for fragmentation of IPv6 packets. We used to generate a fragment ID wherever such a packet was fragmented, but currently we always use ID=0! v2: Add blank lines after declarations ==================== Signed-off-by: David S. Miller <davem@davemloft.net>
2014-10-30drivers/net, ipv6: Select IPv6 fragment idents for virtio UFO packetsBen Hutchings
UFO is now disabled on all drivers that work with virtio net headers, but userland may try to send UFO/IPv6 packets anyway. Instead of sending with ID=0, we should select identifiers on their behalf (as we used to). Signed-off-by: Ben Hutchings <ben@decadent.org.uk> Fixes: 916e4cf46d02 ("ipv6: reuse ip6_frag_id from ip6_ufo_append_data") Signed-off-by: David S. Miller <davem@davemloft.net>