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2025-05-21Merge tag 'qcom-drivers-for-6.16-2' of ↵Arnd Bergmann
https://git.kernel.org/pub/scm/linux/kernel/git/qcom/linux into soc/drivers More Qualcomm driver updates for v6.16 Allow HP EliteBook Ultra G1q to use QSSECOM for UEFI variable acecss. Add missing compatible for IPQ5018 TCSR block. Fix a kernel-doc warning in SCM driver. * tag 'qcom-drivers-for-6.16-2' of https://git.kernel.org/pub/scm/linux/kernel/git/qcom/linux: docs: firmware: qcom_scm: Fix kernel-doc warning firmware: qcom: scm: Allow QSEECOM for HP EliteBook Ultra G1q dt-bindings: mfd: qcom,tcsr: Add compatible for ipq5018 Link: https://lore.kernel.org/r/20250520024916.39712-1-andersson@kernel.org Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2025-05-21Merge tag 'riscv-cache-for-v6.16' of ↵Arnd Bergmann
https://git.kernel.org/pub/scm/linux/kernel/git/conor/linux into soc/drivers RISC-V cache drivers for v6.16 SiFive: Add support for the Eswin EIC7700 SoC, which needs to make sure of the non-standard cache-ops provided by the ccache driver. Bindings: Conversions for two Marvell bindings to yaml, and additions of two soc-specific compatibles to the axm45mp bindings. Signed-off-by: Conor Dooley <conor.dooley@microchip.com> * tag 'riscv-cache-for-v6.16' of https://git.kernel.org/pub/scm/linux/kernel/git/conor/linux: dt-bindings: cache: add QiLai compatible to ax45mp dt-bindings: cache: Convert marvell,tauros2-cache to DT schema dt-bindings: cache: Convert marvell,{feroceon,kirkwood}-cache to DT schema dt-bindings: cache: add specific RZ/Five compatible to ax45mp cache: sifive_ccache: Add ESWIN EIC7700 support dt-bindings: cache: sifive,ccache0: Add ESWIN EIC7700 SoC compatibility Link: https://lore.kernel.org/r/20250516-liability-facility-667fc14a2a85@spud Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2025-05-21Merge tag 'memory-controller-drv-6.16-2' of ↵Arnd Bergmann
https://git.kernel.org/pub/scm/linux/kernel/git/krzk/linux-mem-ctrl into soc/drivers Memory controller drivers for v6.16, part two Few fixes for STM32 Octo Memory Manager driver introduced for the same cycle in few commits before. These fixes were reported only after wider coverage by bots through linux-next exposure. * tag 'memory-controller-drv-6.16-2' of https://git.kernel.org/pub/scm/linux/kernel/git/krzk/linux-mem-ctrl: memory: stm32_omm: Fix error handling in stm32_omm_disable_child() memory: stm32_omm: Fix NULL vs IS_ERR() check in probe() memory: stm32_omm: Fix error handling in stm32_omm_configure() memory: stm32: Fix spelling mistake "resset" -> "reset" Link: https://lore.kernel.org/r/20250516082415.7871-2-krzysztof.kozlowski@linaro.org Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2025-05-21Merge tag 'samsung-drivers-6.16-2' of ↵Arnd Bergmann
https://git.kernel.org/pub/scm/linux/kernel/git/krzk/linux into soc/drivers Samsung SoC drivers for v6.16, part two Add CPU hotplug support on Google GS101 by toggling respective bits in secondary PMU intr block (Power Management Unit (PMU) Interrupt Generation) from the main PMU driver. * tag 'samsung-drivers-6.16-2' of https://git.kernel.org/pub/scm/linux/kernel/git/krzk/linux: soc: samsung: exynos-pmu: enable CPU hotplug support for gs101 MAINTAINERS: Add google,gs101-pmu-intr-gen.yaml binding file dt-bindings: soc: samsung: exynos-pmu: gs101: add google,pmu-intr-gen phandle dt-bindings: soc: google: Add gs101-pmu-intr-gen binding documentation Link: https://lore.kernel.org/r/20250516082037.7248-2-krzysztof.kozlowski@linaro.org Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2025-05-21soc: aspeed: Add NULL check in aspeed_lpc_enable_snoop()Henry Martin
devm_kasprintf() returns NULL when memory allocation fails. Currently, aspeed_lpc_enable_snoop() does not check for this case, which results in a NULL pointer dereference. Add NULL check after devm_kasprintf() to prevent this issue. Fixes: 3772e5da4454 ("drivers/misc: Aspeed LPC snoop output using misc chardev") Signed-off-by: Henry Martin <bsdhenrymartin@gmail.com> Link: https://patch.msgid.link/20250401074647.21300-1-bsdhenrymartin@gmail.com [arj: Fix Fixes: tag to use subject from 3772e5da4454] Signed-off-by: Andrew Jeffery <andrew@codeconstruct.com.au> Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2025-05-21soc: aspeed: lpc: Fix impossible judgment conditionSu Hui
smatch error: drivers/soc/aspeed/aspeed-lpc-snoop.c:169 aspeed_lpc_snoop_config_irq() warn: platform_get_irq() does not return zero platform_get_irq() return non-zero IRQ number or negative error code, change '!lpc_snoop->irq' to 'lpc_snoop->irq < 0' to fix this. Fixes: 9f4f9ae81d0a ("drivers/misc: add Aspeed LPC snoop driver") Signed-off-by: Su Hui <suhui@nfschina.com> Reviewed-by: Dan Carpenter <dan.carpenter@linaro.org> Link: https://lore.kernel.org/r/20231027020703.1231875-1-suhui@nfschina.com Signed-off-by: Andrew Jeffery <andrew@codeconstruct.com.au> Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2025-05-21ARM: aspeed: Don't select SRAMJoel Stanley
The ASPEED devices have SRAM, but don't require it for basic function (or any function; there's no known users of the driver). Fixes: 8c2ed9bcfbeb ("arm: Add Aspeed machine") Signed-off-by: Joel Stanley <joel@jms.id.au> Link: https://patch.msgid.link/20250115103942.421429-1-joel@jms.id.au Signed-off-by: Andrew Jeffery <andrew@codeconstruct.com.au> Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2025-05-21Merge tag 'riscv-sophgo-soc-for-v6.16' of https://github.com/sophgo/linux ↵Arnd Bergmann
into soc/drivers RISC-V SoC for v6.16 Sophgo: Add support for SG2044 TOP syscon device. The SG2044 TOP device provide PLL clock function in its area. Add RTC support for CV1800 series SoC. The device is called RTC, but contains control registers of other HW blocks in its address space, most notably of Power-on-Reset (PoR) module, DW8051 IP (MCU core), accompanying SRAM, hence putting it in SoC subsystem. Signed-off-by: Chen Wang <unicorn_wang@outlook.com> * tag 'riscv-sophgo-soc-for-v6.16' of https://github.com/sophgo/linux: soc: sophgo: cv1800: rtcsys: New driver (handling RTC only) dt-bindings: soc: sophgo: add RTC support for Sophgo CV1800 series soc: sophgo: sg2044: Add support for SG2044 TOP syscon device Link: https://lore.kernel.org/r/MA0P287MB2262B041A26A0F5EAD1E296CFE91A@MA0P287MB2262.INDP287.PROD.OUTLOOK.COM Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2025-05-21Merge tag 'qcom-drivers-for-6.16' of ↵Arnd Bergmann
https://git.kernel.org/pub/scm/linux/kernel/git/qcom/linux into soc/drivers Qualcomm driver updates for v6.16 Allow list QSEECOM for EFI variable services on on the Asus Zenbook A14, and block list TZMEM on the SM7150 platform to avoid issues with rmtfs. Extend the last-level cache (llcc) driver to support version 6 of the hardware and enable SM8750 support. Also add socinfo for the SM8750 platform. Re-enable UCSI support on SC8280XP, now that the reported crash has been dealt with, and filter the altmode notifications to avoid spurious hotplug events being propagated to user space. Add SM7150 support to pd-mapper. * tag 'qcom-drivers-for-6.16' of https://git.kernel.org/pub/scm/linux/kernel/git/qcom/linux: soc: qcom: llcc-qcom: Add support for SM8750 soc: qcom: llcc-qcom: Add support for LLCC V6 dt-bindings: cache: qcom,llcc: Document SM8750 LLCC block soc: qcom: socinfo: add SM8750 SoC ID dt-bindings: arm: qcom,ids: add SoC ID for SM8750 dt-bindings: soc: qcom: qcom,rpm: add missing clock/-names properties dt-bindings: soc: qcom,rpm: add missing clock-controller node soc: qcom: smem: Update max processor count firmware: qcom: tzmem: disable sm7150 platform soc: qcom: pd-mapper: Add support for SM7150 soc: qcom: pmic_glink_altmode: fix spurious DP hotplug events soc: qcom: smp2p: Fix fallback to qcom,ipc parse soc: qcom: pmic_glink: enable UCSI on sc8280xp firmware: qcom: scm: Allow QSEECOM on Asus Zenbook A14 dt-bindings: soc: qcom,rpmh-rsc: Limit power-domains requirement Link: https://lore.kernel.org/r/20250513215656.44448-1-andersson@kernel.org Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2025-05-21Merge tag 'soc-drivers-6.16' of ↵Arnd Bergmann
https://git.kernel.org/pub/scm/linux/kernel/git/krzk/linux-dt into soc/drivers VT8500 (and FSL) SoC drivers for v6.16 1. VT8500: Add SCC socinfo/hwinfo driver. 2. Cleanup unused function in PowerPC Freescale QE driver to have W=1 builds warnings free. * tag 'soc-drivers-6.16' of https://git.kernel.org/pub/scm/linux/kernel/git/krzk/linux-dt: soc: fsl: qe: remove unused qe_ic_from_irq function ARM: vt8500: MAINTAINERS: Include vt8500 soc driver in maintainers entry soc: Add VIA/WonderMedia SoC identification driver dt-bindings: hwinfo: Add VIA/WonderMedia SoC identification Link: https://lore.kernel.org/r/20250513104216.25803-6-krzysztof.kozlowski@linaro.org Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2025-05-21Merge tag 'amlogic-driver-for-v6.16' of ↵Arnd Bergmann
https://git.kernel.org/pub/scm/linux/kernel/git/amlogic/linux into soc/drivers Amlogic Driver for v6.16: - Amlogic clk measure memory usage optimization - Amlogic clk measure support for S4 & C3 Socs - Amlogic A4/A5 reset controller bindings * tag 'amlogic-driver-for-v6.16' of https://git.kernel.org/pub/scm/linux/kernel/git/amlogic/linux: dt-bindings: reset: Add compatible for Amlogic A4/A5 Reset Controller soc: amlogic: clk-measure: Add support for S4 soc: amlogic: clk-measure: Add support for C3 dt-bindings: soc: amlogic: S4 supports clk-measure dt-bindings: soc: amlogic: C3 supports clk-measure soc: amlogic: clk-measure: Define MSR_CLK's register offset separately soc: amlogic: clk-measure: Optimize the memory size of clk-measure Link: https://lore.kernel.org/r/04908842-4c55-44a0-b74c-3aca82a1f204@linaro.org Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2025-05-21Merge tag 'ti-driver-soc-for-v6.16' of ↵Arnd Bergmann
https://git.kernel.org/pub/scm/linux/kernel/git/ti/linux into soc/drivers TI SoC driver updates for v6.16 - ti_sci: Bug fix in CPU latency conversion from us to ms for TISCI protocol - k3-socinfo: Add JTAG ID for AM62LX - Code cleanups: wkup_m3_ipc: Use dev_err_probe, k3-ringacc: use device_match_of_probe and knav_qmss_queue: drop unnecessary NULL check * tag 'ti-driver-soc-for-v6.16' of https://git.kernel.org/pub/scm/linux/kernel/git/ti/linux: soc: ti: wkup_m3_ipc: Use dev_err_probe firmware: ti_sci: Convert CPU latency constraint from us to ms soc: ti: k3-socinfo: Add JTAG ID for AM62LX soc: ti: knav_qmss_queue: Remove unnecessary NULL check before free_percpu() soc: ti: k3-ringacc: Use device_match_of_node() Link: https://lore.kernel.org/r/20250512144719.mpkyw2jbyzslb5hy@yearly Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2025-05-21Merge tag 'reset-for-v6.16' of git://git.pengutronix.de/pza/linux into ↵Arnd Bergmann
soc/drivers Reset controller updates for v6.16 * Add T-HEAD TH1520 and Renesas RZ/V2H(P) USB2PHY reset controller drivers. * Add devm_reset_control_array_get_exclusive_released() variant to allow using the acquire/release hand-off mechanism for exclusive reset controls bundled into reset control arrays. * Add Sophgo SG2044 reset controller to device tree bindings. * tag 'reset-for-v6.16' of git://git.pengutronix.de/pza/linux: dt-bindings: reset: sophgo: Add SG2044 bindings. MAINTAINERS: Add entry for Renesas RZ/V2H(P) USB2PHY Port Reset driver reset: Add USB2PHY port reset driver for Renesas RZ/V2H(P) dt-bindings: reset: Document RZ/V2H(P) USB2PHY reset reset: Add devm_reset_control_array_get_exclusive_released() reset: thead: Add TH1520 reset controller driver dt-bindings: reset: Add T-HEAD TH1520 SoC Reset Controller Link: https://lore.kernel.org/r/20250513092516.3331585-1-p.zabel@pengutronix.de Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2025-05-19docs: firmware: qcom_scm: Fix kernel-doc warningUnnathi Chalicheemala
Add description for members of qcom_scm_desc struct to avoid: drivers/firmware/qcom/qcom_scm.h:56: warning: Function parameter or struct member 'svc' not described in 'qcom_scm_desc' drivers/firmware/qcom/qcom_scm.h:56: warning: Function parameter or struct member 'cmd' not described in 'qcom_scm_desc' drivers/firmware/qcom/qcom_scm.h:56: warning: Function parameter or struct member 'owner' not described in 'qcom_scm_desc' Signed-off-by: Unnathi Chalicheemala <unnathi.chalicheemala@oss.qualcomm.com> Reviewed-by: Konrad Dybcio <konrad.dybcio@oss.qualcomm.com> Link: https://lore.kernel.org/r/20250403-fix_scm_doc_warn-v1-1-9cd36345db77@oss.qualcomm.com Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2025-05-14firmware: qcom: scm: Allow QSEECOM for HP EliteBook Ultra G1qJuerg Haefliger
This is required to get access to efivars and uefi boot loader support. Signed-off-by: Juerg Haefliger <juerg.haefliger@canonical.com> Link: https://lore.kernel.org/r/20250429144957.2088284-5-juerg.haefliger@canonical.com Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2025-05-14dt-bindings: mfd: qcom,tcsr: Add compatible for ipq5018George Moussalem
Document the qcom,tcsr-ipq5018 compatible. Signed-off-by: George Moussalem <george.moussalem@outlook.com> Acked-by: Rob Herring (Arm) <robh@kernel.org> Link: https://lore.kernel.org/r/20250512-ipq5018-syscon-v1-1-eb1ad2414c3c@outlook.com Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2025-05-14dt-bindings: cache: add QiLai compatible to ax45mpBen Zong-You Xie
Add a new compatible string for ax45mp-cache on QiLai SoC. Also, add allOf constraints to enforce specific cache-sets and cache-size values for qilai-ax45mp-cache. Signed-off-by: Ben Zong-You Xie <ben717@andestech.com> Signed-off-by: Conor Dooley <conor.dooley@microchip.com>
2025-05-14memory: stm32_omm: Fix error handling in stm32_omm_disable_child()Patrice Chotard
Fix stm32_omm_toggle_child_clock() return value test, we should exit only on non zero value. Fixes: 8181d061dcff ("memory: Add STM32 Octo Memory Manager driver") Signed-off-by: Patrice Chotard <patrice.chotard@foss.st.com> Link: https://lore.kernel.org/r/20250513-stm32_omm_fix_typo-v1-1-5b90ec8b52e7@foss.st.com Reported-by: Dan Carpenter <dan.carpenter@linaro.org> Closes: https://lore.kernel.org/all/aB29hOrv0nU73RCn@stanley.mountain/ Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
2025-05-13dt-bindings: cache: Convert marvell,tauros2-cache to DT schemaRob Herring (Arm)
Convert the Marvell Tauros2 Cache binding to DT schema. Signed-off-by: Rob Herring (Arm) <robh@kernel.org> Reviewed-by: Andrew Lunn <andrew@lunn.ch> Signed-off-by: Conor Dooley <conor.dooley@microchip.com>
2025-05-13dt-bindings: cache: Convert marvell,{feroceon,kirkwood}-cache to DT schemaRob Herring (Arm)
Convert the Marvell Feroceon/Kirkwood Cache binding to DT schema format. Use "marvell,kirkwood-cache" for the filename instead as that's only compatible used in a .dts upstream. Signed-off-by: Rob Herring (Arm) <robh@kernel.org> Reviewed-by: Andrew Lunn <andrew@lunn.ch> Signed-off-by: Conor Dooley <conor.dooley@microchip.com>
2025-05-13soc: samsung: exynos-pmu: enable CPU hotplug support for gs101Peter Griffin
Some additional register writes are required when hotplugging CPUs on gs101, without these the system hangs when hotplugging. Specifically a CPU_INFORM register needs to be programmed with a hint value which is used by the EL3 firmware (el3mon) and the pmu-intr-gen registers need to be programmed. With this patch applied, and corresponding DT update CPU hotplug now works as expected. e.g. echo 0 > /sys/devices/system/cpu/cpu6/online echo 1 > /sys/devices/system/cpu/cpu6/online Note: to maintain compatibility with older DTs that didn't specify pmu-intr-gen phandle only a warning is issued if the syscon can't be obtained. Signed-off-by: Peter Griffin <peter.griffin@linaro.org> Link: https://lore.kernel.org/r/20250506-contrib-pg-cpu-hotplug-suspend2ram-fixes-v1-v4-5-9f64a2657316@linaro.org [krzk: few blank line and white-space alignment fixes from checkpatch] Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
2025-05-13MAINTAINERS: Add google,gs101-pmu-intr-gen.yaml binding filePeter Griffin
Add the newly added google,gs101-pmu-intr-gen.yaml file to the Tensor section. Signed-off-by: Peter Griffin <peter.griffin@linaro.org> Link: https://lore.kernel.org/r/20250506-contrib-pg-cpu-hotplug-suspend2ram-fixes-v1-v4-3-9f64a2657316@linaro.org Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
2025-05-13dt-bindings: soc: samsung: exynos-pmu: gs101: add google,pmu-intr-gen phandlePeter Griffin
gs101 requires access to the pmu interrupt generation register region which is exposed as a syscon. Update the exynos-pmu bindings documentation to reflect this. Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Signed-off-by: Peter Griffin <peter.griffin@linaro.org> Link: https://lore.kernel.org/r/20250506-contrib-pg-cpu-hotplug-suspend2ram-fixes-v1-v4-2-9f64a2657316@linaro.org Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
2025-05-13dt-bindings: soc: google: Add gs101-pmu-intr-gen binding documentationPeter Griffin
Add bindings documentation for the Power Management Unit (PMU) interrupt generator. Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Signed-off-by: Peter Griffin <peter.griffin@linaro.org> Link: https://lore.kernel.org/r/20250506-contrib-pg-cpu-hotplug-suspend2ram-fixes-v1-v4-1-9f64a2657316@linaro.org Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
2025-05-12soc: qcom: llcc-qcom: Add support for SM8750Melody Olvera
Add system cache table and configs for SM8750 SoCs. Signed-off-by: Melody Olvera <melody.olvera@oss.qualcomm.com> Reviewed-by: Konrad Dybcio <konrad.dybcio@oss.qualcomm.com> Link: https://lore.kernel.org/r/20250512-sm8750_llcc_master-v5-3-d78dca6282a5@oss.qualcomm.com Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2025-05-12soc: qcom: llcc-qcom: Add support for LLCC V6Melody Olvera
Add support for LLCC V6. V6 adds several additional usecase IDs, rearrages several registers and offsets, and supports slice IDs over 31, so add a new function for programming LLCC V6. Signed-off-by: Melody Olvera <melody.olvera@oss.qualcomm.com> Reviewed-by: Konrad Dybcio <konrad.dybcio@oss.qualcomm.com> Link: https://lore.kernel.org/r/20250512-sm8750_llcc_master-v5-2-d78dca6282a5@oss.qualcomm.com Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2025-05-12dt-bindings: cache: qcom,llcc: Document SM8750 LLCC blockMelody Olvera
Add documentation for the SM8750 LLCC. Signed-off-by: Melody Olvera <melody.olvera@oss.qualcomm.com> Acked-by: Conor Dooley <conor.dooley@microchip.com> Link: https://lore.kernel.org/r/20250512-sm8750_llcc_master-v5-1-d78dca6282a5@oss.qualcomm.com Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2025-05-12dt-bindings: cache: add specific RZ/Five compatible to ax45mpConor Dooley
When the binding was originally written, it was assumed that all ax45mp-caches had the same properties etc. This has turned out to be incorrect, as the QiLai SoC has a different number of cache-sets. Add a specific compatible for the RZ/Five for property enforcement and in case there turns out to be additional differences between these implementations of the cache controller. Acked-by: Ben Zong-You Xie <ben717@andestech.com> Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be> Signed-off-by: Conor Dooley <conor.dooley@microchip.com>
2025-05-12Merge tag 'imx-drivers-6.16' of ↵Arnd Bergmann
https://git.kernel.org/pub/scm/linux/kernel/git/shawnguo/linux into soc/drivers i.MX drivers change for 6.16: - A series from Peng Fan to dump full 128-bits UID for i.MX8MP * tag 'imx-drivers-6.16' of https://git.kernel.org/pub/scm/linux/kernel/git/shawnguo/linux: soc: imx8m: Dump higher 64bits UID soc: imx8m: Introduce soc_uid hook soc: imx8m: Cleanup with adding imx8m_soc_[un]prepare Link: https://lore.kernel.org/r/20250512103858.50501-1-shawnguo@kernel.org Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2025-05-12Merge branch 'cznic/platform' of ↵Arnd Bergmann
https://git.kernel.org/pub/scm/linux/kernel/git/soc/soc into soc/drivers These are updates from Marek Behún for the cznic platform drivers: This series adds support for generating ECDSA signatures with hardware stored private key on Turris Omnia and Turris MOX. This ability is exposed via the keyctl() syscall. * 'cznic/platform' of https://git.kernel.org/pub/scm/linux/kernel/git/soc/soc: platform: cznic: use ffs() instead of __bf_shf() firmware: turris-mox-rwtm: fix building without CONFIG_KEYS platform: cznic: fix function parameter names firmware: turris-mox-rwtm: Add support for ECDSA signatures with HW private key firmware: turris-mox-rwtm: Drop ECDSA signatures via debugfs platform: cznic: turris-omnia-mcu: Add support for digital message signing with HW private key platform: cznic: Add keyctl helpers for Turris platform platform: cznic: turris-omnia-mcu: Refactor requesting MCU interrupt Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2025-05-12Merge tag 'omap-for-v6.16/drivers-signed' of ↵Arnd Bergmann
https://git.kernel.org/pub/scm/linux/kernel/git/khilman/linux-omap into soc/drivers OMAP driver updates for v6.16 * tag 'omap-for-v6.16/drivers-signed' of https://git.kernel.org/pub/scm/linux/kernel/git/khilman/linux-omap: Revert "bus: ti-sysc: Probe for l4_wkup and l4_cfg interconnect devices first" Link: https://lore.kernel.org/r/7h5xi7rtix.fsf@baylibre.com Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2025-05-12memory: stm32_omm: Fix NULL vs IS_ERR() check in probe()Dan Carpenter
The platform_get_resource_byname() function returns NULL on error. It doesn't return error pointers. Update the check to match. Fixes: 8181d061dcff ("memory: Add STM32 Octo Memory Manager driver") Signed-off-by: Dan Carpenter <dan.carpenter@linaro.org> Link: https://lore.kernel.org/r/a1645f1eedaa9b2ae62ac07feed0552eea75bc46.1746781081.git.dan.carpenter@linaro.org Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
2025-05-12memory: stm32_omm: Fix error handling in stm32_omm_configure()Dan Carpenter
There are two error handling bugs in the stm32_omm_configure() function. 1) The error code needs to be set if clk_get_rate() fails. 2) If devm_reset_control_get_exclusive() then call pm_runtime_put_sync_suspend() before returning. Fixes: 8181d061dcff ("memory: Add STM32 Octo Memory Manager driver") Signed-off-by: Dan Carpenter <dan.carpenter@linaro.org> Link: https://lore.kernel.org/r/a69ce0445324e994ea2ed7493bda1f6046c7ff69.1746781081.git.dan.carpenter@linaro.org Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
2025-05-12memory: stm32: Fix spelling mistake "resset" -> "reset"Colin Ian King
There is a spelling mistake in a dev_err message. Fix it. Signed-off-by: Colin Ian King <colin.i.king@gmail.com> Link: https://lore.kernel.org/r/20250509104459.28167-1-colin.i.king@gmail.com Fixes: 8181d061dcff ("memory: Add STM32 Octo Memory Manager driver") Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
2025-05-11soc: qcom: socinfo: add SM8750 SoC IDMukesh Ojha
Update soc_id table for the Qualcomm SM8750 SoC to represent SM8750 machine. Signed-off-by: Mukesh Ojha <mukesh.ojha@oss.qualcomm.com> Reviewed-by: Melody Olvera <melody.olvera@oss.qualcomm.com> Link: https://lore.kernel.org/r/20250508134635.1627031-1-mukesh.ojha@oss.qualcomm.com Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2025-05-11dt-bindings: arm: qcom,ids: add SoC ID for SM8750Mukesh Ojha
Add the unique ID for Qualcomm SM8750 SoC. This value is used to differentiate the SoC across qcom targets. Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Signed-off-by: Mukesh Ojha <mukesh.ojha@oss.qualcomm.com> Reviewed-by: Melody Olvera <melody.olvera@oss.qualcomm.com> Link: https://lore.kernel.org/r/20250508134635.1627031-2-mukesh.ojha@oss.qualcomm.com Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2025-05-10Merge tag 'tee-for-v6.16' of ↵Arnd Bergmann
https://git.kernel.org/pub/scm/linux/kernel/git/jenswi/linux-tee into soc/drivers Small TEE updates for v6.16 - Remove an unnecessary NULL check before release_firmware() in the OP-TEE driver - Prevent a size wrap in the TEE subsystem. The wrap would have been caught later in the code so no security consequences. * tag 'tee-for-v6.16' of https://git.kernel.org/pub/scm/linux/kernel/git/jenswi/linux-tee: tee: Prevent size calculation wraparound on 32-bit kernels tee: optee: smc: remove unnecessary NULL check before release_firmware() Link: https://lore.kernel.org/r/20250509065114.GA4188600@rayden Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2025-05-09dt-bindings: soc: qcom: qcom,rpm: add missing clock/-names propertiesDmitry Baryshkov
Qualcomm MSM8660 and IPQ0864 platforms use additional clock for the RPM device. Document it in the schema. Fixes: aa0c4b815045 ("mfd: devicetree: bindings: Add Qualcomm RPM DT binding") Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@oss.qualcomm.com> Reviewed-by: Rob Herring (Arm) <robh@kernel.org> Link: https://lore.kernel.org/r/20250318-fix-nexus-4-v2-2-bcedd1406790@oss.qualcomm.com Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2025-05-09dt-bindings: soc: qcom,rpm: add missing clock-controller nodeDmitry Baryshkov
On Qualcomm platforms in addition to regulators the RPM also provides clocks via the child clock-controller node. Describe it properly in the schema. Fixes: 872f91b5ea72 ("clk: qcom: Add support for RPM Clocks") Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@oss.qualcomm.com> Link: https://lore.kernel.org/r/20250318-fix-nexus-4-v2-1-bcedd1406790@oss.qualcomm.com Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2025-05-09soc: qcom: smem: Update max processor countUnnathi Chalicheemala
Update max processor count to reflect the number of co-processors on upcoming SoC. Signed-off-by: Unnathi Chalicheemala <unnathi.chalicheemala@oss.qualcomm.com> Reviewed-by: Konrad Dybcio <konrad.dybcio@oss.qualcomm.com> Link: https://lore.kernel.org/r/20250424-smem_count-v1-1-931cf68f71a8@oss.qualcomm.com Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2025-05-09firmware: qcom: tzmem: disable sm7150 platformDanila Tikhonov
The SHM bridge makes the SM7150 devices reset while probing the RMTFS (in qcom_scm_assign_mem()). Blacklist the SHM Bridge on corresponding platforms using SoC-level compat string. Signed-off-by: Danila Tikhonov <danila@jiaxyga.com> Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@oss.qualcomm.com> Link: https://lore.kernel.org/r/20250422213137.80366-13-danila@jiaxyga.com Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2025-05-09soc: qcom: pd-mapper: Add support for SM7150Jens Reidel
SM7150 protection domains are the same as SC7180, with the subtle difference that SM7150 has a CDSP. Signed-off-by: Jens Reidel <adrian@mainlining.org> Signed-off-by: Danila Tikhonov <danila@jiaxyga.com> Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@oss.qualcomm.com> Link: https://lore.kernel.org/r/20250422213137.80366-11-danila@jiaxyga.com Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2025-05-09soc: qcom: pmic_glink_altmode: fix spurious DP hotplug eventsJohan Hovold
The PMIC GLINK driver is currently generating DisplayPort hotplug notifications whenever something is connected to (or disconnected from) a port regardless of the type of notification sent by the firmware. These notifications are forwarded to user space by the DRM subsystem as connector "change" uevents: KERNEL[1556.223776] change /devices/platform/soc@0/ae00000.display-subsystem/ae01000.display-controller/drm/card0 (drm) ACTION=change DEVPATH=/devices/platform/soc@0/ae00000.display-subsystem/ae01000.display-controller/drm/card0 SUBSYSTEM=drm HOTPLUG=1 CONNECTOR=36 DEVNAME=/dev/dri/card0 DEVTYPE=drm_minor SEQNUM=4176 MAJOR=226 MINOR=0 On the Lenovo ThinkPad X13s and T14s, the PMIC GLINK firmware sends two identical notifications with orientation information when connecting a charger, each generating a bogus DRM hotplug event. On the X13s, two such notification are also sent every 90 seconds while a charger remains connected, which again are forwarded to user space: port = 1, svid = ff00, mode = 255, hpd_state = 0 payload = 01 00 00 00 00 00 00 ff 00 00 00 00 00 00 00 00 Note that the firmware only sends on of these when connecting an ethernet adapter. Fix the spurious hotplug events by only forwarding hotplug notifications for the Type-C DisplayPort service id. This also reduces the number of uevents from four to two when an actual DisplayPort altmode device is connected: port = 0, svid = ff01, mode = 2, hpd_state = 0 payload = 00 01 02 00 f2 0c 01 ff 03 00 00 00 00 00 00 00 port = 0, svid = ff01, mode = 2, hpd_state = 1 payload = 00 01 02 00 f2 0c 01 ff 43 00 00 00 00 00 00 00 Fixes: 080b4e24852b ("soc: qcom: pmic_glink: Introduce altmode support") Cc: stable@vger.kernel.org # 6.3 Cc: Bjorn Andersson <andersson@kernel.org> Reported-by: Clayton Craft <clayton@craftyguy.net> Signed-off-by: Johan Hovold <johan+linaro@kernel.org> Acked-by: Konrad Dybcio <konrad.dybcio@oss.qualcomm.com> Tested-by: Clayton Craft <clayton@craftyguy.net> Link: https://lore.kernel.org/r/20250324132448.6134-1-johan+linaro@kernel.org Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2025-05-09soc: qcom: smp2p: Fix fallback to qcom,ipc parseBarnabás Czémán
mbox_request_channel() returning value was changed in case of error. It uses returning value of of_parse_phandle_with_args(). It is returning with -ENOENT instead of -ENODEV when no mboxes property exists. Fixes: 24fdd5074b20 ("mailbox: use error ret code of of_parse_phandle_with_args()") Signed-off-by: Barnabás Czémán <barnabas.czeman@mainlining.org> Reviewed-by: Stephan Gerhold <stephan.gerhold@linaro.org> Tested-by: Stephan Gerhold <stephan.gerhold@linaro.org> # msm8939 Link: https://lore.kernel.org/r/20250421-fix-qcom-smd-v1-2-574d071d3f27@mainlining.org Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2025-05-09Merge tag 'renesas-drivers-for-v6.16-tag2' of ↵Arnd Bergmann
https://git.kernel.org/pub/scm/linux/kernel/git/geert/renesas-devel into soc/drivers Renesas driver updates for v6.16 (take two) - Cover all R-Car drivers in the ARM/RISC-V/RENESAS ARCHITECTURE maintainer entry, - Identify the Renesas RZ/V2N (R9A09G056) SoC. * tag 'renesas-drivers-for-v6.16-tag2' of https://git.kernel.org/pub/scm/linux/kernel/git/geert/renesas-devel: soc: renesas: rz-sysc: Add SoC identification for RZ/V2N SoC MAINTAINERS: Generalize ARM/RISC-V/RENESAS ARCHITECTURE Link: https://lore.kernel.org/r/cover.1746798752.git.geert+renesas@glider.be Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2025-05-09Merge tag 'amd-tee-for-v6.16' of ↵Arnd Bergmann
https://git.kernel.org/pub/scm/linux/kernel/git/jenswi/linux-tee into soc/drivers AMD-TEE driver updates for v6.16 - Sort header includes - Use pr_fmt * tag 'amd-tee-for-v6.16' of https://git.kernel.org/pub/scm/linux/kernel/git/jenswi/linux-tee: amdtee: Sort header includes amdtee: Use pr_fmt for messages Link: https://lore.kernel.org/r/20250509065833.GB4188600@rayden Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2025-05-09Merge tag 'hisi-drivers-for-6.16' of https://github.com/hisilicon/linux-hisi ↵Arnd Bergmann
into soc/drivers HiSilicon driver updates for v6.16 - Simplify PCC shared memory region handling in HCCS driver * tag 'hisi-drivers-for-6.16' of https://github.com/hisilicon/linux-hisi: soc: hisilicon: kunpeng_hccs: Simplify PCC shared memory region handling Link: https://lore.kernel.org/r/681D9FC4.6080508@hisilicon.com Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2025-05-09Merge tag 'memory-controller-drv-6.16' of ↵Arnd Bergmann
https://git.kernel.org/pub/scm/linux/kernel/git/krzk/linux-mem-ctrl into soc/drivers Memory controller drivers for v6.16 1. Mediatek: Add support for MT6893 MTK SMI. 2. STM32: Add new driver for STM32 Octo Memory Manager (OMM), which manages muxing between two OSPI busses. 3. Several cleanups and minor improvements (OMAP GPMC, Kconfig entries, BT1 L2). * tag 'memory-controller-drv-6.16' of https://git.kernel.org/pub/scm/linux/kernel/git/krzk/linux-mem-ctrl: MAINTAINERS: add entry for STM32 OCTO MEMORY MANAGER driver memory: Add STM32 Octo Memory Manager driver dt-bindings: memory-controllers: Add STM32 Octo Memory Manager controller bus: firewall: Fix missing static inline annotations for stubs memory: bt1-l2-ctl: replace scnprintf() with sysfs_emit() memory: mtk-smi: Add support for Dimensity 1200 MT6893 SMI dt-bindings: memory: mtk-smi: Add support for MT6893 memory: tegra: Do not enable by default during compile testing memory: Simplify 'default' choice in Kconfig memory: omap-gpmc: remove GPIO set() and direction_output() callbacks memory: omap-gpmc: use the dedicated define for GPIO direction Link: https://lore.kernel.org/r/20250508093451.55755-2-krzysztof.kozlowski@linaro.org Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2025-05-09Merge tag 'memory-controller-drv-renesas-6.16' of ↵Arnd Bergmann
https://git.kernel.org/pub/scm/linux/kernel/git/krzk/linux-mem-ctrl into soc/drivers Renesas memory controller drivers for v6.16 Improvements and new device support for the Renesas RPC IF memory controller driver: 1. Minor cleanup and improvements. 2. Refactor the driver to accommodate for newly added Renesas RZ/G3E support: - Acquire two resets instead of only one, - Add RZ/G3E xSPI support with different register layout and its own, new interface for Renesas SPI. * tag 'memory-controller-drv-renesas-6.16' of https://git.kernel.org/pub/scm/linux/kernel/git/krzk/linux-mem-ctrl: memory: renesas-rpc-if: Add missing static keyword memory: renesas-rpc-if: Add RZ/G3E xSPI support memory: renesas-rpc-if: Add wrapper functions memory: renesas-rpc-if: Add regmap to struct rpcif_info memory: renesas-rpc-if: Use devm_reset_control_array_get_exclusive() memory: renesas-rpc-if: Move rpc-if reg definitions dt-bindings: memory: Document RZ/G3E support memory: renesas-rpc-if: Move rpcif_info definitions near to the user memory: renesas-rpc-if: Fix RPCIF_DRENR_CDB macro error Link: https://lore.kernel.org/r/20250508090749.51379-2-krzysztof.kozlowski@linaro.org Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2025-05-09Merge tag 'scmi-updates-6.16' of ↵Arnd Bergmann
https://git.kernel.org/pub/scm/linux/kernel/git/sudeep.holla/linux into soc/drivers Arm SCMI updates for v6.16 1. Quirk framework to handle buggy firmware With SCMI gaining broader adoption across arm64 platforms, it's increasingly important to address how we consistently manage out-of-spec SCMI firmware already deployed in the field. This change introduces a lightweight quirk framework built around static_keys, enabling developers to: - Define quirks and their match criteria, which can include: o A list of compatibles ({ comp, comp2, NULL }) o Vendor ID / Sub-Vendor ID o Firmware implementation version ranges ([Min_Vers, Max_Vers]) Matching proceeds from the most specific (longest match) to the least specific. NULL entries are treated as wildcards (i.e., match any value). This flexibility allows matching very specific combinations or just a general compatible string. The quirk code blocks/snippets implementing the workaround are placed near their intended usage and guarded by a static_key that's tied to the quirk. Once the SCMI core stack is initialized and retrieves platform info via the base protocol, any matching quirks will have their associated static_keys enabled. 2. Quirk for Qualcomm X1E platforms On some Qualcomm X1E platforms, such as the Lenovo ThinkPad T14s, the SCMI firmware fails to set the FastChannel support bit for PERF_LEVEL_GET, yet it crashes when the driver attempts to fall back to standard messaging which is clearly out-of-spec behavior. To work around this, the new SCMI quirk framework is used to unconditionally enable FC initialization for this firmware version. In the future, once the fixed firmware version is identified, an upper version bound can be added to the quirk match criteria. Alternatively, matching can be further restricted using a SoC-specific compatible string if always enabling FC proves problematic elsewhere. 3. Support for NXP i.MX LMM/CPU vendor protocol extensions The i.MX95 System Manager (SM) implements Logical Machine Management (LMM) and a CPU protocol to manage Logical Machines (LM) and CPUs (e.g., M7). These changes integrate the vendor-specific protocol extensions implementing the LMM and CPU protocols for the i.MX95, facilitating standardized communication between the operating system and the platform's firmware, which will be used by remoteproc drivers. The changes also include the necessary device tree bindings. 4. Miscellaneous cleanups/changes These mainly include polling support in SCMI raw mode. The cleanups centralize error logging for SCMI device creation into a single helper function, consolidate the device matching logic into a single function, and ensure that devices must have a name for registration—removing support for unnamed devices when matching drivers and devices for probing. Transport devices are now excluded from bus matching, and the correct assignment of the parent device for the arm-scmi platform device is ensured in the transport drivers. * tag 'scmi-updates-6.16' of https://git.kernel.org/pub/scm/linux/kernel/git/sudeep.holla/linux: firmware: arm_scmi: quirk: Force perf level get fastchannel firmware: arm_scmi: quirk: Fix CLOCK_DESCRIBE_RATES triplet firmware: arm_scmi: Add common framework to handle firmware quirks firmware: arm_scmi: Ensure that the message-id supports fastchannel MAINTAINERS: add entry for i.MX SCMI extensions firmware: imx: Add i.MX95 SCMI CPU driver firmware: imx: Add i.MX95 SCMI LMM driver firmware: arm_scmi: imx: Add i.MX95 CPU Protocol firmware: arm_scmi: imx: Add i.MX95 LMM protocol dt-bindings: firmware: Add i.MX95 SCMI LMM and CPU protocol firmware: arm_scmi: imx: Add LMM and CPU documentation firmware: arm_scmi: Add polling support to raw mode firmware: arm_scmi: Exclude transport devices from bus matching firmware: arm_scmi: Assign correct parent to arm-scmi platform device firmware: arm_scmi: Refactor error logging from SCMI device creation to single helper firmware: arm_scmi: Refactor device matching logic to eliminate duplication firmware: arm_scmi: Ensure scmi_devices are always matched by name as well Link: https://lore.kernel.org/r/20250507134713.49039-1-sudeep.holla@arm.com Signed-off-by: Arnd Bergmann <arnd@arndb.de>