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2018-01-02drm/etnaviv: remove switch_context member from etnaviv_gpuLucas Stach
There is no need to store this in the gpu struct. MMU flushes are triggered correctly in reaction to MMU maps and unmaps, independent of the current ctx. Any required pipe switches can be infered from the current and the desired GPU exec state. Signed-off-by: Lucas Stach <l.stach@pengutronix.de> Reviewed-by: Philipp Zabel <p.zabel@pengutronix.de> Reviewed-by: Christian Gmeiner <christian.gmeiner@gmail.com>
2018-01-02drm/etnaviv: don't flush workqueue in etnaviv_gpu_wait_obj_inactiveLucas Stach
There is no need to synchronize with oustanding retire jobs if the object has gone idle. Retire jobs only ever change the object state from active to idle, not the other way around. The IOVA put race is uncritical, as the GEM_WAIT ioctl itself is holding a reference to the GEM object, so the retire worker will not pull the object into the CPU domain, which is the thing we are trying to guard against with etnaviv_gpu_wait_obj_inactive. The ordering of the various counts and waits may change a bit, but the userspace visible behavior at the bounds of the syscall are unchanged. Signed-off-by: Lucas Stach <l.stach@pengutronix.de> Reviewed-by: Philipp Zabel <p.zabel@pengutronix.de>
2018-01-02drm/etnaviv: remove stale TODO in etnaviv_gpu_submitLucas Stach
Flush and prefetch are properly handled in the buffer code, data endianess would need much wider changes than adding something to this single function. Signed-off-by: Lucas Stach <l.stach@pengutronix.de> Reviewed-by: Christian Gmeiner <christian.gmeiner@gmail.com>
2018-01-02drm/etnaviv: remove -EAGAIN handling from submit pathLucas Stach
Now that the userptr BO handling doesn't rely on the userspace restarting the submit after object population, there is no need to special case the -EAGAIN return value anymore. Signed-off-by: Lucas Stach <l.stach@pengutronix.de> Reviewed-by: Philipp Zabel <p.zabel@pengutronix.de>
2018-01-02drm/etnaviv: get rid of userptr workerLucas Stach
All code paths which populate userptr BOs are fine with the get_pages function taking the mmap_sem lock. This allows to get rid of the pretty involved architecture with a worker being scheduled if the mmap_sem needs to be taken, but instead call GUP directly and allow it to take the lock if necessary. This simplifies the code a lot and removes the possibility of this function returning -EAGAIN, which complicates object population handling at the callers. A notable change in behavior is that we don't allow a process to populate objects with user pages from a foreign MM anymore. This would have been an invalid use before, as it breaks the assumptions made in the etnaviv kernel driver to enfore cache coherence. We now disallow this by rejecting the request to populate those objects. Well behaving userspace is unaffected by this change. Signed-off-by: Lucas Stach <l.stach@pengutronix.de>
2018-01-02drm/etnaviv: change return type of etnaviv_gem_obj_add to voidLucas Stach
This function never fails, as it does nothing more than adding the GEM object to the global device list. Making this explicit through the void return type allows to drop some unnecessary error handling. Signed-off-by: Lucas Stach <l.stach@pengutronix.de> Reviewed-by: Christian Gmeiner <christian.gmeiner@gmail.com> Reviewed-by: Philipp Zabel <p.zabel@pengutronix.de>
2018-01-02drm/etnaviv: fold __etnaviv_gem_new into callerLucas Stach
This function has only one caller and it isn't expected that there will be any more in the future. Folding this function into the caller is helping the readability. Signed-off-by: Lucas Stach <l.stach@pengutronix.de> Reviewed-by: Philipp Zabel <p.zabel@pengutronix.de> Reviewed-by: Christian Gmeiner <christian.gmeiner@gmail.com>
2018-01-02drm/etnaviv: add lockdep annotation for userptr object populationLucas Stach
The current userptr page population will defer work to a work item if needed to avoid ever taking the mmap_sem in the direct call path. With the more fine-grained locking in etnaviv this isn't needed anymore, so a future commit will simplify this code. Add a lockdep annotation to validate the assumption that the mmap_sem can be taken in the direct call path. Signed-off-by: Lucas Stach <l.stach@pengutronix.de> Reviewed-by: Christian Gmeiner <christian.gmeiner@gmail.com>
2018-01-02drm/etnaviv: split obj locks in different classes depending on the obj typeLucas Stach
Userptr, prime and shmem buffer objects have different lock ordering requirements. This is mostly due to the fact that we don't allow to mmap userptr buffers, so we won't ever end up in our fault handler for those, so some of the code paths are never called with the mmap_sem held. To avoid lockdep false positives, split them up into different lock classes. Signed-off-by: Lucas Stach <l.stach@pengutronix.de> Reviewed-by: Christian Gmeiner <christian.gmeiner@gmail.com> Reviewed-by: Philipp Zabel <p.zabel@pengutronix.de>
2018-01-02drm/etnaviv: fix GPU vs sync point raceLucas Stach
If the FE is restarted before the sync point event is cleared, the GPU might trigger a completion IRQ for the next sync point, corrupting the state of the currently running worker. Signed-off-by: Lucas Stach <l.stach@pengutronix.de> Reviewed-by: Philipp Zabel <p.zabel@pengutronix.de> Reviewed-by: Christian Gmeiner <christian.gmeiner@gmail.com>
2018-01-02drm/exynos: ipp: Remove Exynos DRM IPP subsystemMarek Szyprowski
Exynos DRM IPP subsystem is in fact non-functional and frankly speaking dead-code. This patch clearly marks that Exynos DRM IPP subsystem is broken and never really functional. It will be replaced by a completely rewritten API. Exynos DRM IPP user-space API can be obsoleted for the following reasons: 1. Exynos DRM IPP user-space API can be optional in Exynos DRM, so userspace should not rely that it is always available and should have a software fallback in case it is not there. 2. The only mode which was initially semi-working was memory-to-memory image processing. The remaining modes (LCD-"writeback" and "output") were never operational due to missing code (both in mainline and even vendor kernels). 3. Exynos DRM IPP mainline user-space API compatibility for memory-to-memory got broken very early by commit 083500baefd5 ("drm: remove DRM_FORMAT_NV12MT", which removed the support for tiled formats, the main feature which made this API somehow useful on Exynos platforms (video codec that time produced only tiled frames, to implement xvideo or any other video overlay, one has to de-tile them for proper display). 4. Broken drivers. Especially once support for IOMMU has been added, it revealed that drivers don't configure DMA operations properly and in many cases operate outside the provided buffers trashing memory around. 5. Need for external patches. Although IPP user-space API has been used in some vendor kernels, but in such cases there were additional patches applied (like reverting mentioned 083500baefd5 patch) what means that those userspace apps which might use it, still won't work with the mainline kernel version. We don't have time machines, so we cannot change it, but Exynos DRM IPP extension should never have been merged to mainline in that form. Exynos IPP subsystem and user-space API will be rewritten, so remove current IPP core code and mark existing drivers as BROKEN. Signed-off-by: Marek Szyprowski <m.szyprowski@samsung.com> Acked-by: Daniel Stone <daniels@collabora.com> Acked-by: Krzysztof Kozlowski <krzk@kernel.org> Signed-off-by: Inki Dae <inki.dae@samsung.com>
2018-01-02drm/exynos/decon: Add include guard to the Exynos7 headerKrzysztof Kozlowski
Although header is included only once but still having an include guard is a good practice. To avoid confusion, add SoC prefix to existing Exynos5433 header include guard. Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org> Signed-off-by: Inki Dae <inki.dae@samsung.com>
2018-01-02drm/exynos/decon: Move headers from global to local placeKrzysztof Kozlowski
The DECON headers contain only defines for registers. There are no other drivers using them so this should be put locally to the Exynos DRM driver. Keeping headers local helps managing the code. Suggested-by: Marek Szyprowski <m.szyprowski@samsung.com> Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org> Signed-off-by: Inki Dae <inki.dae@samsung.com>
2018-01-02drm/exynos: decon5433: Remove unnecessary platform_get_resource() error checkFabio Estevam
devm_ioremap_resource() already checks if the resource is NULL, so remove the unnecessary platform_get_resource() error check. Cc: Inki Dae <inki.dae@samsung.com> Signed-off-by: Fabio Estevam <fabio.estevam@nxp.com> Reviewed-by: Andrzej Hajda <a.hajda@samsung.com> Signed-off-by: Inki Dae <inki.dae@samsung.com>
2017-12-30drm/amdgpu: Correct the IB size of bo update mapping.Emily Deng
The amdgpu_vm_frag_ptes will call amdgpu_vm_update_ptes, and for buffer object that has shadow buffer, need twice commands. Signed-off-by: Emily Deng <Emily.Deng@amd.com> Reviewed-by: Chunming Zhou <david1.zhou@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2017-12-28drm/ttm: enable swapout for reserved BOs during allocationRoger He
if the bo shares same reservation object then not lock it again at swapout time to make it possible to swap out. v2: refine the commmit message Reviewed-by: Thomas Hellström <thellstrom@vmware.com> Reviewed-by: Christian König <christian.koenig@amd.com> Reviewed-by: Chuming Zhou <david1.zhou@amd.com> Signed-off-by: Roger He <Hongbo.He@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2017-12-28drm/ttm: add new function to check if bo is allowable to evict or swapoutRoger He
extract a function as ttm_bo_evict_swapout_allowable since eviction and swapout can share same logic. v2: modify commit message and add description in the code Reviewed-by: Thomas Hellström <thellstrom@vmware.com> Reviewed-by: Christian König <christian.koenig@amd.com> Reviewed-by: Chuming Zhou <david1.zhou@amd.com> Signed-off-by: Roger He <Hongbo.He@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2017-12-28drm/ttm: use an operation ctx for ttm_tt_bindRoger He
forward the operation context to ttm_tt_bind as well, and the ultimate goal is swapout enablement for reserved BOs. v2: use common term rather than amd specific Reviewed-by: Thomas Hellström <thellstrom@vmware.com> Reviewed-by: Christian König <christian.koenig@amd.com> Reviewed-by: Chuming Zhou <david1.zhou@amd.com> Signed-off-by: Roger He <Hongbo.He@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2017-12-28drm/ttm: use an operation ctx for ttm_tt_populate in ttm_bo_driver (v2)Roger He
forward the operation context to ttm_tt_populate as well, and the ultimate goal is swapout enablement for reserved BOs. v2: squash in fix for vboxvideo Reviewed-by: Christian König <christian.koenig@amd.com> Signed-off-by: Roger He <Hongbo.He@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2017-12-28Merge tag 'drm-intel-next-2017-12-22' of ↵Dave Airlie
git://anongit.freedesktop.org/drm/drm-intel into drm-next - Allow internal page allocation to fail (Chris) - More improvements on logs, dumps, and trace (Chris, Michal) - Coffee Lake important fix for stolen memory (Lucas) - Continue to make GPU reset more robust as well improving selftest coverage for it (Chris) - Unifying debugfs return codes (Michal) - Using existing helper for testing obj pages (Matthew) - Organize and improve gem_request tracepoints (Lionel) - Protect DDI port to DPLL map from theoretical race (Rodrigo) - ... and consequently fixing the indentation on this DDI clk selection function (Chris) - ... and consequently properly serializing non-blocking modesets (Ville) - Add support for horizontal plane flipping on Cannonlake (Joonas) - Two Cannonlake Workarounds for better stability (Rafael) - Fix mess around PSR registers (DK) - More Coffee Lake PCI IDs (Rodrigo) - Remove CSS modifiers on pipe C of Geminilake (Krisman) - Disable all planes for load detection (Ville) - Reorg on i915 display headers (Michal) - Avoid enabling movntdqa optimization on hypervisor guest (Changbin) GVT: - more mmio switch optimization (Weinan) - cleanup i915_reg_t vs. offset usage (Zhenyu) - move write protect handler out of mmio handler (Zhenyu) * tag 'drm-intel-next-2017-12-22' of git://anongit.freedesktop.org/drm/drm-intel: (55 commits) drm/i915: Update DRIVER_DATE to 20171222 drm/i915: Show HWSP in intel_engine_dump() drm/i915: Assert that the request is on the execution queue before being removed drm/i915/execlists: Show preemption progress in GEM_TRACE drm/i915: Put all non-blocking modesets onto an ordered wq drm/i915: Disable GMBUS clock gating around GMBUS transfers on gen9+ drm/i915: Clean up the PNV bit banging vs. GMBUS clock gating w/a drm/i915: No need to power up PG2 for GMBUS on BXT drm/i915: Disable DC states around GMBUS on GLK drm/i915: Do not enable movntdqa optimization in hypervisor guest drm/i915: Dump device info at once drm/i915: Add pretty printer for runtime part of intel_device_info drm/i915: Update intel_device_info_runtime_init() parameter drm/i915: Move intel_device_info definitions to its own header drm/i915: Move opregion definitions to dedicated intel_opregion.h drm/i915: Move display related definitions to dedicated header drm/i915: Move some utility functions to i915_util.h drm/i915/gvt: move write protect handler out of mmio emulation function drm/i915/gvt: cleanup usage for typed mmio reg vs. offset drm/i915/gvt: Fix pipe A enable as default for vgpu ...
2017-12-27drm/ttm: use an operation ctx for ttm_mem_global_alloc_pageRoger He
forward the operation context to ttm_mem_global_alloc_page as well, and the ultimate goal is swapout enablement for reserved BOs. Here reserved BOs refer to all the BOs which share same reservation object Reviewed-by: Christian König <christian.koenig@amd.com> Signed-off-by: Roger He <Hongbo.He@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2017-12-27drm/ttm: use an operation ctx for ttm_mem_global_allocRoger He
forward the operation context to ttm_mem_global_alloc as well, and the ultimate goal is swapout enablement for reserved BOs Reviewed-by: Thomas Hellstrom <thellstrom@vmware.com> Reviewed-by: Christian König <christian.koenig@amd.com> Signed-off-by: Roger He <Hongbo.He@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2017-12-27drm/ttm: call ttm_bo_swapout directly when ttm shrinkRoger He
remove the extra indirection because we have only one implementation anyway Reviewed-by: Christian König <christian.koenig@amd.com> Signed-off-by: Roger He <Hongbo.He@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2017-12-27drm/vmwgfx: remove the default io_mem_pfn setTan Xiaojun
The default interface situation has been taken into the framework, so remove the default set of each module. Signed-off-by: Tan Xiaojun <tanxiaojun@huawei.com> Reviewed-by: Christian König <christian.koenig@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2017-12-27drm/virtio: remove the default io_mem_pfn setTan Xiaojun
The default interface situation has been taken into the framework, so remove the default set of each module. Signed-off-by: Tan Xiaojun <tanxiaojun@huawei.com> Reviewed-by: Christian König <christian.koenig@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2017-12-27drm/radeon: remove the default io_mem_pfn setTan Xiaojun
The default interface situation has been taken into the framework, so remove the default set of each module. Signed-off-by: Tan Xiaojun <tanxiaojun@huawei.com> Reviewed-by: Christian König <christian.koenig@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2017-12-27drm/qxl: remove the default io_mem_pfn setTan Xiaojun
The default interface situation has been taken into the framework, so remove the default set of each module. Signed-off-by: Tan Xiaojun <tanxiaojun@huawei.com> Reviewed-by: Christian König <christian.koenig@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2017-12-27drm/nouveau: remove the default io_mem_pfn setTan Xiaojun
The default interface situation has been taken into the framework, so remove the default set of each module. Signed-off-by: Tan Xiaojun <tanxiaojun@huawei.com> Reviewed-by: Christian König <christian.koenig@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2017-12-27drm/mgag200: remove the default io_mem_pfn setTan Xiaojun
The default interface situation has been taken into the framework, so remove the default set of each module. Signed-off-by: Tan Xiaojun <tanxiaojun@huawei.com> Reviewed-by: Christian König <christian.koenig@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2017-12-27drm/cirrus: remove the default io_mem_pfn setTan Xiaojun
The default interface situation has been taken into the framework, so remove the default set of each module. Signed-off-by: Tan Xiaojun <tanxiaojun@huawei.com> Reviewed-by: Christian König <christian.koenig@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2017-12-27drm/bochs: remove the default io_mem_pfn setTan Xiaojun
The default interface situation has been taken into the framework, so remove the default set of each module. Signed-off-by: Tan Xiaojun <tanxiaojun@huawei.com> Reviewed-by: Christian König <christian.koenig@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2017-12-27drm/ast: remove the default io_mem_pfn setTan Xiaojun
The default interface situation has been taken into the framework, so remove the default set of each module. Signed-off-by: Tan Xiaojun <tanxiaojun@huawei.com> Reviewed-by: Christian König <christian.koenig@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2017-12-27drm/ttm: add ttm_bo_io_mem_pfn to check io_mem_pfnTan Xiaojun
The io_mem_pfn field was added in commit ea642c3216cb ("drm/ttm: add io_mem_pfn callback") and is called unconditionally. However, not all drivers were updated to set it. Use the ttm_bo_default_io_mem_pfn function if a driver did not set its own. And add new function ttm_bo_io_mem_pfn() as wrapper. Signed-off-by: Michal Srb <msrb@suse.com> Signed-off-by: Tan Xiaojun <tanxiaojun@huawei.com> Reviewed-by: Christian König <christian.koenig@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2017-12-27drm/amdgpu: fix VM faults with per VM BOsChristian König
There was a small window between unreserve and second reserve where the freshly allocated BO could have been evicted without the VM noticing it. Signed-off-by: Christian König <christian.koenig@amd.com> Reviewed-by: Chunming Zhou <david1.zhou@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2017-12-27drm/ttm: drop the spin in delayed delete if the trylock doesn't workChristian König
Thomas actually noticed that, but I didn't realized what he meant until now. Signed-off-by: Christian König <christian.koenig@amd.com> Reviewed-by: Roger He <Hongbo.He@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2017-12-27drm/amd/pp: Get and save CZ/ST smu versionRex Zhu
The smu firmware is loaded by the sbios on APUs, so query it from the smu and save the smu fw version info that is reported to userspace. Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Rex Zhu <Rex.Zhu@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2017-12-27drm/amdgpu: drop client_id from VMChristian König
Use the fence context from the scheduler entity. Signed-off-by: Christian König <christian.koenig@amd.com> Reviewed-by: Chunming Zhou <david1.zhou@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2017-12-27drm/amdgpu: rename vm_id to vmidChristian König
sed -i "s/vm_id/vmid/g" drivers/gpu/drm/amd/amdgpu/*.c sed -i "s/vm_id/vmid/g" drivers/gpu/drm/amd/amdgpu/*.h Signed-off-by: Christian König <christian.koenig@amd.com> Reviewed-by: Chunming Zhou <david1.zhou@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2017-12-27drm/amdgpu: separate VMID and PASID handlingChristian König
Move both into the new files amdgpu_ids.[ch]. No functional change. Signed-off-by: Christian König <christian.koenig@amd.com> Reviewed-by: Chunming Zhou <david1.zhou@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2017-12-23drm: fix tainted kernel caused by drm_panel_orientation_quirks.cDavid Lechner
drm_panel_orientation_quirks.c introduced in commit 404d1a3edc38 ("drm: Add panel orientation quirks, v6.") taints the kernel when compiled as a module. Fix this by adding MODULE_LICENSE(). Signed-off-by: David Lechner <david@lechnology.com> Reviewed-by: Hans de Goede <hdegoede@redhat.com> Signed-off-by: Hans de Goede <hdegoede@redhat.com> Link: https://patchwork.freedesktop.org/patch/msgid/1513881979-13801-1-git-send-email-david@lechnology.com
2017-12-22drm/i915: Update DRIVER_DATE to 20171222Rodrigo Vivi
Signed-off-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
2017-12-22drm/i915: Show HWSP in intel_engine_dump()Chris Wilson
Looking at a CI failure with an ominous line of [ 362.550715] hangcheck current seqno ffffff6b, last ffffff8c, hangcheck ffffff6b [6016 ms], inflight 118 with no apparent cause for the seqno to be negative, left me wondering if someone had scribbled over the HWSP. So include the HWSP in the engine dump to see if there are more signs of random scribbling. v2: Fix row pointer, i is now incremented by 8 so doesn't need scaling by 8, and we don't need to keep volatile here as the status_page isn't marked up as volatile itself. v3: Use hexdump, with suppression of identical lines. (Tvrtko) Which results in HWSP: 00000000 00000000 00000000 00000000 00000000 00000000 00000000 00000000 00000000 * 00000040 00000001 00000000 00000018 00000002 00000001 00000000 00000018 00000000 00000060 00000000 00000000 00000000 00000000 00000000 00000000 00000000 00000003 00000080 00000000 00000000 00000000 00000000 00000000 00000000 00000000 00000000 * 000000c0 00000002 00000000 00000000 00000000 00000000 00000000 00000000 00000000 000000e0 00000000 00000000 00000000 00000000 00000000 00000000 00000000 00000000 * instead of 128 lines of mostly 0s. v4: Tidy up the locals Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk> Cc: Tvrtko Ursulin <tvrtko.ursulin@intel.com> Cc: Mika Kuoppala <mika.kuoppala@linux.intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/20171222182521.18106-1-chris@chris-wilson.co.uk Reviewed-by: Tvrtko Ursulin <tvrtko.ursulin@intel.com>
2017-12-22drm/i915: Assert that the request is on the execution queue before being removedChris Wilson
We should only attempt to remove requests from the execution queue that are on the execution queue. These are the requests that have been assigned a global_seqno, so we can assert that we only attempt to remove requests with a nonzero global_seqno. Afterwards we assert that we remove them in order, i.e. the global_seqno matches the engine's seqno, but that leaves a small loophole for an unattached request on an unused engine. We can then make the same assertion on queuing the request to the execution engine, it must have a zero global_seqno or else we are queuing the same request twice. Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk> Cc: Tvrtko Ursulin <tvrtko.ursulin@intel.com> Cc: Michał Winiarski <michal.winiarski@intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/20171222141959.3006-1-chris@chris-wilson.co.uk Reviewed-by: Tvrtko Ursulin <tvrtko.ursulin@intel.com>
2017-12-22drm/i915/execlists: Show preemption progress in GEM_TRACEChris Wilson
We already emit a GEM_TRACE for when we start preemption, but we lack one to show when the preemption is completed and we return to the regular queue. This is to continue the investigation into the mysterious <0>[ 197.854177] <idle>-0 1..s1 197837017us : execlists_submission_tasklet: rcs0 cs-irq head=0 [0], tail=0 [0] <0>[ 197.854209] drv_self-6008 2.... 197837390us : reset_common_ring: rcs0 seqno=15515 <0>[ 197.854240] drv_self-6008 2.... 197837415us : reset_common_ring: bcs0 seqno=0 <0>[ 197.854270] drv_self-6008 2.... 197837443us : reset_common_ring: vcs0 seqno=0 <0>[ 197.854300] drv_self-6008 2.... 197837463us : reset_common_ring: vcs1 seqno=0 <0>[ 197.854330] drv_self-6008 2.... 197837482us : reset_common_ring: vecs0 seqno=0 <0>[ 197.854360] ksoftirq-23 2..s. 197838341us : execlists_submission_tasklet: bcs0 in[0]: ctx=0.1, seqno=1dce7 <0>[ 197.854392] <idle>-0 1..s1 197838347us : execlists_submission_tasklet: bcs0 cs-irq head=0 [0], tail=0 [0] <0>[ 197.854423] ksoftirq-23 2..s. 197838354us : execlists_submission_tasklet: vcs0 in[0]: ctx=0.1, seqno=1d027 <0>[ 197.854456] ksoftirq-23 2.Ns. 197838361us : execlists_submission_tasklet: vcs1 in[0]: ctx=0.1, seqno=1e738 <0>[ 197.854488] ksoftirq-23 2.Ns. 197838366us : execlists_submission_tasklet: vecs0 in[0]: ctx=0.1, seqno=235aa <0>[ 197.854520] ksoftirq-23 2.Ns. 197838376us : execlists_submission_tasklet: rcs0 in[0]: ctx=0.1, seqno=15518 <0>[ 197.854552] <idle>-0 1..s1 197853285us : execlists_submission_tasklet: rcs0 cs-irq head=0 [0], tail=7 [7] <0>[ 197.854584] <idle>-0 1..s1 197853285us : execlists_submission_tasklet: rcs0 csb[1]: status=0x00000018:0x00000000 <0>[ 197.854616] <idle>-0 1..s1 197853286us : execlists_submission_tasklet: rcs0 out[0]: ctx=0.0, seqno=0 Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk> Cc: Tvrtko Ursulin <tvrtko.ursulin@intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/20171222132742.4272-1-chris@chris-wilson.co.uk Reviewed-by: Tvrtko Ursulin <tvrtko.ursulin@intel.com>
2017-12-22Merge tag 'gvt-next-2017-12-22' of https://github.com/intel/gvt-linux into ↵Rodrigo Vivi
drm-intel-next-queued gvt-next-2017-12-22: - more mmio switch optimization (Weinan) - cleanup i915_reg_t vs. offset usage (Zhenyu) - move write protect handler out of mmio handler (Zhenyu) Signed-off-by: Rodrigo Vivi <rodrigo.vivi@intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/20171222085141.vgewlvvni37dljdt@zhen-hp.sh.intel.com
2017-12-22drm/i915: Put all non-blocking modesets onto an ordered wqVille Syrjälä
We have plenty of global registers and whatnot programmed without any further locking by the modeset code. Currently non-bocking modesets are allowed to execute in parallel which could corrupt said registers. To avoid the problem let's run all non-blocking modesets on an ordered workqueue. We still put page flips etc. to system_unbound_wq allowing page flips on one pipe to execute in parallel with page flips or a modeset on a another pipe (assuming no known state is shared between them, at which point they would have been added to the same atomic commit and serialized that way). Blocking modesets are already serialized with each other by connection_mutex, and thus are safe. To serialize them with non-blocking modesets we just flush the workqueue before executing blocking modesets. Cc: Daniel Vetter <daniel.vetter@ffwll.ch> Cc: Maarten Lankhorst <maarten.lankhorst@linux.intel.com> Fixes: 94f050246b42 ("drm/i915: nonblocking commit") Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/20171113133622.8593-1-ville.syrjala@linux.intel.com Acked-by: Daniel Vetter <daniel.vetter@ffwll.ch> Reviewed-by: Maarten Lankhorst <maarten.lankhorst@linux.intel.com>
2017-12-22drm/i915: Disable GMBUS clock gating around GMBUS transfers on gen9+Ville Syrjälä
Gen9+ need to disable GMBUS clock gating when doing multi part transfers. Otherwise clock gating will kick in when GMBUS is in the WAIT state and presumably that will corrupt the transfer. This is documented as Display WA #0868. Apparently older hardware doesn't allow clock gating in the WAIT state and thus are unaffected by this problem. v2: Limit the PCH w/a to gen9 and gen10 only (DK) Actually change it to check the PCH type instead since it's the PCH that actually contains the GMBUS hardware Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com> Reviewed-by: Dhinakaran Pandiyan <dhinakaran.pandiyan@intel.com> #v1 Link: https://patchwork.freedesktop.org/patch/msgid/20171221202432.17373-1-ville.syrjala@linux.intel.com
2017-12-22drm/i915: Clean up the PNV bit banging vs. GMBUS clock gating w/aVille Syrjälä
Give a proper name for the GMBUS clock gating disable bit on PNV, and rename intel_i2c_quirk_set() to pnv_gmbus_clock_gating() for clarity. Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/20171208213739.16388-3-ville.syrjala@linux.intel.com Reviewed-by: Chris Wilson <chris@chris-wilson.co.uk>
2017-12-22drm/i915: No need to power up PG2 for GMBUS on BXTVille Syrjälä
GMBUS lives in PG1, so no need to power up PG2. We do want to prevent the DMC from making a mess of things though, so add GMBUS to the DC off power well. Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/20171208213739.16388-2-ville.syrjala@linux.intel.com Reviewed-by: Dhinakaran Pandiyan <dhinakaran.pandiyan@intel.com>
2017-12-22drm/i915: Disable DC states around GMBUS on GLKVille Syrjälä
Prevent the DMC from destroying GMBUS transfers on GLK. GMBUS lives in PG1 so DC off is all we need. Cc: stable@vger.kernel.org Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/20171208213739.16388-1-ville.syrjala@linux.intel.com Reviewed-by: Dhinakaran Pandiyan <dhinakaran.pandiyan@intel.com>
generated by cgit (git 2.34.1) at 2025-09-19 11:05:25 +0000