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2018-09-26ARM: tegra: apalis_t30: drop unused mmc1/sd1 labelsMarcel Ziswiler
Drop unused mmc1/sd1 labels. Signed-off-by: Marcel Ziswiler <marcel.ziswiler@toradex.com> Signed-off-by: Thierry Reding <treding@nvidia.com>
2018-09-26ARM: tegra: apalis_t30: white-space/newline clean-upMarcel Ziswiler
White-space and newline clean-up. Signed-off-by: Marcel Ziswiler <marcel.ziswiler@toradex.com> Signed-off-by: Thierry Reding <treding@nvidia.com>
2018-09-26ARM: tegra: apalis_t30: drop unused cami2c labelMarcel Ziswiler
Drop unused cami2c label. Signed-off-by: Marcel Ziswiler <marcel.ziswiler@toradex.com> Signed-off-by: Thierry Reding <treding@nvidia.com>
2018-09-26ARM: tegra: apalis_t30: annotate uarts and move compatible to boardMarcel Ziswiler
Annotate UARTs and move the serial UART "nvidia,tegra30-hsuart" compatible definitions from the carrier board to the module level device trees. One could still override this in a custom carrier board device tree if required. Signed-off-by: Marcel Ziswiler <marcel.ziswiler@toradex.com> Signed-off-by: Thierry Reding <treding@nvidia.com>
2018-09-26ARM: tegra: apalis_t30: add missing regulatorsMarcel Ziswiler
Add missing regulators: - reg_module_3v3_audio being VDDA supply of SGTL5000 - VDDD supply of SGTL5000 actually being reg_1v8_vio - carrier board HDMI supply being reg_5v0 - carrier board reg_3v3 actually being backlight and panel power supply Signed-off-by: Marcel Ziswiler <marcel.ziswiler@toradex.com> Signed-off-by: Thierry Reding <treding@nvidia.com>
2018-09-26ARM: tegra: apalis_t30: regulator clean-upMarcel Ziswiler
Just cosmetic regulator clean-up. Signed-off-by: Marcel Ziswiler <marcel.ziswiler@toradex.com> Signed-off-by: Thierry Reding <treding@nvidia.com>
2018-09-26ARM: tegra: apalis_t30: reorder host1x/hdmi propertiesMarcel Ziswiler
Reorder Host1x/HDMI properties. Signed-off-by: Marcel Ziswiler <marcel.ziswiler@toradex.com> Signed-off-by: Thierry Reding <treding@nvidia.com>
2018-09-26ARM: tegra: apalis_t30: annotate/clean-up pcie controller/port nodesMarcel Ziswiler
Annotate PCIe port nodes and clean-up PCIe controller/port status' with respect to carrier board vs. module level device trees. As port 3 connects to the on-module Gigabit Ethernet MACPHY it is always enabled together with the PCIe controller itself. Signed-off-by: Marcel Ziswiler <marcel.ziswiler@toradex.com> Signed-off-by: Thierry Reding <treding@nvidia.com>
2018-09-26ARM: tegra: apalis_t30: reorder pcie propertiesMarcel Ziswiler
Reorder PCIe properties. Signed-off-by: Marcel Ziswiler <marcel.ziswiler@toradex.com> Signed-off-by: Thierry Reding <treding@nvidia.com>
2018-09-26ARM: tegra: apalis_t30: add local-mac-address propertyMarcel Ziswiler
Add empty local-mac-address property to be filled in by boot loader (e.g. U-Boot). Signed-off-by: Marcel Ziswiler <marcel.ziswiler@toradex.com> Signed-off-by: Thierry Reding <treding@nvidia.com>
2018-09-26ARM: tegra: apalis_t30: pull-up sd card detect pinsMarcel Ziswiler
In order to avoid any floating SD card detect pins as may e.g. happen on Ixora V1.1A pull them all up. Signed-off-by: Marcel Ziswiler <marcel.ziswiler@toradex.com> Signed-off-by: Thierry Reding <treding@nvidia.com>
2018-09-26ARM: tegra: apalis_t30: fix mmc1 cmd pull-upMarcel Ziswiler
Fix MMC1 cmd pin pull-up causing issues on carrier boards without external pull-up. Signed-off-by: Marcel Ziswiler <marcel.ziswiler@toradex.com> Signed-off-by: Thierry Reding <treding@nvidia.com>
2018-09-26ARM: dts: tegra20/tegra30: add pmu interrupt-affinityMarcel Ziswiler
This is similar to tegra124 and avoids the following being reported upon boot: hw perfevents: no interrupt-affinity property for /pmu, guessing. Signed-off-by: Marcel Ziswiler <marcel.ziswiler@toradex.com> Reviewed-by: Stefan Agner <stefan@agner.ch> Signed-off-by: Thierry Reding <treding@nvidia.com>
2018-09-26ARM: dts: tegra20: restore address orderMarcel Ziswiler
Commit 6c468f109884 ("ARM: dts: tegra: add Tegra20 NAND flash controller node") introduced the nand-controller node. However, it got added at the wrong spot not honoring the address order. Fix this. Signed-off-by: Marcel Ziswiler <marcel.ziswiler@toradex.com> Reviewed-by: Stefan Agner <stefan@agner.ch> Signed-off-by: Thierry Reding <treding@nvidia.com>
2018-09-26ARM: dts: tegra30: fix xcvr-setup-use-fusesMarcel Ziswiler
There was a dot instead of a comma. Fix this. Signed-off-by: Marcel Ziswiler <marcel.ziswiler@toradex.com> Signed-off-by: Thierry Reding <treding@nvidia.com>
2018-09-26arm64: tegra: I2C on Tegra194 is not compatible with Tegra114Thierry Reding
Tegra194 contains a version of the I2C controller that is no longer compatible with the version found in Tegra114. Signed-off-by: Thierry Reding <treding@nvidia.com>
2018-09-26ARM: dts: rockchip: add rk3288-based Tinker board SDavid Summers
Add the actual dts for the tinker board S, which brings its own emmc device, not therefore not requiring an sd-card to boot. Signed-off-by: David Summers <beagleboard@davidjohnsummers.uk> Signed-off-by: Heiko Stuebner <heiko@sntech.de>
2018-09-26ARM: dts: rockchip: move shared tinker-board nodes to a common dtsiDavid Summers
Tinker Board and Tinker Board S share most of their components, so should also not replicate these for each variant. So move them to a shared dtsi that then can get included by both boards. Signed-off-by: David Summers <beagleboard@davidjohnsummers.uk> Signed-off-by: Heiko Stuebner <heiko@sntech.de>
2018-09-26arm64: dts: marvell: armada-cp110: describe more PPv2 interruptsAntoine Tenart
This patch describes 3 additional interrupts per PPv2 port. Those interrupts will be used later in future versions of the Marvell PPv2 driver, and now the device tree description matches the hardware capabilities. Signed-off-by: Antoine Tenart <antoine.tenart@bootlin.com> Signed-off-by: Gregory CLEMENT <gregory.clement@bootlin.com>
2018-09-26arm64: dts: marvell: armada-cp110: change the PPv2 IRQ namesAntoine Tenart
This patch changes the PPv2 IRQ names in the CP110 device tree to match a corresponding change in the Marvell PPv2 driver. The reason this was updated is the IRQ where names after Tx/Rx interrupts, but this is not true and can be configured. A following patch will add more of them and the names wouldn't make sense. Signed-off-by: Antoine Tenart <antoine.tenart@bootlin.com> Signed-off-by: Gregory CLEMENT <gregory.clement@bootlin.com>
2018-09-26arm64: dts: add support for SolidRun Clearfog GT 8KBaruch Siach
The SolidRun Clearfog GT-8K is based on Marvell Armada 8040 SoC. https://wiki.solid-run.com/doku.php?id=products:a8040:clearfoggt8k The following devices were tested with this DT on top of kernel v4.19-rc4: * 1GB Ethernet WAN * 4 ports 1GB Ethernet switch (2.5GB uplink) * SFP port * SATA on CON3 PCIe slot * USB3 type A port * SD card and eMMC * 2 LEDs * 2 push buttons [gregory: fix block comment alignement] Signed-off-by: Baruch Siach <baruch@tkos.co.il> Signed-off-by: Gregory CLEMENT <gregory.clement@bootlin.com>
2018-09-26arm64: dts: rockchip: add missing address and size cells for rk3399 mipi dsiHeiko Stuebner
DSI controllers are also the hosts of their dsi bus and therefore contain nodes describing the attached panels with their reg properties containing the virtual ids. The dsi controller nodes on rk3399 lacked the #address-cells and #size-cells for these subnodes, so add them. Signed-off-by: Heiko Stuebner <heiko@sntech.de>
2018-09-26arm64: dts: rockchip: Enable SPI NOR flash on Rock64Chen-Yu Tsai
The Pine64 Rock64 board comes with a GigaDevice GD25Q128CSIG or GD25Q127CSIG chip, which is a 128 Mbit SPI NOR flash chip that supports the JEDEC read-ID command. This patch enables the SPI controller and adds a device node for the flash chip using the generic "jedec,spi-nor" comaptible. Signed-off-by: Chen-Yu Tsai <wens@csie.org> Signed-off-by: Heiko Stuebner <heiko@sntech.de>
2018-09-26arm64: dts: rockchip: add initial dts support for Rockpro64Akash Gajjar
Rockpro64 is a rockchip RK3399 based board from pine64.org. This patch adds basic device node support for Rockpro64 board and make it able to bring up. Peripheral Works - Sdcard - USB 2.0, 3.0 - Leds - Ethernet - Debug console Not working: - USB Type-C Signed-off-by: Akash Gajjar <Akash_Gajjar@mentor.com> Acked-by: Deepak Das <Deepak_Das@mentor.com> Reviewed-by: Rob Herring <robh@kernel.org> Signed-off-by: Heiko Stuebner <heiko@sntech.de>
2018-09-26arm64: dts: renesas: r8a77965: Add Sound and Audio DMAC device nodesTakeshi Kihara
Based on a similar patch of the R8A7796 device tree by Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>. Signed-off-by: Takeshi Kihara <takeshi.kihara.df@renesas.com> Signed-off-by: Yoshihiro Kaneko <ykaneko0929@gmail.com> Tested-by: Simon Horman <horms+renesas@verge.net.au> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2018-09-26ARM: dts: imx6qdl-zii-rdu2: Disable the internal RTCFabio Estevam
On the imx6qdl-zii-rdu2 board the RTC functionality is provided via a DS1341 RTC connected via I2C bus, so we can safely disable the internal one. Reported-by: Chris Healy <cphealy@gmail.com> Signed-off-by: Fabio Estevam <festevam@gmail.com> Reviewed-by: Lucas Stach <l.stach@pengutronix.de> Tested-by: Chris Healy <cphealy@gmail.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2018-09-26ARM: dts: imx51-zii-rdu1: Fix the rtc compatible stringFabio Estevam
According to Documentation/devicetree/bindings/rtc/rtc-ds1307.txt the original compatible "maxim,ds1341" is not a valid entry. Switch to the documented "dallas,ds1341" compatible. Reported-by: Chris Healy <cphealy@gmail.com> Signed-off-by: Fabio Estevam <festevam@gmail.com> Reviewed-by: Lucas Stach <l.stach@pengutronix.de> Tested-by: Chris Healy <cphealy@gmail.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2018-09-26arm64: dts: renesas: r8a77995: draak: Enable HDMI display outputUlrich Hecht
Adds LVDS decoder, HDMI encoder and connector for the Draak board. The LVDS0 and LVDS1 encoders can use the DU_DOTCLKIN0, DU_DOTCLKIN1 and EXTAL externals clocks. Two of them are provided to the SoC on the Draak board, hook them up in DT. Signed-off-by: Ulrich Hecht <uli+renesas@fpond.eu> Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com> Tested-by: Jacopo Mondi <jacopo+renesas@jmondi.org> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2018-09-26ARM: dts: imx6ul: use nvmem-cells for cpu speed gradingAnson Huang
On i.MX6UL, accessing OCOTP directly is wrong because the ocotp clock needs to be enabled first, so use the nvmem-cells binding instead. Signed-off-by: Anson Huang <Anson.Huang@nxp.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2018-09-26arm64: dts: renesas: r8a77990: ebisu: Enable VGA and HDMI outputsLaurent Pinchart
Add the LVDS decoder, HDMI encoder, VGA encoder and HDMI and VGA connectors, and wire up the display-related nodes with clocks, pinmux and regulators. The LVDS0 and LVDS1 encoders can use the DU_DOTCLKIN0, DU_DOTCLKIN1 and EXTAL externals clocks. Two of them are provided to the SoC on the Ebisu board, hook them up in DT. Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com> Tested-by: Jacopo Mondi <jacopo+renesas@jmondi.org> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2018-09-26arm64: dts: renesas: r8a77995: Add LVDS supportKieran Bingham
The r8a77995 D3 platform has 2 LVDS channels connected to the DU. Signed-off-by: Kieran Bingham <kieran.bingham+renesas@ideasonboard.com> [uli: moved lvds* into the soc node, added PM domains, resets] Signed-off-by: Ulrich Hecht <uli+renesas@fpond.eu> Reviewed-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com> Tested-by: Jacopo Mondi <jacopo+renesas@jmondi.org> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2018-09-26arm64: dts: meson-g12a: add initial g12a s905d2 SoC DT supportJianxin Pan
Try to add basic DT support for the Amlogic's Meson-G12A S905D2 SoC, which describe components as follows: Reserve Memory, CPU, GIC, IRQ, Timer, UART. It's capable of booting up into the serial console. Signed-off-by: Jianxin Pan <jianxin.pan@amlogic.com> Reviewed-by: Jerome Brunet <jbrunet@baylibre.com> Reviewed-by: Neil Armstrong <narmstrong@baylibre.com> Signed-off-by: Kevin Hilman <khilman@baylibre.com>
2018-09-26dt-bindings: arm: amlogic: Add Meson G12A bindingJianxin Pan
Introduce new bindings for the Meson G12A SoC Signed-off-by: Jianxin Pan <jianxin.pan@amlogic.com> Reviewed-by: Rob Herring <robh@kernel.org> Reviewed-by: Jerome Brunet <jbrunet@baylibre.com> Reviewed-by: Neil Armstrong <narmstrong@baylibre.com> Signed-off-by: Kevin Hilman <khilman@baylibre.com>
2018-09-26arm64: dts: fsl: Fix I2C and SPI bus warningsRob Herring
dtc has new checks for I2C and SPI buses. Fix the SPI bus node names and warnings in unit-addresses. arch/arm64/boot/dts/freescale/fsl-ls1046a-rdb.dtb: Warning (i2c_bus_reg): /soc/i2c@2180000/eeprom@57: I2C bus unit address format error, expected "53" arch/arm64/boot/dts/freescale/fsl-ls1046a-rdb.dtb: Warning (i2c_bus_reg): /soc/i2c@2180000/eeprom@56: I2C bus unit address format error, expected "52" Cc: Shawn Guo <shawnguo@kernel.org> Cc: Li Yang <leoyang.li@nxp.com> Signed-off-by: Rob Herring <robh@kernel.org> Acked-by: Li Yang <leoyang.li@nxp.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2018-09-26arm64: dts: renesas: r8a77990: Add display output supportLaurent Pinchart
The R8A77990 (E3) platform has one RGB output and two LVDS outputs connected to the DU. Add the DT nodes for the DU, LVDS encoders and supporting VSP and FCP. Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com> Tested-by: Jacopo Mondi <jacopo+renesas@jmondi.org> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2018-09-26ARM: dts: imx: Fix SPI bus warningsRob Herring
dtc has new checks for SPI buses. Fix the warnings in node names and unit-addresses. There's over 100 warnings for FSL boards, a few examples: arch/arm/boot/dts/imx28-duckbill-2-spi.dtb: Warning (spi_bus_bridge): /apb@80000000/apbh@80000000/ssp@80014000: node name for SPI buses should be 'spi' arch/arm/boot/dts/imx53-ppd.dtb: Warning (spi_bus_bridge): /soc/aips@50000000/spba@50000000/ecspi@50010000: node name for SPI buses should be 'spi' arch/arm/boot/dts/imx6dl-colibri-eval-v3.dtb: Warning (spi_bus_reg): /soc/aips-bus@2000000/spba-bus@2000000/spi@2014000/mcp251x@1: SPI bus unit address format error, expected "0" Cc: Shawn Guo <shawnguo@kernel.org> Cc: Sascha Hauer <s.hauer@pengutronix.de> Cc: Pengutronix Kernel Team <kernel@pengutronix.de> Cc: Fabio Estevam <fabio.estevam@nxp.com> Cc: NXP Linux Team <linux-imx@nxp.com> Cc: Li Yang <leoyang.li@nxp.com> Cc: Stefan Agner <stefan@agner.ch> Signed-off-by: Rob Herring <robh@kernel.org> Reviewed-by: Fabio Estevam <fabio.estevam@nxp.com> Acked-by: Stefan Agner <stefan@agner.ch> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2018-09-26ARM: dts: meson8b: odroidc1: add stdout-path propertyMartin Blumenstingl
To use the "earlycon" kernel command line parameter (without arguments) we need a stdout-path property under the /chosen node. Add this to make it easier to spot errors early in the boot process when looking for them. Signed-off-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com> Signed-off-by: Kevin Hilman <khilman@baylibre.com>
2018-09-26ARM: dts: meson8b: odroidc1: enable the SAR ADCMartin Blumenstingl
Odroid-C1 exposes ADC channels 0 and 1 on the GPIO headers. NOTE: Due to the SoC design these are limited to 1.8V (instead of 3.3V like all other pins). Enable the SAR ADC to enable voltage measurements on these pins. Signed-off-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com> Signed-off-by: Kevin Hilman <khilman@baylibre.com>
2018-09-26ARM: dts: meson8b: odroidc1: add the fixed voltage regulatorsMartin Blumenstingl
There are multiple fixed regulators on the Odroid-C1 board. Add them so they can be used when we add the devices that need them (SAR ADC needs the 1.8V IOREF, RTC needs VDD_RTC). These are: - P5V0 is the main 5V power input - VCC3V3 / VDDIO_AO3V3 / VDD3V3: fixed regulator with 3.3V output which is supplied by P5V0 - IOREF_1V8 / VCC1V8 / VDD1V8: fixed regulator with 1.8V output which is supplied by P5V0 - VDD_RTC: fixed voltage regulator with 0.9V output which is supplied by VDDIO_AO3V3 - DDR_VDDC / DDR3_1V5: fixed voltage regulator with 1.5V output which is supplied by P5V0 - the existing TF_IO and RFLASH_VDD_EN regulators are supplied by VDDIO_AO3V3 - the existing VCCK regulator is supplied by P5V0 This does not add the missing VDDEE regulator (controlled by PWM_D) because it's not clear yet how to configure the voltage of that regulator. Signed-off-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com> Signed-off-by: Kevin Hilman <khilman@baylibre.com>
2018-09-26ARM: dts: meson8b: odroidc1: add the CPU voltage regulatorMartin Blumenstingl
The CPU voltage regulator is a "Monolithic Power Systems MP2161" (according to the Odroid-C1+'s schematics). It is driven by PWM_C on GPIODV_9. Hardkernel's 3.10 kernel (based on the Amlogic GPL kernel sources) defines a PWM voltage table with the following values: - 0.86 volts = PWM register value 0x10f001b - (more values in 0.1 volt increments) - 1.14 volts = PWM register value 0x000012a When using the XTAL (24MHz) as input this translates into a PWM period of 12218ns with 0.86V using a duty cycle of 91% and 1.14V using a duty cycle of 0%. Signed-off-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com> Signed-off-by: Kevin Hilman <khilman@baylibre.com>
2018-09-26ARM: dts: meson8b: Add support for the Endless Mini (EC-100)Martin Blumenstingl
The Endless Mini (EC-100) is a grapefruit-sized computer based on the Amlogic Meson8b (S805) SoC which comes in two variants. Both variants have in common: - Amlogic Meson8b (S805) SoC - two USB 2.0 ports on the rear, one one the front (connected to the SoC through an internal hub) - 3.5mm Stereo out and MIC combo port - HDMI and CVBS output - 5V power supply (rated at 3A / 15W) - an internal embedded micro-controller (called "EC") which implements a "breathing" effect for the LED and allows shutting down (powering off) the whole device - 10/100 Mbit/s Ethernet using an IC Plus IP101A/G PHY (note: the website incorrectly lists a Gigabit Ethernet port) - the CPU voltage is regulated using a PWM regulator. The GPL sources of the EC-100 are using a PWM value of 0x1c0000 for 0.86V and a PWM value of 0x00001c for 1.14V. When using the XTAL (24MHz) as input this translates into a PWM period of 1148ns with 0.86V using a duty cycle of 100% and 1.14V using a duty cycle of 0%. The main differences are: - the main indicator for the variant is the RAM size: the "cheaper" variant has 1 GB of RAM, while the more expensive one comes with 2GB - the storage size differs: 24 GB vs 32 GB - the "1 GB RAM" variant has Ethernet connectivity only, while the "2 GB" variant has a Realtek RTL8723BS SDIO chip which adds 802.11b/g/n wifi and Bluetooth 4.0 support Signed-off-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com> Signed-off-by: Kevin Hilman <khilman@baylibre.com>
2018-09-26ARM: dts: meson8b: add the RMII pinsMartin Blumenstingl
Some boards use an RMII Ethernet PHY which requires fewer pins than the RGMII PHYs. Add a separate eth_rmii_pins node which does not include the pins which are only required for RGMII (but not for RMII) PHYs. Signed-off-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com> Signed-off-by: Kevin Hilman <khilman@baylibre.com>
2018-09-26ARM: dts: meson8b: add the I2C_A, PWM_C and UART_B pinsMartin Blumenstingl
These are used for example on the Endless Mini (EC-100): - I2C_A is connected to the Realtek RT5640 audio codec - PWM_C (GPIODV_9) is connected to a PWM regulator which is used for VCCK (CPU voltage supply) - UART_B is connected to the Bluetooth module (of the RTL8723BS SDIO wifi and Bluetooth combo chip) Signed-off-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com> Signed-off-by: Kevin Hilman <khilman@baylibre.com>
2018-09-26dt-bindings: arm: amlogic: Add the Endless Mobile Endless Mini (EC-100)Martin Blumenstingl
Add bindings documentation for the Endless Mini (EC-100) from Endless Mobile. Signed-off-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com> Reviewed-by: Rob Herring <robh@kernel.org> Signed-off-by: Kevin Hilman <khilman@baylibre.com>
2018-09-26dt-bindings: add vendor prefix for "Endless Mobile, Inc."Martin Blumenstingl
Endless Mobile, Inc. started selling (small) computers in 2015. Signed-off-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com> Reviewed-by: Rob Herring <robh@kernel.org> Signed-off-by: Kevin Hilman <khilman@baylibre.com>
2018-09-26ARM: dts: imx7: Update coresight binding for hardware portsSuzuki K Poulose
Switch to the updated coresight bindings. Cc: Sascha Hauer <s.hauer@pengutronix.de> Cc: Pengutronix Kernel Team <kernel@pengutronix.de> Cc: Fabio Estevam <fabio.estevam@nxp.com> Cc: Mathieu Poirier <mathieu.poirier@linaro.org> Signed-off-by: Suzuki K Poulose <suzuki.poulose@arm.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2018-09-26ARM: dts: vf610-zii-cfu1: Pass the 'no-sd' propertyFabio Estevam
Pass the 'no-sd' for esdhc0 controller as it is wired to eMMC. Signed-off-by: Fabio Estevam <festevam@gmail.com> Acked-by: Andrey Smirnov <andrew.smirnov@gmail.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2018-09-26ARM: dts: vf610-zii-cfu1: Pass the 'no-sdio' propertyFabio Estevam
No SDIO devices are connected to these ports, so pass the 'no-sdio' property. Signed-off-by: Fabio Estevam <festevam@gmail.com> Acked-by: Andrey Smirnov <andrew.smirnov@gmail.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2018-09-26ARM: dts: imx51-zii-scu2-mezz: Disable the internal watchdogFabio Estevam
imx51-zii-scu2-mezz has an external watchdog in the environment microcontroller, so disable the internal one. Signed-off-by: Fabio Estevam <festevam@gmail.com> Acked-by: Andrey Smirnov <andrew.smirnov@gmail.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2018-09-26ARM: dts: imx51-zii-scu2-mezz: Disable VPUFabio Estevam
imx51-zii-scu2-mezz does not have any video encoding/decoding needs, so disable the VPU. Signed-off-by: Fabio Estevam <festevam@gmail.com> Acked-by: Andrey Smirnov <andrew.smirnov@gmail.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
generated by cgit (git 2.34.1) at 2025-09-26 09:06:11 +0000