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2018-09-12arm64: dts: meson: libretech: update board modelJerome Brunet
There is actually several different libretech board with the CC suffix so the model name is not appropriate here. Update to something more specific Reported-by: Da Xue <da@lessconfused.com> Signed-off-by: Jerome Brunet <jbrunet@baylibre.com> Signed-off-by: Kevin Hilman <khilman@baylibre.com>
2018-09-12arm64: dts: meson-gx: increase default shared CMA pool sizeChristian Hewitt
Devices using the new V4L2 mem2mem vdec require a larger CMA pool. As nearly all GX* devices are video/media focused and will use it, set a larger (256MB) default value. Signed-off-by: Christian Hewitt <christianshewitt@gmail.com> Signed-off-by: Kevin Hilman <khilman@baylibre.com>
2018-09-12arm64: dts: meson-axg: sort nodes consistentlyJerome Brunet
Sort DT nodes by address when possible, by node node name otherwise. Signed-off-by: Jerome Brunet <jbrunet@baylibre.com> Signed-off-by: Kevin Hilman <khilman@baylibre.com>
2018-09-12arm64: dts: allwinner: h6: add system controller device tree nodeIcenowy Zheng
As we have already binding for the H6 system controller, add its node to the device tree. Signed-off-by: Icenowy Zheng <icenowy@aosc.io> [fixed compatible string] Signed-off-by: Jernej Skrabec <jernej.skrabec@siol.net> Reviewed-by: Chen-Yu Tsai <wens@csie.org> Signed-off-by: Chen-Yu Tsai <wens@csie.org>
2018-09-12ARM: dts: at91: sama5d4: add labels to soc dtsi for derivative boardsEugen Hristev
This adds labels to commonly used device-tree nodes so that derivative boards can avoid ahb/apb hierarchy. Signed-off-by: Eugen Hristev <eugen.hristev@microchip.com> Acked-by: Ludovic Desroches <ludovic.desroches@microchip.com> Signed-off-by: Alexandre Belloni <alexandre.belloni@bootlin.com>
2018-09-12dt-bindings: arm: Document RZ/G2E SoC DT bindingsFabrizio Castro
Add device tree bindings documentation for Renesas RZ/G2E (r8a774c0) SoC. Signed-off-by: Fabrizio Castro <fabrizio.castro@bp.renesas.com> Reviewed-by: Biju Das <biju.das@bp.renesas.com> Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2018-09-12ARM: dts: imx6ul: Add DTS for ConnectCore 6UL SBC ProAlex Gonzalez
The ConnectCore 6UL Single Board Computer (SBC) Pro contains the ConnectCore 6UL System-On-Module. Its hardware specifications are: * 256MB DDR3 memory * On module 256MB NAND flash * Dual 10/100 Ethernet * USB Host and USB OTG * Parallel RGB display header * LVDS display header * CSI camera * GPIO header * I2C, SPI, CAN headers * PCIe mini card and micro SIM slot * MicroSD external storage * On board 4GB eMMC flash * Audio headphone, line in/out, microphone lines Signed-off-by: Alex Gonzalez <alex.gonzalez@digi.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2018-09-12ARM: dts: imx6: RIoTboard provide standby on power off optionOleksij Rempel
This board, as well as some other boards with i.MX6 and a PMIC, uses a "PMIC_STBY_REQ" line to notify the PMIC about a state change. The PMIC is programmed for a specific state change before triggering the line. In this case, PMIC_STBY_REQ can be used for stand by, sleep and power off modes. Signed-off-by: Oleksij Rempel <o.rempel@pengutronix.de> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2018-09-12dt-bindings: imx6q-clock: add new fsl,pmic-stby-poweroff propertyOleksij Rempel
Signed-off-by: Oleksij Rempel <o.rempel@pengutronix.de> Acked-by: Rob Herring <robh@kernel.org> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2018-09-11arm64: dts: renesas: r8a779{7|8}0: move CAN clock nodeSergei Shtylyov
The CAN clock node should precede the "cpus" node in the R8A779{7|8}0 device trees, according to the alphanumeric node sorting rule... Signed-off-by: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com> Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2018-09-11arm64: dts: renesas: r8a77980: move IPMMU nodesSergei Shtylyov
The IPMMU nodes should follow the GEther node, not the CAN-FD node, according to the <unit-address> part of the startng IPMMU-DS1 node. While moving the nodes, also do sort them by label alphanumerically... Signed-off-by: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2018-09-11arm64: dts: renesas: r8a77990: Enable PWM for Ebisu boardYoshihiro Shimoda
This patch adds PWM device nodes and enables PWM3 and PWM5 for R-Car E3 Ebisu board. These devices are used for backlight control. Signed-off-by: Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com> Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2018-09-11arm64: dts: renesas: r8a77980: add Cortex-A53 PMU supportSergei Shtylyov
Describe the performance monitor unit (PMU) for the Cortex-A53 cores in the R8A77980 SoC's device tree. Based on the original (and large) patch by Vladimir Barinov. Signed-off-by: Vladimir Barinov <vladimir.barinov@cogentembedded.com> Signed-off-by: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com> Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2018-09-11arm64: dts: juno: Enable coresight tmc scatter gather in ETRSuzuki K Poulose
We do not enable scatter-gather mode in the TMC-ETR by default to prevent malfunctioning of systems where the ETR may not be properly connected to the memory subsystem to allow for simultaneous READ/WRITE transactions when used in SG mode. Instead we whitelist the platforms where we know that it is safe to use the mode. All revisions of Juno have a proper ETR connection and hence white list them. Cc: Mathieu Poirier <mathieu.poirier@linaro.org> Cc: Mike Leach <mike.leach@linaro.org> Cc: Liviu Dudau <liviu.dudau@arm.com> Cc: Lorenzo Pierlisi <lorenzo.pieralisi@arm.com> Signed-off-by: Suzuki K Poulose <suzuki.poulose@arm.com> Signed-off-by: Sudeep Holla <sudeep.holla@arm.com>
2018-09-11ARM: dts: sun8i-a33: Add Video Engine and reserved memory nodesPaul Kocialkowski
This adds nodes for the Video Engine and the associated reserved memory for the A33. Up to 96 MiB of memory are dedicated to the CMA pool. The VPU can only map the first 256 MiB of DRAM, so the reserved memory pool has to be located in that area. Following Allwinner's decision in downstream software, the last 96 MiB of the first 256 MiB of RAM are reserved for this purpose. Signed-off-by: Paul Kocialkowski <paul.kocialkowski@bootlin.com> Acked-by: Maxime Ripard <maxime.ripard@bootlin.com> Signed-off-by: Maxime Ripard <maxime.ripard@bootlin.com>
2018-09-11ARM: dts: sun7i-a20: Add Video Engine and reserved memory nodesPaul Kocialkowski
This adds nodes for the Video Engine and the associated reserved memory for the A20. Up to 96 MiB of memory are dedicated to the CMA pool. The VPU can only map the first 256 MiB of DRAM, so the reserved memory pool has to be located in that area. Following Allwinner's decision in downstream software, the last 96 MiB of the first 256 MiB of RAM are reserved for this purpose. Signed-off-by: Paul Kocialkowski <paul.kocialkowski@bootlin.com> Acked-by: Maxime Ripard <maxime.ripard@bootlin.com> Signed-off-by: Maxime Ripard <maxime.ripard@bootlin.com>
2018-09-11ARM: dts: sun5i: Add Video Engine and reserved memory nodesPaul Kocialkowski
This adds nodes for the Video Engine and the associated reserved memory for sun5i-based platforms. Up to 96 MiB of memory are dedicated to the CMA pool. The VPU can only map the first 256 MiB of DRAM, so the reserved memory pool has to be located in that area. Following Allwinner's decision in downstream software, the last 96 MiB of the first 256 MiB of RAM are reserved for this purpose. Signed-off-by: Paul Kocialkowski <paul.kocialkowski@bootlin.com> Acked-by: Maxime Ripard <maxime.ripard@bootlin.com> Signed-off-by: Maxime Ripard <maxime.ripard@bootlin.com>
2018-09-10arm64: dts: rockchip: Add type-c port supply on rk3399-sapphire boardVicente Bergas
Add the gpio-controlled regulator and add the supply to the otg-port of phy0. Signed-off-by: Vicente Bergas <vicencb@gmail.com> Signed-off-by: Heiko Stuebner <heiko@sntech.de>
2018-09-10ARM: s3c24xx: Correct SD card write protect detection on Mini2440Cedric Roux
The mini2440 computer uses "active high" to signal that the "write protect" of the inserted MMC is set. The current code uses the opposite, leading to a wrong detection of write protection. The solution is simply to use ".wprotect_invert = 1" in the description of the MMC. Signed-off-by: Cedric Roux <sed@free.fr> Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org>
2018-09-10ARM: s3c24xx: Consistently use tab for indenting member assignmentsKrzysztof Kozlowski
Code was mixing spaces and tabs for indenting members in structures. Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org>
2018-09-10ARM: s3c24xx: formatting cleanup in mach-mini2440.cCedric Roux
Running: scripts/checkpatch.pl -f arch/arm/mach-s3c24xx/mach-mini2440.c revealed several errors and warnings. They were all removed, except one which is an #if 0 around the declaration of a gpio pin. This needs some more investigation and I prefer to let it here. This is not some dead code. 'printk' was replaced by 'pr_info'. Signed-off-by: Cedric Roux <sed@free.fr> Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org>
2018-09-10ARM: dts: exynos: Add external SD card support for Trats boardMarek Szyprowski
Enable support for SDHCI controller number 2 and add required regulator for external SD card. Signed-off-by: Marek Szyprowski <m.szyprowski@samsung.com> Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org>
2018-09-10ARM: dts: exynos: Disable pull control for PMIC IRQ line on Artik5 boardMarek Szyprowski
S2MPS14 PMIC interrupt line on Exynos3250-based Artik5 evaluation board has external pull-up resistors, so disable any pull control for it in controller node. This fixes support for S2MPS14 PMIC interrupts and enables operation of wakeup from S2MPS14 RTC alarm. Signed-off-by: Marek Szyprowski <m.szyprowski@samsung.com> Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org>
2018-09-10arm64: dts: rockchip: fix vcc_host1_5v pin assign on rk3328-rock64Katsuhiro Suzuki
This patch fixes pin assign of vcc_host1_5v. This regulator is controlled by USB20_HOST_DRV signal. ROCK64 schematic says that GPIO0_A2 pin is used as USB20_HOST_DRV. GPIO0_D3 pin is for SPDIF_TX_M0. Signed-off-by: Katsuhiro Suzuki <katsuhiro@katsuster.net> Signed-off-by: Heiko Stuebner <heiko@sntech.de>
2018-09-10arm64: dts: rockchip: add WiFi module support for Firefly-RK3399Shohei Maruyama
This commit adds WiFi module support for the Firefly-RK3399. Signed-off-by: Shohei Maruyama <cheat.sc.linux@outlook.com> Signed-off-by: Heiko Stuebner <heiko@sntech.de>
2018-09-10arm64: dts: rockchip: remove dvs2 pinctrl from pmic on rk3399-sapphireVicente Bergas
On the board DVS2 is disabled and not connected, see schematic, page 16. Signed-off-by: Vicente Bergas <vicencb@gmail.com> Signed-off-by: Heiko Stuebner <heiko@sntech.de>
2018-09-10arm64: dts: rockchip: Fix VCC5V0_HOST_EN on rk3399-sapphireVicente Bergas
The pin is GPIO4-D1 not GPIO1-D1, see schematic, page 15 for reference. Signed-off-by: Vicente Bergas <vicencb@gmail.com> Signed-off-by: Heiko Stuebner <heiko@sntech.de>
2018-09-10arm64: dts: rockchip: re-order vcc_sys on rk3399-sapphireVicente Bergas
Fix alphabetical order. Signed-off-by: Vicente Bergas <vicencb@gmail.com> Signed-off-by: Heiko Stuebner <heiko@sntech.de>
2018-09-10arm64: dts: juno: Update entries to match latest coresight bindingsSuzuki K Poulose
Switch to updated coresight bindings for Juno platforms. Cc: Liviu Dudau <liviu.dudau@arm.com> Acked-by: Liviu Dudau <liviu.dudau@arm.com> Acked-by: Rob Herring <robh@kernel.org> Signed-off-by: Suzuki K Poulose <suzuki.poulose@arm.com> [sudeep.holla: minor modifications to patch title] Signed-off-by: Sudeep Holla <sudeep.holla@arm.com>
2018-09-10ARM: dts: imx6q-apalis: mux RESET_MOCI# signalStefan Agner
The pinctrl properties on the IOMUXC node get overwritten by the carrier board level device tree, hence the pinctrl_reset_moci pinctrl does not get applied. Associate the pinctrl_reset_moci pinctrl with the PCIe node where we also make use of the pin as a reset GPIO. Since the pin is muxed as a GPIO by default not muxing it explicitly worked fine in practise. Signed-off-by: Stefan Agner <stefan@agner.ch> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2018-09-10ARM: dts: imx6ul: Enable the PMU nodeFabio Estevam
There is no need to keep the PMU disabled. Enable it like it is done in the other i.MX dtsi files. With this change applied we see: [ 1.338866] hw perfevents: enabled with armv7_cortex_a7 PMU driver, 5 counters available Signed-off-by: Fabio Estevam <fabio.estevam@nxp.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2018-09-10ARM: dts: imx6qdl-sabreauto: add egalax touch screen supportAnson Huang
Add egalax touch screen support on i2c2 bus. Signed-off-by: Anson Huang <Anson.Huang@nxp.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2018-09-10ARM: dts: imx6qdl-sabreauto: add gpio keys supportAnson Huang
Add i.MX6QDL SabreAuto board's gpio keys support, there are 5 gpio keys on base board: SW3: KEY_HOME; SW4: KEY_BACK; SW5: KEY_PROGRAM; SW6: KEY_VOLUMEUP; SW7: KEY_VOLUMEDOWN; Signed-off-by: Anson Huang <Anson.Huang@nxp.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2018-09-10ARM: dts: vf610-zii-dev-rev-c: add support for one SFF moduleRussell King
The board typically has 2 populated SFF interfaces. The mv88e6xxx driver currently supports SFF modules connected to ports 9 and 10 of the mv88e6390. Add support for sff2, which is connected to port 9. Signed-off-by: Russell King <rmk+kernel@armlinux.org.uk> Signed-off-by: Andrew Lunn <andrew@lunn.ch> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2018-09-10ARM: dts: vf610-zii-cfu1: Add SFF interface to switchAndrew Lunn
The switch has an SFF attached to port 5. Add the SFF device, the pinmux for its GPIOs, and list the port in the switch configuration. Signed-off-by: Andrew Lunn <andrew@lunn.ch> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2018-09-09ARM: dts: imx6ull: update iomux headerAnson Huang
Update i.MX6ULL iomux header according to latest reference manual Rev.1, 11/2017. Signed-off-by: Anson Huang <Anson.Huang@nxp.com> Reviewed-by: Sébastien Szymanski <sebastien.szymanski@armadeus.com> Reviewed-by: Rob Herring <robh@kernel.org> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2018-09-07ARM: dts: am571x-idk: Add Industrial input load triggerAndrew F. Davis
The SN65HVS882 load trigger is attached to GPIO2_23 on the AM571x IDK. Signed-off-by: Andrew F. Davis <afd@ti.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
2018-09-07ARM: dts: am572x-idk: Add tricolor Industrial LED supportAndrew F. Davis
AM572x-IDK rev 1.3A has tricolor RGB LEDs that can be controlled using GPIO. Expose these to userspace for usage as necessary. Signed-off-by: Andrew F. Davis <afd@ti.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
2018-09-07ARM: dts: am571x-idk: Add tricolor Industrial LED supportAndrew F. Davis
AM571x-IDK rev 1.2A has tricolor RGB LEDs that can be controlled using GPIO. Expose these to userspace for usage as necessary. Signed-off-by: Andrew F. Davis <afd@ti.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
2018-09-07ARM: dts: omap3-gta04a5one: define GTA04A5 variant with OneNANDH. Nikolaus Schaller
GTA04A5 has been produced with MCP chips either with 512MB RAM + 512MB NAND 512MB RAM + 1024MB NAND 1024MB RAM + 512MB OneNAND RAM setup is done by U-Boot (MLO/SPL) but OneNAND needs a different setup of the GPMC. So we need to derive a DTB variant that modifies the gpmc and nand setup. Signed-off-by: H. Nikolaus Schaller <hns@goldelico.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
2018-09-07ARM: dts: omap3-gta04a5: define pinmux for bluetooth enable of ti,wl1837 moduleH. Nikolaus Schaller
Properly pinmux the bluetooth enable so that it is not floating. Signed-off-by: H. Nikolaus Schaller <hns@goldelico.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
2018-09-07ARM: dts: omap3-gta04a5: uses different sensors than gta04a4H. Nikolaus Schaller
Sensors for acceleration, rotation, magnetic heading and barometer have been replaced in the A5 variant. Signed-off-by: H. Nikolaus Schaller <hns@goldelico.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
2018-09-07ARM: dts: omap3-gta04a5: add support for ti,wl1837 moduleH. Nikolaus Schaller
GTA04A5 uses a ti,wl1837 WiFi/Bluetooth module. Overwrite the mmc2 node and child. Signed-off-by: H. Nikolaus Schaller <hns@goldelico.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
2018-09-07ARM: dts: omap3-gta04a5: disable IrDA receiver to save powerH. Nikolaus Schaller
The GTA04A5 has an improved IrDA circuit that can enable/disable the receiver individually. We do not have an IrDA driver/subsystem and hence the receiver should be actively turned off to save power, especially in suspend. Signed-off-by: H. Nikolaus Schaller <hns@goldelico.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
2018-09-07ARM: dts: omap3-gta04a5: add support for PPSH. Nikolaus Schaller
GPS receiver provides a 1PPS signal to a gpio. Signed-off-by: H. Nikolaus Schaller <hns@goldelico.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
2018-09-07ARM: dts: omap3-gta04a5: fix whitepsace and tab styleH. Nikolaus Schaller
in node sound / property ti,jack-det-gpio. Signed-off-by: H. Nikolaus Schaller <hns@goldelico.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
2018-09-07ARM: dts: omap3-gta04a5: fix model nameH. Nikolaus Schaller
GTA04 is the project name and Letux 2804 the product name. Report both. Signed-off-by: H. Nikolaus Schaller <hns@goldelico.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
2018-09-07ARM: dts: omap3-gta04a5: fix copyright of A5 variantH. Nikolaus Schaller
Signed-off-by: H. Nikolaus Schaller <hns@goldelico.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
2018-09-07ARM: dts: omap3-gta04a4: fix model name for A4 variantH. Nikolaus Schaller
GTA04 is the project name and Letux 2804 the product name. Report both. Signed-off-by: H. Nikolaus Schaller <hns@goldelico.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
2018-09-07ARM: dts: omap3-gta04a3: fix model name for A3 variantH. Nikolaus Schaller
GTA04 is the project name and Letux 2804 the product name. Report both. Signed-off-by: H. Nikolaus Schaller <hns@goldelico.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
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