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2018-05-04ARM: dts: tegra30: Add IOMMU nodes to Host1x and its clientsDmitry Osipenko
Enable IOMMU support for Host1x and its clients. Signed-off-by: Dmitry Osipenko <digetx@gmail.com> Signed-off-by: Thierry Reding <treding@nvidia.com>
2018-05-04arm64: allwinner: h6: add PCF8563 RTC on Pine H64 boardIcenowy Zheng
Pine H64 board has a PCF8563 dedicated RTC connected to its R_I2C bus. Enable the R_I2C bus and add the RTC to the device tree. Signed-off-by: Icenowy Zheng <icenowy@aosc.io> Signed-off-by: Maxime Ripard <maxime.ripard@bootlin.com>
2018-05-04arm64: allwinner: h6: add R_I2C controllerIcenowy Zheng
Allwinner H6 SoC has a R_I2C controller wired to the PL0/PL1 pins, which are used in the reference design to connect AXP805 PMIC. Add support for it. Signed-off-by: Icenowy Zheng <icenowy@aosc.io> Signed-off-by: Maxime Ripard <maxime.ripard@bootlin.com>
2018-05-04arm64: allwinner: h6: add R_INTC interrupt controllerIcenowy Zheng
Allwinner H6 SoC has also a R_INTC interrupt controller like Allwinner A64 SoC, but has its base address changed due to the memory map change in H6. Add it into the device tree. Signed-off-by: Icenowy Zheng <icenowy@aosc.io> Signed-off-by: Maxime Ripard <maxime.ripard@bootlin.com>
2018-05-04arm64: allwinner: h6: add node for R_PIO pin controllerIcenowy Zheng
Allwinner H6 SoC has a R_PIO pin controller which controls PL and PM GPIO banks. Add support for it. Signed-off-by: Icenowy Zheng <icenowy@aosc.io> Signed-off-by: Maxime Ripard <maxime.ripard@bootlin.com>
2018-05-04arm64: allwinner: h6: add PRCM CCU device nodeIcenowy Zheng
Allwinner H6 has also a PRCM CCU. Add its device node into the device tree. Signed-off-by: Icenowy Zheng <icenowy@aosc.io> Signed-off-by: Maxime Ripard <maxime.ripard@bootlin.com>
2018-05-04dm mirror: remove VLA usageKees Cook
On the quest to remove all VLAs from the kernel[1], this avoids VLAs in dm-raid1.c by just using the maximum size for the stack arrays. The nr_mirrors value was already capped at 9, so this makes it a trivial adjustment to the array sizes. [1] https://lkml.org/lkml/2018/3/7/621 Signed-off-by: Kees Cook <keescook@chromium.org> Acked-by: Heinz Mauelshagen <heinzm@redhat.com> Signed-off-by: Mike Snitzer <snitzer@redhat.com>
2018-05-04MAINTAINERS & files: Canonize the e-mails I use at filesMauro Carvalho Chehab
From now on, I'll start using my @kernel.org as my development e-mail. As such, let's remove the entries that point to the old mchehab@s-opensource.com at MAINTAINERS file. For the files written with a copyright with mchehab@s-opensource, let's keep Samsung on their names, using mchehab+samsung@kernel.org, in order to keep pointing to my employer, with sponsors the work. For the files written before I join Samsung (on July, 4 2013), let's just use mchehab@kernel.org. For bug reports, we can simply point to just kernel.org, as this will reach my mchehab+samsung inbox anyway. Signed-off-by: Mauro Carvalho Chehab <mchehab@s-opensource.com> Signed-off-by: Brian Warner <brian.warner@samsung.com> Signed-off-by: Mauro Carvalho Chehab <mchehab+samsung@kernel.org>
2018-05-04media: imx-media-csi: Fix inconsistent IS_ERR and PTR_ERRFrom: Gustavo A. R. Silva
Fix inconsistent IS_ERR and PTR_ERR in imx_csi_probe. The proper pointer to be passed as argument is pinctrl instead of priv->vdev. This issue was detected with the help of Coccinelle. Fixes: 52e17089d185 ("media: imx: Don't initialize vars that won't be used") Signed-off-by: Gustavo A. R. Silva <gustavo@embeddedor.com> Signed-off-by: Fabio Estevam <fabio.estevam@nxp.com> Reviewed-by: Philipp Zabel <p.zabel@pengutronix.de> Tested-by: Philipp Zabel <p.zabel@pengutronix.de> Signed-off-by: Hans Verkuil <hans.verkuil@cisco.com> Signed-off-by: Mauro Carvalho Chehab <mchehab@s-opensource.com>
2018-05-04tools: power/acpi, revert to LD = gccJiri Slaby
Commit 7ed1c1901fe5 (tools: fix cross-compile var clobbering) removed setting of LD to $(CROSS_COMPILE)gcc. This broke build of acpica (acpidump) in power/acpi: ld: unrecognized option '-D_LINUX' The tools pass CFLAGS to the linker (incl. -D_LINUX), so revert this particular change and let LD be $(CC) again. Note that the old behaviour was a bit different, it used $(CROSS_COMPILE)gcc which was eliminated by the commit 7ed1c1901fe5. We use $(CC) for that reason. Fixes: 7ed1c1901fe5 (tools: fix cross-compile var clobbering) Signed-off-by: Jiri Slaby <jslaby@suse.cz> Cc: 4.16+ <stable@vger.kernel.org> # 4.16+ Signed-off-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com>
2018-05-04ARM: ux500: Drop the U8540 device treesLinus Walleij
The U8540 was an evolved version of the U8500, but it was never mass produced or put into products, only reference designs exist. The upstream support was never completed and it is unlikely that this will happen so drop the support for now to simplify maintenance of the U8500. Cc: Loic Pallardy <loic.pallardy@st.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2018-05-04ARM: dts: Ux500: Fix "debounce-interval" property misspellingGeert Uytterhoeven
"debounce_interval" was never supported. Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> Cc: Linus Walleij <linus.walleij@linaro.org> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2018-05-04mtd: rawnand: marvell: fix command xtype in BCH write hookMiquel Raynal
One layout supported by the Marvell NAND controller supports NAND pages of 2048 bytes, all handled in one single chunk when using BCH with a strength of 4-bit per 512 bytes. In this case, instead of the generic XTYPE_WRITE_DISPATCH/XTYPE_LAST_NAKED_RW couple, the controller expects to receive XTYPE_MONOLITHIC_RW. This fixes problems at boot like: [ 1.315475] Scanning device for bad blocks [ 3.203108] marvell-nfc f10d0000.flash: Timeout waiting for RB signal [ 3.209564] nand_bbt: error while writing BBT block -110 [ 4.243106] marvell-nfc f10d0000.flash: Timeout waiting for RB signal [ 5.283106] marvell-nfc f10d0000.flash: Timeout waiting for RB signal [ 5.289562] nand_bbt: error -110 while marking block 2047 bad [ 6.323106] marvell-nfc f10d0000.flash: Timeout waiting for RB signal [ 6.329559] nand_bbt: error while writing BBT block -110 [ 7.363106] marvell-nfc f10d0000.flash: Timeout waiting for RB signal [ 8.403105] marvell-nfc f10d0000.flash: Timeout waiting for RB signal [ 8.409559] nand_bbt: error -110 while marking block 2046 bad ... Fixes: 02f26ecf8c772 ("mtd: nand: add reworked Marvell NAND controller driver") Cc: stable@vger.kernel.org Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com> Tested-by: Chris Packham <chris.packham@alliedtelesis.co.nz> Signed-off-by: Boris Brezillon <boris.brezillon@bootlin.com>
2018-05-04mtd: rawnand: marvell: pass ms delay to wait_opChris Packham
marvell_nfc_wait_op() expects the delay to be expressed in milliseconds but nand_sdr_timings uses picoseconds. Use PSEC_TO_MSEC when passing tPROG_max to marvell_nfc_wait_op(). Fixes: 02f26ecf8c772 ("mtd: nand: add reworked Marvell NAND controller driver") Cc: stable@vger.kernel.org Signed-off-by: Chris Packham <chris.packham@alliedtelesis.co.nz> Reviewed-by: Miquel Raynal <miquel.raynal@bootlin.com> Signed-off-by: Boris Brezillon <boris.brezillon@bootlin.com>
2018-05-04ARM: dts: stm32: update pwm-cells for LPTimer on stm32h743Fabrice Gasnier
LPTimer pwm cells should be updated to 3, to allow initialization of channel, period and polarity. Signed-off-by: Fabrice Gasnier <fabrice.gasnier@st.com> Signed-off-by: Alexandre Torgue <alexandre.torgue@st.com>
2018-05-04ARM: dts: stm32: Add I2C1 support for stm32h743i-eval BoardPierre-Yves MORDRET
Add I2C1 support for stm32h743i-eval Board Signed-off-by: Pierre-Yves MORDRET <pierre-yves.mordret@st.com> Signed-off-by: Alexandre Torgue <alexandre.torgue@st.com>
2018-05-04ARM: dts: stm32: Add I2C support for STM32H743 SoCPierre-Yves MORDRET
Add I2C support for STM32H743 SoC Signed-off-by: Pierre-Yves MORDRET <pierre-yves.mordret@st.com> Signed-off-by: Alexandre Torgue <alexandre.torgue@st.com>
2018-05-04ARM: dts: stm32: Add I2C1 support for stm32f746-disco BoardPierre-Yves MORDRET
Add I2C1 support for stm32f746-disco Board Signed-off-by: Pierre-Yves MORDRET <pierre-yves.mordret@st.com> Signed-off-by: Alexandre Torgue <alexandre.torgue@st.com>
2018-05-04ARM: dts: stm32: Add I2C1 support for stm32f769-disco BoardPierre-Yves MORDRET
Add I2C1 support for stm32f769-disco Board Signed-off-by: Pierre-Yves MORDRET <pierre-yves.mordret@st.com> Signed-off-by: Alexandre Torgue <alexandre.torgue@st.com>
2018-05-04ARM: dts: stm32: Append additional I2Cs for STM32F746 SoCPierre-Yves MORDRET
Append 3 additional I2C instance for STM32F746 SoC. Signed-off-by: Pierre-Yves MORDRET <pierre-yves.mordret@st.com> Signed-off-by: Alexandre Torgue <alexandre.torgue@st.com>
2018-05-04ARM: dts: stm32: Add display support on stm32f469-discoPhilippe CORNU
Add display support on the stm32f469-disco board. Signed-off-by: Philippe Cornu <philippe.cornu@st.com> Signed-off-by: Alexandre Torgue <alexandre.torgue@st.com>
2018-05-04ARM: dts: stm32: Add new stm32f469 dtsi file with mipi dsiPhilippe Cornu
In the stm32f4 family, mipi dsi is only supported on stm32f469. So add a new stm32f469 dtsi file & add mipi dsi support inside. Signed-off-by: Philippe Cornu <philippe.cornu@st.com> Signed-off-by: Alexandre Torgue <alexandre.torgue@st.com>
2018-05-04ARM: dts: stm32: Use gpio bindings in stm32f469-discoPhilippe Cornu
Use gpio bindings for vcc5v_otg. Signed-off-by: Philippe Cornu <philippe.cornu@st.com> Signed-off-by: Alexandre Torgue <alexandre.torgue@st.com>
2018-05-04ARM: dts: stm32: Fix IRQ_TYPE_NONE warnings on stm32mp157cAlexandre Torgue
Since commit 83a86fbb5b56 ("irqchip/gic: Loudly complain about the use of IRQ_TYPE_NONE"), a warning is raised if IRQ_TYPE_NONE is used. So we use IRQ_TYPE_LEVEL_HIGH for usart nodes instead of IRQ_TYPE_NONE. Signed-off-by: Alexandre Torgue <alexandre.torgue@st.com> Tested-by: Fabrice Gasnier <fabrice.gasnier@st.com>
2018-05-04ARM: dts: stm32: Fix DTC warnings for stm32mp157Alexandre Torgue
Fix DTC warnings for stm32mp157: Warning (unit_address_vs_reg): /soc/pin-controller: node has a reg or ranges property, but no unit name Warning (unit_address_vs_reg): /soc/pin-controller/uart4@0: node has a unit name, but no reg property Warning (unit_address_vs_reg): /soc/pin-controller-z: node has a reg or ranges property, but no unit name Warning (unit_address_vs_reg): /memory: node has a reg or ranges property, but no unit name Signed-off-by: Alexandre Torgue <alexandre.torgue@st.com>
2018-05-04ARM: dts: stm32: add flash nor support on stm32mp157c eval boardLudovic Barre
This patch adds flash nor on qspi. Each flash is connected in quad mode and has its own chip select. Signed-off-by: Ludovic Barre <ludovic.barre@st.com> Signed-off-by: Alexandre Torgue <alexandre.torgue@st.com>
2018-05-04ARM: dts: stm32: add qspi support for stm32mp157cLudovic Barre
This patch adds qspi support on stm32mp157c, read in memory mapped, write in indirect mode. Signed-off-by: Ludovic Barre <ludovic.barre@st.com> Signed-off-by: Alexandre Torgue <alexandre.torgue@st.com>
2018-05-04ARM: dts: stm32: add cec support on stm32mp157c-ev1yannick fertre
This patch enables cec node on stm32mp157c-ev1 board Signed-off-by: Yannick Fertre <yannick.fertre@st.com> Signed-off-by: Alexandre Torgue <alexandre.torgue@st.com>
2018-05-04ARM: dts: stm32: add cec pins to stm32mp157cyannick fertre
This patch adds cec support on stm32mp157c eval board. Signed-off-by: Yannick Fertre <yannick.fertre@st.com> Signed-off-by: Alexandre Torgue <alexandre.torgue@st.com>
2018-05-04ARM: dts: stm32: add cec support on stm32mp157cyannick fertre
Add cec support on stm32mp157c Signed-off-by: yannick fertre <yannick.fertre@st.com> Signed-off-by: Alexandre Torgue <alexandre.torgue@st.com>
2018-05-04ARM: dts: stm32: add USB Host (USBH) support to stm32mp157cAmelie Delaunay
Add support for USBH (USB Host) to STM32MP157C SoC. USBH is a USB Host controller supporting the standard registers used for full- and low-speed (OHCI controller) and high-speed (EHCI controller). Signed-off-by: Amelie Delaunay <amelie.delaunay@st.com>
2018-05-04ARM: dts: stm32: enable USBPHYC on stm32mp157c-ev1Amelie Delaunay
This patch enables USBPHYC (USB PHY Controller) on stm32mp157c-ev1. This enables the two usbphyc usb2 ports. Signed-off-by: Amelie Delaunay <amelie.delaunay@st.com> Signed-off-by: Alexandre Torgue <alexandre.torgue@st.com>
2018-05-04ARM: dts: stm32: add supplies to usbphyc ports on stm32mp157c-ed1Amelie Delaunay
USBPHYC ports require 3 supplies: 3v3, 1v1 and 1v8. This patch adds the corresponding properties to usbphyc ports on stm32mp157c-ed1 board. Signed-off-by: Amelie Delaunay <amelie.delaunay@st.com> Signed-off-by: Alexandre Torgue <alexandre.torgue@st.com>
2018-05-04ARM: dts: stm32: add USBPHYC support to stm32mp157cAmelie Delaunay
Add support for USBPHYC (USB PHY Controller) to STM32MP157C SoC. It manages two usb2 ports. Signed-off-by: Amelie Delaunay <amelie.delaunay@st.com> Signed-off-by: Alexandre Torgue <alexandre.torgue@st.com>
2018-05-04ARM: dts: stm32: add dsi support on stm32mp157cyannick fertre
Add dsi support on stm32mp157c Signed-off-by: yannick fertre <yannick.fertre@st.com> Signed-off-by: Alexandre Torgue <alexandre.torgue@st.com>
2018-05-04ARM: dts: stm32: add ltdc support on stm32mp157cyannick fertre
Add support for the display controller ltdc. Signed-off-by: yannick fertre <yannick.fertre@st.com> Signed-off-by: Alexandre Torgue <alexandre.torgue@st.com>
2018-05-04ARM: dts: stm32: Add I2C2/5 support for STM32MP157C-EV1Pierre-Yves MORDRET
Add I2C1/5 support for STM32MP157C evaluation daughter on evaluation mother board. Signed-off-by: Pierre-Yves MORDRET <pierre-yves.mordret@st.com> Signed-off-by: Alexandre Torgue <alexandre.torgue@st.com>
2018-05-04ARM: dts: stm32: Add I2C4 support for STM32MP157C-ED1Pierre-Yves MORDRET
Add I2C4 support for STM32MP157C evaluation daughter. Required for PMIC. Signed-off-by: Pierre-Yves MORDRET <pierre-yves.mordret@st.com> Signed-off-by: Alexandre Torgue <alexandre.torgue@st.com>
2018-05-04ARM: dts: stm32: Add I2Cs pins used on STM32MP157CPierre-Yves MORDRET
This patch adds pins groups for I2C1,2,4 & 5 Signed-off-by: Pierre-Yves MORDRET <pierre-yves.mordret@st.com> Signed-off-by: Alexandre Torgue <alexandre.torgue@st.com>
2018-05-04ARM: dts: stm32: Add STM32F7 I2C support for STM32MP157C SoCPierre-Yves MORDRET
This patch adds all STM32F7 I2C instances for STM32MP157C SoC. Signed-off-by: Pierre-Yves MORDRET <pierre-yves.mordret@st.com> Signed-off-by: Alexandre Torgue <alexandre.torgue@st.com>
2018-05-04ARM: dts: stm32: Add CRC support on stm32mp157cLionel Debieve
This patch add CRC instance of the stm32mp157c SoC Signed-off-by: Lionel Debieve <lionel.debieve@st.com> Signed-off-by: Alexandre Torgue <alexandre.torgue@st.com>
2018-05-04ARM: dts: stm32: Add CRYP support on stm32mp157cLionel Debieve
This patch add CRYP instance of the stm32mp157c SoC Signed-off-by: Lionel Debieve <lionel.debieve@st.com> Signed-off-by: Alexandre Torgue <alexandre.torgue@st.com>
2018-05-04ARM: dts: stm32: Enable RNG for stm32mp157c-ed1Lionel Debieve
Enable stm32-hwrng for ed1 and ev1 boards Signed-off-by: Lionel Debieve <lionel.debieve@st.com> Signed-off-by: Alexandre Torgue <alexandre.torgue@st.com>
2018-05-04ARM: dts: stm32: Add RNG support on stm32mp157cLionel Debieve
This patch add RNG instance of the stm32mp157c SoC Signed-off-by: Lionel Debieve <lionel.debieve@st.com> Signed-off-by: Alexandre Torgue <alexandre.torgue@st.com>
2018-05-04ARM: dts: stm32: Add MDMA support on STM32MP157CPierre-Yves MORDRET
Activate MDMA for STM32MP157C Signed-off-by: Pierre-Yves MORDRET <pierre-yves.mordret@st.com> Signed-off-by: Alexandre Torgue <alexandre.torgue@st.com>
2018-05-04ARM: dts: stm32: Add DMAMUX support on STM32MP157CPierre-Yves MORDRET
Activate DMAMUX for STM32MP157C Signed-off-by: Pierre-Yves MORDRET <pierre-yves.mordret@st.com> Signed-off-by: Alexandre Torgue <alexandre.torgue@st.com>
2018-05-04ARM: dts: stm32: Add DMAv2 support on STM32MP157CPierre-Yves MORDRET
Activate DMAv2 for STM32MP157C Signed-off-by: Pierre-Yves MORDRET <pierre-yves.mordret@st.com> Signed-off-by: Alexandre Torgue <alexandre.torgue@st.com>
2018-05-04arm64: dts: ls208xa-rdb: Pass unit name to SPI flash nodeFabio Estevam
Pass unit name to SPI flash node to match its 'reg' value and also avoid the following DTC warnings: arch/arm64/boot/dts/freescale/fsl-ls2080a-rdb.dtb: Warning (unit_address_vs_reg): /soc/dspi@2100000/n25q512a: node has a reg or ranges property, but no unit name arch/arm64/boot/dts/freescale/fsl-ls2088a-rdb.dtb: Warning (unit_address_vs_reg): /soc/dspi@2100000/n25q512a: node has a reg or ranges property, but no unit name Signed-off-by: Fabio Estevam <fabio.estevam@nxp.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2018-05-04sched/core: Introduce set_special_state()Peter Zijlstra
Gaurav reported a perceived problem with TASK_PARKED, which turned out to be a broken wait-loop pattern in __kthread_parkme(), but the reported issue can (and does) in fact happen for states that do not do condition based sleeps. When the 'current->state = TASK_RUNNING' store of a previous (concurrent) try_to_wake_up() collides with the setting of a 'special' sleep state, we can loose the sleep state. Normal condition based wait-loops are immune to this problem, but for sleep states that are not condition based are subject to this problem. There already is a fix for TASK_DEAD. Abstract that and also apply it to TASK_STOPPED and TASK_TRACED, both of which are also without condition based wait-loop. Reported-by: Gaurav Kohli <gkohli@codeaurora.org> Signed-off-by: Peter Zijlstra (Intel) <peterz@infradead.org> Reviewed-by: Oleg Nesterov <oleg@redhat.com> Cc: Linus Torvalds <torvalds@linux-foundation.org> Cc: Peter Zijlstra <peterz@infradead.org> Cc: Thomas Gleixner <tglx@linutronix.de> Signed-off-by: Ingo Molnar <mingo@kernel.org>
2018-05-03Merge tag 'linux-kselftest-4.17-rc4' of ↵Linus Torvalds
git://git.kernel.org/pub/scm/linux/kernel/git/shuah/linux-kselftest Pull kselftest fixes from Shuah Khan: "This Kselftest update for 4.17-rc4 consists of a fix for a syntax error in the script that runs selftests. Mathieu Desnoyers found this bug in the script on systems running GNU Make 3.8 or older" * tag 'linux-kselftest-4.17-rc4' of git://git.kernel.org/pub/scm/linux/kernel/git/shuah/linux-kselftest: selftests: Fix lib.mk run_tests target shell script