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2013-06-27drm/radeon/kms: add accessors for RCU indirect spaceAlex Deucher
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2013-06-27drm/radeon: add current KB pci idsAlex Deucher
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2013-06-27drm/radeon: add current Bonaire PCI idsAlex Deucher
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2013-06-27drm/radeon: add cik tile mode array queryAlex Deucher
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2013-06-27drm/radeon: add radeon_asic struct for CIK (v12)Alex Deucher
v2: fix up for latest reset changes v3: use CP for pt updates for now v4: update for 2 level PTs v5: update for ib_parse removal v6: vm_flush api change v7: rebase v8: fix gfx ring function pointers v9: fix vm_set_page function params v10: update for compute changes v11: cleanup for release v12: update rptr/wptr callbacks Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2013-06-27drm/radeon/cik: add support for golden register initAlex Deucher
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2013-06-27drm/radeon/cik: add support for compute interruptsAlex Deucher
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2013-06-27drm/radeon: fix up ring functions for compute ringsAlex Deucher
The compute rings use RELEASE_MEM rather then EOP packets for writing fences and there is no SYNC_PFP_ME packet on the compute rings. Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2013-06-27drm/radeon/cik: switch to type3 nop packet for compute rings (v2)Alex Deucher
Type 2 packets are deprecated on CIK MEC and we should use type 3 nop packets. Setting the count field to the max value (0x3fff) indicates that only one dword should be skipped like a type 2 packet. v2: add comment to code Signed-off-by: Alex Deucher <alexander.deucher@amd.com> Reviewed-by: Jerome Glisse <jglisse@redhat.com>
2013-06-27drm/radeon/cik: Add support for compute queues (v4)Alex Deucher
On CIK, the compute rings work slightly differently than on previous asics, however the basic concepts are the same. The main differences: - New MEC engines for compute queues - Multiple queues per MEC: - CI/KB: 1 MEC, 4 pipes per MEC, 8 queues per pipe = 32 queues - KV: 2 MEC, 4 pipes per MEC, 8 queues per pipe = 64 queues - Queues can be allocated and scheduled by another queue - New doorbell aperture allows you to assign space in the aperture for the wptr which allows for userspace access to queues v2: add wptr shadow, fix eop setup v3: fix comment v4: switch to new callback method Signed-off-by: Alex Deucher <alexander.deucher@amd.com> Reviewed-by: Jerome Glisse <jglisse@redhat.com>
2013-06-27drm/radeon: implement simple doorbell page allocatorAlex Deucher
The doorbell aperture is a PCI BAR whose pages can be mapped to compute resources for things like wptrs for userspace queues. This patch maps the BAR and sets up a simple allocator to allocate pages from the BAR. Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2013-06-27drm/radeon: use callbacks for ring pointer handling (v3)Alex Deucher
Add callbacks to the radeon_asic struct to handle rptr/wptr fetchs and wptr updates. We currently use one version for all rings, but this allows us to override with a ring specific versions. Needed for compute rings on CIK. v2: udpate as per Christian's comments v3: fix some rebase cruft Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2013-06-27mmc: core: Update the ext-csd.rev check for eMMC5.1Yuvaraj Kumar C D
With the new eMMC5.1 spec, there is a new EXT_CSD register with the revision number(EXT_CSD_REV) 7. This patch updates the check for ext-csd.rev number as 7. Signed-off-by: Alim Akhtar <alim.akhtar@samsung.com> Signed-off-by: Yuvaraj Kumar C D <yuvaraj.cd@samsung.com> Reviewed-by: Doug Anderson <dianders@chromium.org> Signed-off-by: Chris Ball <cjb@laptop.org>
2013-06-27mmc: sdhci-sirf: let device core setup the default pin configurationBarry Song
With device core now able to setup the default pin configuration, the call to devm_pinctrl_get_select_default can be removed. And the pin configuration code based on the deprecated Samsung specific gpio bindings is also removed. Acked-by: Linus Walleij <linus.walleij@linaro.org> Signed-off-by: Barry Song <Baohua.Song@csr.com> Signed-off-by: Chris Ball <cjb@laptop.org>
2013-06-27mmc: mvsdio: use standard MMC device-tree binding parser mmc_of_parse()Simon Baatz
Instead of parsing the DT binding on our own, use the standard parser mmc_of_parse(), introduced by commit 6c56e7a. Signed-off-by: Simon Baatz <gmbnomis@gmail.com> Tested-by: Andrew Lunn <andrew@lunn.ch> Signed-off-by: Chris Ball <cjb@laptop.org>
2013-06-27mmc: tegra: handle mmc_of_parse() errors during probeSimon Baatz
Signed-off-by: Simon Baatz <gmbnomis@gmail.com> Tested-by: Stephen Warren <swarren@nvidia.com> Signed-off-by: Chris Ball <cjb@laptop.org>
2013-06-27mmc: sdhci-pxav3: handle mmc_of_parse() errors during probeSimon Baatz
Signed-off-by: Simon Baatz <gmbnomis@gmail.com> Signed-off-by: Chris Ball <cjb@laptop.org>
2013-06-27mmc: mxcmmc: handle mmc_of_parse() errors during probeSimon Baatz
Signed-off-by: Simon Baatz <gmbnomis@gmail.com> Signed-off-by: Chris Ball <cjb@laptop.org>
2013-06-27mmc: tmio-mmc: handle mmc_of_parse() errors during probeSimon Baatz
Signed-off-by: Simon Baatz <gmbnomis@gmail.com> Acked-by: Guennadi Liakhovetski <g.liakhovetski@gmx.de> Signed-off-by: Chris Ball <cjb@laptop.org>
2013-06-27mmc: sh_mmcif: handle mmc_of_parse() errors during probeSimon Baatz
Signed-off-by: Simon Baatz <gmbnomis@gmail.com> Acked-by: Guennadi Liakhovetski <g.liakhovetski@gmx.de> Signed-off-by: Chris Ball <cjb@laptop.org>
2013-06-27mmc: return mmc_of_parse() errors to callerSimon Baatz
In addition to just logging errors encountered during DT parsing or allocating GPIO slots for CD/WP, mmc_of_parse() now returns with an error. In particular, this is needed if the GPIO allocation may return EPROBE_DEFER. Signed-off-by: Simon Baatz <gmbnomis@gmail.com> Reviewed-by: Ulf Hansson <ulf.hansson@linaro.org> Signed-off-by: Chris Ball <cjb@laptop.org>
2013-06-27mmc: jz4740: Use clk_prepare_enable/clk_disable_unprepareLars-Peter Clausen
In preparation to switching the jz4740 clk driver to the common clk framework, update the clk enable/disable calls to clk_prepare_enable/clk_disable_unprepare. Signed-off-by: Lars-Peter Clausen <lars@metafoo.de> Signed-off-by: Chris Ball <cjb@laptop.org>
2013-06-27can: at91_can: Use of_match_ptr()Sachin Kamat
of_match_ptr() eliminates having an #ifdef returning NULL for the case when OF is disabled. Signed-off-by: Sachin Kamat <sachin.kamat@linaro.org> Signed-off-by: Marc Kleine-Budde <mkl@pengutronix.de>
2013-06-27ARM: imx: flexcan: Remove platform fileFabio Estevam
As there are no more users of the flexcan platform file, let's remove it. Cc: Sascha Hauer <s.hauer@pengutronix.de> Acked-by: Shawn Guo <shawn.guo@linaro.org> Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com> Signed-off-by: Marc Kleine-Budde <mkl@pengutronix.de>
2013-06-27can: flexcan: Use a regulator to control the CAN transceiverFabio Estevam
Instead of using a GPIO to turn on/off the CAN transceiver, it is better to use a regulator as some systems may use a PMIC to power the CAN transceiver. Acked-by: Shawn Guo <shawn.guo@linaro.org> Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com> Signed-off-by: Marc Kleine-Budde <mkl@pengutronix.de>
2013-06-27ARM: imx: prepare for removal of flexcan_platform_dataMarc Kleine-Budde
As there are no imx in-tree users of flexcan_platform_data, this patch removes the possibility to register a flexcan device with platform data. The functionality to swith on/off CAN transceivers is added to DT via regulators in a later patch. Compile time tested with imx_v4_v5_defconfig and imx_v6_v7_defconfig. Acked-by: Shawn Guo <shawn.guo@linaro.org> Acked-by: Sascha Hauer <s.hauer@pengutronix.de> Signed-off-by: Marc Kleine-Budde <mkl@pengutronix.de>
2013-06-27Merge tag 'davinci-for-v3.11/dt' of ↵Arnd Bergmann
git://git.kernel.org/pub/scm/linux/kernel/git/nsekhar/linux-davinci into next/late From Sekhar Nori: Device Tree updates for DaVinci This patch set updates da850 DTS files to enable use of C pre-processor. Also updates pinctrl-single DT data to go with changes done in that module to enable a single register to service configuration of multiple pins. * tag 'davinci-for-v3.11/dt' of git://git.kernel.org/pub/scm/linux/kernel/git/nsekhar/linux-davinci: ARM: davinci: da850: adopt to pinctrl-single change for configuring multiple pins ARM: davinci: da850: Use #include for all device trees Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2013-06-27ALSA: pci: trivial: replace numeric with standard PM state macrosYijing Wang
Use standard PM state macros PCI_Dx instead of numeric 0/1/2.. Signed-off-by: Yijing Wang <wangyijing@huawei.com> Signed-off-by: Takashi Iwai <tiwai@suse.de>
2013-06-27Merge tag 'at91-fixes' of git://github.com/at91linux/linux-at91 into ↵Arnd Bergmann
next/fixes-non-critical From Nicolas Ferre: Several fixes for: - external irq on non-DT boards - cpuidle code in some circumstances - PMC code in relation with PLLB/PLL_UTMI/USB: mainly for SAMA5D3 and AT91SAM9N12 * tag 'at91-fixes' of git://github.com/at91linux/linux-at91: ARM: at91/PMC: use at91_usb_rate() for UTMI PLL ARM: at91/PMC: fix at91sam9n12 USB FS init ARM: at91/PMC: at91sam9n12 family has a PLLB ARM: at91/PMC: sama5d3 family doesn't have a PLLB ARM: at91: cpuidle: Fix target_residency ARM: at91: fix at91_extern_irq usage for non-dt boards Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2013-06-27ARM: ux500: bail out on alien cpusLinus Walleij
This makes the l2x0 initialization fail gracefully on non-ux500 systems. Signed-off-by: Linus Walleij <linus.walleij@linaro.org> Signed-off-by: Olof Johansson <olof@lixom.net>
2013-06-27rbd: send snapshot context with writesJosh Durgin
Sending the right snapshot context with each write is required for snapshots to work. Due to the ordering of calls, the snapshot context is never set for any requests. This causes writes to the current version of the image to be reflected in all snapshots, which are supposed to be read-only. This happens because rbd_osd_req_format_write() sets the snapshot context based on obj_request->img_request. At this point, however, obj_request->img_request has not been set yet, to the snapshot context is set to NULL. Fix this by moving rbd_img_obj_request_add(), which sets obj_request->img_request, before the osd request formatting calls. This resolves: http://tracker.ceph.com/issues/5465 Reported-by: Karol Jurak <karol.jurak@gmail.com> Signed-off-by: Josh Durgin <josh.durgin@inktank.com> Reviewed-by: Sage Weil <sage@inktank.com> Reviewed-by: Alex Elder <elder@linaro.org>
2013-06-27metag: tz1090: select and instantiate pinctrl-tz1090-pdcJames Hogan
Select PINCTRL_TZ1090_PDC from SOC_TZ1090 to enable the PDC pin controller driver once it is merged, and instantiate it from tz1090.dtsi. Signed-off-by: James Hogan <james.hogan@imgtec.com> Acked-by: Linus Walleij <linus.walleij@linaro.org> Acked-by: Grant Likely <grant.likely@linaro.org>
2013-06-27metag: tz1090: select and instantiate pinctrl-tz1090James Hogan
Select PINCTRL and PINCTRL_TZ1090 from SOC_TZ1090 to enable the main pin controller driver once it is merged, and instantiate it from tz1090.dtsi. Signed-off-by: James Hogan <james.hogan@imgtec.com> Acked-by: Linus Walleij <linus.walleij@linaro.org> Acked-by: Grant Likely <grant.likely@linaro.org>
2013-06-27metag: don't check for cache aliasing on smp cpu bootJames Hogan
The cache configuration of the boot cpu is now duplicated to secondary cpus, so there's no need to check for cache aliasing again when a secondary cpu is booted. Therefore remove the check from secondary_start_kernel(). Signed-off-by: James Hogan <james.hogan@imgtec.com>
2013-06-27metag: panic if cache aliasing possibleJames Hogan
If the cache and page size configuration allows for cache aliasing to occur we warn on boot, but the log messages are easy to miss and will result is random crashes occuring in userland. Let's panic too in this case so that the user immediately knows they need to fix the cache configuration or configured page size. Also fix the warning messages which display the cache and page sizes to include newlines, and add the word "Potential" since an actual cache alias hasn't been detected. Signed-off-by: James Hogan <james.hogan@imgtec.com>
2013-06-27metag: *.dts: include using preprocessorJames Hogan
Include *.dtsi files from *.dts using the preprocessor to set a good example for future device tree files. Files included in the old way don't get pre-processed. Signed-off-by: James Hogan <james.hogan@imgtec.com> Acked-by: Grant Likely <grant.likely@linaro.org> Cc: devicetree-discuss@lists.ozlabs.org
2013-06-27metag: add <dt-bindings/> symlinkJames Hogan
Add symlink to include/dt-bindings from arch/metag/boot/dts/include/ to match the one in arch/arm/... (see the commit below) so that preprocessed device tree files can include various useful constant definitions. Commit c58299aa87544a590c62bda0bf52b69fa56cb8d5 ("kbuild: create an "include chroot" for DT bindings") merged in v3.10-rc1. Signed-off-by: James Hogan <james.hogan@imgtec.com> Acked-by: Grant Likely <grant.likely@linaro.org> Reviewed-by: Stephen Warren <swarren@nvidia.com> Cc: Michal Marek <mmarek@suse.cz> Cc: Shawn Guo <shawn.guo@linaro.org> Cc: Rob Herring <rob.herring@calxeda.com> Cc: linux-kbuild@vger.kernel.org Cc: devicetree-discuss@lists.ozlabs.org
2013-06-27Merge tag 'renesas-sh-sci-for-v3.11' of ↵Arnd Bergmann
git://git.kernel.org/pub/scm/linux/kernel/git/horms/renesas into next/late Renesas sh-sci updates for v3.11 HSCIF support by Ulrich Hecht. * tag 'renesas-sh-sci-for-v3.11' of git://git.kernel.org/pub/scm/linux/kernel/git/horms/renesas: serial: sh-sci: Initialise variables before access in sci_set_termios() ARM: shmobile: r8a7790: don't use external clock for SCIFs ARM: shmobile: r8a7790: HSCIF support serial: sh-sci: HSCIF support Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2013-06-27Merge branch 'renesas/boards2' into next/lateArnd Bergmann
Conflicts: arch/arm/mach-shmobile/setup-r8a7778.c This is a dependency for the Renesas sh-sci updates. Signedf-off-by: Arnd Bergmann <arnd@arndb.de>
2013-06-27ARM: integrator: let pciv3 use mem/premem from device treeLinus Walleij
Instead of relying on the hard-coded mem/premem bases for the PCI side, read in these from the device tree in the DT probe path. Hard-code the old values on the non-DT probe path. Introduce some static locals to hold these addresses instead of the earlier static #defines. Reported-by: Arnd Bergmann <arnd@arndb.de> Signed-off-by: Linus Walleij <linus.walleij@linaro.org> Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2013-06-27ARM: integrator: set local side PCI addresses rightLinus Walleij
This alters the local side address of the iospace to zero, non prefetchable memory local side address to 0x00000000 and prefetchable memory local side address to 0x10000000, so as to match the values actually poked in by the driver. Reported-by: Arnd Bergmann <arnd@arndb.de> Signed-off-by: Linus Walleij <linus.walleij@linaro.org> Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2013-06-27Merge git://git.linaro.org/people/cdall/linux-kvm-arm.git tags/kvm-arm-3.11 ↵Gleb Natapov
into queue KVM/ARM pull request for 3.11 merge window * tag 'kvm-arm-3.11' of git://git.linaro.org/people/cdall/linux-kvm-arm.git: ARM: kvm: don't include drivers/virtio/Kconfig Update MAINTAINERS: KVM/ARM work now funded by Linaro arm/kvm: Cleanup KVM_ARM_MAX_VCPUS logic ARM: KVM: clear exclusive monitor on all exception returns ARM: KVM: add missing dsb before invalidating Stage-2 TLBs ARM: KVM: perform save/restore of PAR ARM: KVM: get rid of S2_PGD_SIZE ARM: KVM: don't special case PC when doing an MMIO ARM: KVM: use phys_addr_t instead of unsigned long long for HYP PGDs ARM: KVM: remove dead prototype for __kvm_tlb_flush_vmid ARM: KVM: Don't handle PSCI calls via SMC ARM: KVM: Allow host virt timer irq to be different from guest timer virt irq
2013-06-27KVM: Fix RTC interrupt coalescing trackingGleb Natapov
This reverts most of the f1ed0450a5fac7067590317cbf027f566b6ccbca. After the commit kvm_apic_set_irq() no longer returns accurate information about interrupt injection status if injection is done into disabled APIC. RTC interrupt coalescing tracking relies on the information to be accurate and cannot recover if it is not. Signed-off-by: Gleb Natapov <gleb@redhat.com>
2013-06-27kvm: Add a tracepoint write_tsc_offsetYoshihiro YUNOMAE
Add a tracepoint write_tsc_offset for tracing TSC offset change. We want to merge ftrace's trace data of guest OSs and the host OS using TSC for timestamp in chronological order. We need "TSC offset" values for each guest when merge those because the TSC value on a guest is always the host TSC plus guest's TSC offset. If we get the TSC offset values, we can calculate the host TSC value for each guest events from the TSC offset and the event TSC value. The host TSC values of the guest events are used when we want to merge trace data of guests and the host in chronological order. (Note: the trace_clock of both the host and the guest must be set x86-tsc in this case) This tracepoint also records vcpu_id which can be used to merge trace data for SMP guests. A merge tool will read TSC offset for each vcpu, then the tool converts guest TSC values to host TSC values for each vcpu. TSC offset is stored in the VMCS by vmx_write_tsc_offset() or vmx_adjust_tsc_offset(). KVM executes the former function when a guest boots. The latter function is executed when kvm clock is updated. Only host can read TSC offset value from VMCS, so a host needs to output TSC offset value when TSC offset is changed. Since the TSC offset is not often changed, it could be overwritten by other frequent events while tracing. To avoid that, I recommend to use a special instance for getting this event: 1. set a instance before booting a guest # cd /sys/kernel/debug/tracing/instances # mkdir tsc_offset # cd tsc_offset # echo x86-tsc > trace_clock # echo 1 > events/kvm/kvm_write_tsc_offset/enable 2. boot a guest Signed-off-by: Yoshihiro YUNOMAE <yoshihiro.yunomae.ez@hitachi.com> Cc: Joerg Roedel <joro@8bytes.org> Cc: Marcelo Tosatti <mtosatti@redhat.com> Cc: Gleb Natapov <gleb@redhat.com> Cc: Thomas Gleixner <tglx@linutronix.de> Cc: Ingo Molnar <mingo@redhat.com> Cc: "H. Peter Anvin" <hpa@zytor.com> Acked-by: Marcelo Tosatti <mtosatti@redhat.com> Signed-off-by: Gleb Natapov <gleb@redhat.com>
2013-06-27KVM: MMU: Inform users of mmio generation wraparoundTakuya Yoshikawa
Without this information, users will just see unexpected performance problems and there is little chance we will get good reports from them: note that mmio generation is increased even when we just start, or stop, dirty logging for some memory slot, in which case users cannot expect all shadow pages to be zapped. printk_ratelimited() is used for this taking into account the problems that we can see the information many times when we start multiple VMs and guests can trigger this by reading ROM in a loop for example. Signed-off-by: Takuya Yoshikawa <yoshikawa_takuya_b1@lab.ntt.co.jp> Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
2013-06-27KVM: MMU: document fast invalidate all mmio sptesXiao Guangrong
Document it to Documentation/virtual/kvm/mmu.txt Signed-off-by: Xiao Guangrong <xiaoguangrong@linux.vnet.ibm.com> Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
2013-06-27KVM: MMU: document fast invalidate all pagesXiao Guangrong
Document it to Documentation/virtual/kvm/mmu.txt Signed-off-by: Xiao Guangrong <xiaoguangrong@linux.vnet.ibm.com> Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
2013-06-27KVM: MMU: document fast page faultXiao Guangrong
Document fast page fault to Documentation/virtual/kvm/mmu.txt Signed-off-by: Xiao Guangrong <xiaoguangrong@linux.vnet.ibm.com> Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
2013-06-27KVM: MMU: document mmio page faultXiao Guangrong
Document it to Documentation/virtual/kvm/mmu.txt Signed-off-by: Xiao Guangrong <xiaoguangrong@linux.vnet.ibm.com> Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
2013-06-27KVM: MMU: document write_flooding_countXiao Guangrong
Document write_flooding_count to Documentation/virtual/kvm/mmu.txt Signed-off-by: Xiao Guangrong <xiaoguangrong@linux.vnet.ibm.com> Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>