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2019-02-19scsi: qla2xxx: Prevent multiple ADISC commands per sessionQuinn Tran
Add check to allow 1 discovery command per session to be sent. Signed-off-by: Quinn Tran <qtran@marvell.com> Signed-off-by: Himanshu Madhani <hmadhani@marvell.com> Signed-off-by: Martin K. Petersen <martin.petersen@oracle.com>
2019-02-19scsi: qla2xxx: Check for FW started flag before abortingHimanshu Madhani
For FC-NVMe, if the fw_started flag is not set or fcport is deleted, then do not send Abort command Signed-off-by: Himanshu Madhani <hmadhani@marvell.com> Signed-off-by: Martin K. Petersen <martin.petersen@oracle.com>
2019-02-19scsi: qla2xxx: Fix unload when NVMe devices are configuredHimanshu Madhani
This patch fixes driver unload issue when FC-NVMe devices are configured. Signed-off-by: Himanshu Madhani <hmadhani@marvell.com> Signed-off-by: Martin K. Petersen <martin.petersen@oracle.com>
2019-02-19scsi: qla2xxx: Add First Burst support for FC-NVMe devicesDarren Trapp
Add Support for First Burst for FC-NVMe protocol. This feature requires First Burst support in the firmware. Signed-off-by: Darren Trapp <darren.trapp@cavium.com> Signed-off-by: Himanshu Madhani <hmadhani@marvell.com> Signed-off-by: Martin K. Petersen <martin.petersen@oracle.com>
2019-02-19scsi: qla2xxx: Fix LUN discovery if loop id is not assigned yet by firmwareHimanshu Madhani
This patch fixes LUN discovery when loop ID is not yet assigned by the firmware during driver load/sg_reset operations. Driver will now search for new loop id before retrying login. Fixes: 48acad099074 ("scsi: qla2xxx: Fix N2N link re-connect") Cc: stable@vger.kernel.org #4.19 Signed-off-by: Himanshu Madhani <hmadhani@marvell.com> Signed-off-by: Martin K. Petersen <martin.petersen@oracle.com>
2019-02-19scsi: qla2xxx: remove redundant null check on pointer sessColin Ian King
The null check on pointer sess and the subsequent call is redundant as sess is null on all the the paths that lead to the out_term2 label. Hence the null check and the call can be removed. Also remove the redundant setting of sess to NULL as this is not required now. Detected by CoverityScan, CID#1420663 ("Logically dead code") Signed-off-by: Colin Ian King <colin.king@canonical.com> Acked-by: Himanshu Madhani <hmadhani@marvell.com> Signed-off-by: Martin K. Petersen <martin.petersen@oracle.com>
2019-02-19scsi: qla2xxx: Move debug messages before sending srb preventing panicBill Kuzeja
When sending an srb with qla2x00_start_sp, the sp can complete and be freed by the time we log the debug message saying we sent it. This can cause a panic if sp gets reused quickly or when running a kernel that poisons freed memory. This was partially fixed by (not every case was addressed): Commit 9fe278f44b4b ("scsi: qla2xxx: Move log messages before issuing command to firmware") Signed-off-by: Bill Kuzeja <william.kuzeja@stratus.com> Acked-by: Himanshu Madhani <hmadhani@marvell.com> Signed-off-by: Martin K. Petersen <martin.petersen@oracle.com>
2019-02-19scsi: lpfc: Remove set but not used variable 'phys_id'YueHaibing
Fixes gcc '-Wunused-but-set-variable' warning: drivers/scsi/lpfc/lpfc_init.c: In function 'lpfc_cpu_affinity_check': drivers/scsi/lpfc/lpfc_init.c:10599:19: warning: variable 'phys_id' set but not used [-Wunused-but-set-variable] It never used since introduction in commit 6a828b0f6192 ("scsi: lpfc: Support non-uniform allocation of MSIX vectors to hardware queues") Signed-off-by: YueHaibing <yuehaibing@huawei.com> Acked-by: James Smart <james.smart@broadcom.com> Signed-off-by: Martin K. Petersen <martin.petersen@oracle.com>
2019-02-19scsi: ufs: Add HI3670 SoC UFS driver supportManivannan Sadhasivam
Add HI3670 SoC UFS driver support by extending the common ufs-hisi driver. One major difference between HI3660 ad HI3670 SoCs interms of UFS is the PHY. HI3670 has a 10nm variant PHY and hence this parameter is used to distinguish the configuration. Signed-off-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org> Acked-by: Wei Li <liwei213@huawei.com> Signed-off-by: Martin K. Petersen <martin.petersen@oracle.com>
2019-02-19scsi: dt-bindings: ufs: Add HI3670 UFS controller bindingManivannan Sadhasivam
Add devicetree binding for HI3670 UFS controller. HI3760 SoC is very similar to HI3660 SoC with almost same IPs. Only major difference in terms of UFS is the PHY. HI3670 has 10nm PHY. But since the original driver (HI3660 UFS) cannot make HI3670 UFS functional, a separate compatible is added for HI3670 without any fallback. Signed-off-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org> Reviewed-by: Rob Herring <robh@kernel.org> Acked-by: Wei Li <liwei213@huawei.com> Signed-off-by: Martin K. Petersen <martin.petersen@oracle.com>
2019-02-20power: reset: at91-reset: add support for sam9x60 SoCNicolas Ferre
Add support for additional reset causes and the proper compatibility string for sam9x60 SoC. The restart function is the same as the samx7. Signed-off-by: Nicolas Ferre <nicolas.ferre@microchip.com> Reviewed-by: Alexandre Belloni <alexandre.belloni@bootlin.com> Signed-off-by: Sebastian Reichel <sebastian.reichel@collabora.com>
2019-02-20dt-bindings: arm: atmel: add new sam9x60 reset controller bindingNicolas Ferre
Update the Reset Controller's binding to add new SoC compatibility string. Signed-off-by: Nicolas Ferre <nicolas.ferre@microchip.com> Reviewed-by: Rob Herring <robh@kernel.org> Acked-by: Alexandre Belloni <alexandre.belloni@bootlin.com> Signed-off-by: Sebastian Reichel <sebastian.reichel@collabora.com>
2019-02-20dt-bindings: arm: atmel: add missing samx7 to reset controllerNicolas Ferre
Add this missing compatibility string to the Reset Controller compatible string chip list. Signed-off-by: Nicolas Ferre <nicolas.ferre@microchip.com> Reviewed-by: Rob Herring <robh@kernel.org> Acked-by: Alexandre Belloni <alexandre.belloni@bootlin.com> Signed-off-by: Sebastian Reichel <sebastian.reichel@collabora.com>
2019-02-20max17042_battery: fix potential use-after-free on device removeSven Van Asbroeck
The work which is scheduled on a POR boot is potentially left pending or running until after the device module is removed, which could result in a use-after-free. Fix by registering a cancel/sync callback, which gets executed as part of standard resource unwinding. This issue was detected with the help of Coccinelle. Signed-off-by: Sven Van Asbroeck <TheSven73@gmail.com> Reviewed-by: Hans de Goede <hdegoede@redhat.com> Signed-off-by: Sebastian Reichel <sebastian.reichel@collabora.com>
2019-02-20power: supply: core: Add a field to support battery max voltageArtur Rojek
Add a field for "voltage_max_design_uv" to present fully charged battery voltage. Signed-off-by: Artur Rojek <contact@artur-rojek.eu> Signed-off-by: Sebastian Reichel <sebastian.reichel@collabora.com>
2019-02-20dt-bindings: power: supply: Add voltage-max-design-microvolt propertyArtur Rojek
Add documentation for the "voltage-max-design-microvolt" property. Signed-off-by: Artur Rojek <contact@artur-rojek.eu> Signed-off-by: Sebastian Reichel <sebastian.reichel@collabora.com>
2019-02-20bq27x00: use cached flagsArthur Demchenkov
The flags were just read by bq27xxx_battery_update(), no need to read them again. Signed-off-by: Arthur Demchenkov <spinal.by@gmail.com> Reviewed-by: Andrew F. Davis <afd@ti.com> Signed-off-by: Sebastian Reichel <sebastian.reichel@collabora.com>
2019-02-20drm/nouveau/dmem: use dma addresses during migration copiesBen Skeggs
Removes the need for temporary VMM mappings. Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2019-02-20drm/nouveau/dmem: use physical vram addresses during migration copiesBen Skeggs
Removes the need for temporary VMM mappings. Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2019-02-20drm/nouveau/dmem: extend copy function to allow direct use of physical addressesBen Skeggs
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2019-02-20drm/nouveau/svm: new ioctl to migrate process memory to GPU memoryJérôme Glisse
This add an ioctl to migrate a range of process address space to the device memory. On platform without cache coherent bus (x86, ARM, ...) this means that CPU can not access that range directly, instead CPU will fault which will migrate the memory back to system memory. This is behind a staging flag so that we can evolve the API. Signed-off-by: Jérôme Glisse <jglisse@redhat.com>
2019-02-20drm/nouveau/dmem: device memory helpers for SVMJérôme Glisse
Device memory can be use in SVM, in which case we do not have any of the existing buffer object. This commit add infrastructure to allow use of device memory without nouveau_bo. Again this is a temporary solution until a rework of GPU memory management. Signed-off-by: Jérôme Glisse <jglisse@redhat.com>
2019-02-20drm/nouveau/svm: initial support for shared virtual memoryBen Skeggs
This uses HMM to mirror a process' CPU page tables into a channel's page tables, and keep them synchronised so that both the CPU and GPU are able to access the same memory at the same virtual address. While this code also supports Volta/Turing, it's only enabled for Pascal GPUs currently due to channel recovery being unreliable right now on the later GPUs. Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2019-02-20drm/nouveau: prepare for enabling svm with existing userspace interfacesBen Skeggs
For a channel to make use of SVM features, it requires a different GPU MMU configuration than we would normally use, which is not desirable to switch to unless a client is actively going to use SVM. In order to supporting SVM without more extensive changes to the userspace interfaces, the SVM_INIT ioctl needs to replace the previous configuration safely. The only way we can currently do this safely, accounting for some unlikely failure conditions, is to allocate the new VMM without destroying the last one, and prioritising the SVM-enabled configuration in the code that cares. This will get cleaned up again further down the track. Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2019-02-20drm/nouveau/fault/gv100-: expose VoltaFaultBufferABen Skeggs
This nvclass exposes the replayable fault buffer, which will be used by SVM to manage GPU page faults. Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2019-02-20drm/nouveau/fault/gp100: expose MaxwellFaultBufferABen Skeggs
This nvclass exposes the replayable fault buffer, which will be used by SVM to manage GPU page faults. Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2019-02-20drm/nouveau/mmu/gp100-: support vmms with gcc/tex replayable faults enabledBen Skeggs
Some GPU units are capable of supporting "replayable" page faults, where the execution unit will wait for SW to fixup GPU page tables rather than triggering a channel-fatal fault. This feature isn't useful (it's harmful, even) unless something like HMM is being used to manage events appearing in the replayable fault buffer, so, it's disabled by default. This commit allows a client to request it be enabled. Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2019-02-20drm/nouveau/mmu/gp100-: add privileged methods for fault replay/cancelBen Skeggs
Host methods exist to do at least some of what we need, but we are not currently pushing replay/cancels through a channel like UVM does as it's not clear whether it's necessary in our case (UVM also updates PTEs with the GPU). UVM also pushes a software method for fault cancels on Pascal, seemingly because the host methods don't appear to be sufficient. If/when we want to push the replay/cancel on the GPU, we can re-purpose the cancellation code here to implement that swmthd. Keep it simple for now, until we figure out exactly what we need here. Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2019-02-20drm/nouveau/mmu: add a privileged method to directly manage PTEsBen Skeggs
This provides a somewhat more direct method of manipulating the GPU page tables, which will be required to support SVM. Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2019-02-20drm/nouveau/mmu: store mapped flag separately from memory pointerBen Skeggs
This will be used to support a privileged client providing PTEs directly, without a memory object to use as a reference. Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2019-02-20drm/nouveau/mmu: support initialisation of client-managed address-spacesBen Skeggs
NVKM is currently responsible for managing the allocation of a client's GPU address-space, but there's various use-cases (ie. HMM address-space mirroring) where giving a client more direct control is desirable. This commit allows for a VMM to be created where the area allocated for NVKM is limited to a client-specified window, the remainder of address- space is controlled directly by the client. Leaving a window is necessary to support various internal requirements, but also to support existing allocation interfaces as not all of the HW is capable of working with a HMM allocation. Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2019-02-20drm/nouveau/gr/gf100-: expose method to determine current contextBen Skeggs
MMU will need access to this info. Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2019-02-20drm/nouveau/gr/gf100-: expose fecs methods for pausing ctxswBen Skeggs
MMU will need access to these. v2. Apply fix from Rhys Kidd to send correct FECS method for STOP_CTXSW. Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2019-02-20drm/nouveau/falcon: fix a few indentation issuesColin Ian King
There are a few statements that are indented incorrectly. Fix these. Signed-off-by: Colin Ian King <colin.king@canonical.com> Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2019-02-20drm/nouveau/mmu/gf100-: virtualise setting pdb base address for invalidationBen Skeggs
It appears that Pascal and newer need something different. Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2019-02-20drm/nouveau/mmu/gf100-: make mmu invalidate function more generalBen Skeggs
Will want to reuse this for fault replay/cancellation swmthds. Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2019-02-20drm/nouveau/gr/gf100-: store fecs/gpccs falcon pointers in substructuresBen Skeggs
Future changes will want to add some additional things here, keep them grouped together. Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2019-02-20drm/nouveau/gr/gf100-: move fecs bind_pointer into a functionBen Skeggs
Makes the code somewhat less magic. Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2019-02-20drm/nouveau/gr/gf100-: remove some unnecessary reg writesBen Skeggs
This is already done during golden context creation. Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2019-02-20drm/nouveau/gr/gf100-: move fecs elpg setup into functionsBen Skeggs
Makes the code somewhat less magic. Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2019-02-20drm/nouveau/gr/gf100-: move fecs discover_pm_image_size into a functionBen Skeggs
Makes the code somewhat less magic. Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2019-02-20drm/nouveau/gr/gf100-: move fecs discover_zcull_image_size into a functionBen Skeggs
Makes the code somewhat less magic. Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2019-02-20drm/nouveau/gr/gf100-: move fecs discover_image_size into a functionBen Skeggs
Makes the code somewhat less magic. Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2019-02-20drm/nouveau/gr/gf100-: move fecs set_watchdog_timeout method into a functionBen Skeggs
Makes the code somewhat less magic. Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2019-02-20drm/nouveau: allow accelerated buffer moves even when gr isn't presentBen Skeggs
There's no need to avoid using copy engines if gr init fails for some reason (usually missing FW, or incomplete bring-up). It's not terribly useful for an end-user, but it'll slightly speed up suspend/resume when saving fb contents, and allow for host/ce code to be validated. Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2019-02-20drm/nouveau/kms/nv04-nv4x: move resume code to dispnv04 init hookBen Skeggs
It has no relevance to the atomic path used by newer GPUs. Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2019-02-20drm/nouveau/kms/nv04-nv4x: move suspend code to dispnv04 fini hookBen Skeggs
It has no relevance to the atomic path used by newer GPUs. Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2019-02-20drm/nouveau/kms/nv04-nv4x: move a bunch of pre-nv50 page flip code to dispnv04Ben Skeggs
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2019-02-20drm/nouveau/kms: display destroy/init/fini hooks can be staticBen Skeggs
Swapped order of functions in dispnv04 to allow this, but no code changes. Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2019-02-20drm/nouveau: allocate kernel channel(s) before initialising displayBen Skeggs
Some of the pre-NV50 depends on SW methods to implement synchronisation for page flips, and we want to move this setup out of common code, thus we require the channel to have been allocation before display init. Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
generated by cgit (git 2.34.1) at 2025-10-03 04:33:19 +0000