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2023-10-09drm/msm/dp: switch to devm_drm_bridge_add()Dmitry Baryshkov
Make MSM DP driver use devm_drm_bridge_add() instead of plain drm_bridge_add(). As the driver doesn't require any additional cleanup, stop adding created bridge to the priv->bridges array. Reviewed-by: Rob Clark <robdclark@gmail.com> Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> Patchwork: https://patchwork.freedesktop.org/patch/561639/ Signed-off-by: Rob Clark <robdclark@chromium.org>
2023-10-09drm/msm/dp: move pdev from struct dp_display_private to struct msm_dpDmitry Baryshkov
The dp_drm needs accessing the DP's platform device. Move pdev to the public structure. Reviewed-by: Rob Clark <robdclark@gmail.com> Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> Patchwork: https://patchwork.freedesktop.org/patch/561642/ Signed-off-by: Rob Clark <robdclark@chromium.org>
2023-10-09drm/msm/hdmi: switch to devm_drm_bridge_add()Dmitry Baryshkov
Make MSM HDMI driver use devm_drm_bridge_add() instead of plain drm_bridge_add(). As the driver doesn't require any additional cleanup, stop adding created bridge to the priv->bridges array. Reviewed-by: Rob Clark <robdclark@gmail.com> Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> Patchwork: https://patchwork.freedesktop.org/patch/561635/ Signed-off-by: Rob Clark <robdclark@chromium.org>
2023-10-09drm/msm/dsi: switch to devm_drm_bridge_add()Dmitry Baryshkov
Make MSM DSI driver use devm_drm_bridge_add() instead of plain drm_bridge_add(). As the driver doesn't require any additional cleanup, stop adding created bridge to the priv->bridges array. Reviewed-by: Rob Clark <robdclark@gmail.com> Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> Patchwork: https://patchwork.freedesktop.org/patch/561636/ Signed-off-by: Rob Clark <robdclark@chromium.org>
2023-10-09drm/msm/mdp5: move resource allocation to the _probe functionDmitry Baryshkov
To let the probe function bail early if any of the resources is unavailable, move resource allocattion from kms_init directly to the probe callback. Reviewed-by: Abhinav Kumar <quic_abhinavk@quicinc.com> Reviewed-by: Rob Clark <robdclark@gmail.com> Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> Patchwork: https://patchwork.freedesktop.org/patch/561630/ Signed-off-by: Rob Clark <robdclark@chromium.org>
2023-10-09drm/msm/mdp4: move resource allocation to the _probe functionDmitry Baryshkov
To let the probe function bail early if any of the resources is unavailable, move resource allocattion from kms_init directly to the probe callback. While we are at it, replace irq_of_parse_and_map() with platform_get_irq(). Reviewed-by: Abhinav Kumar <quic_abhinavk@quicinc.com> Reviewed-by: Rob Clark <robdclark@gmail.com> Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> Patchwork: https://patchwork.freedesktop.org/patch/561628/ Signed-off-by: Rob Clark <robdclark@chromium.org>
2023-10-09drm/msm/dpu: move resource allocation to the _probe functionDmitry Baryshkov
To let the probe function bail early if any of the resources is unavailable, move resource allocattion from kms_init directly to the probe callback. While we are at it, replace irq_of_parse_and_map() with platform_get_irq(). This also drops devm_iounmap() calls. It is too early to have them _dpu_kms_hw_destroy() (or it will break if for some reason DPU device is rebound into the composite device) and it doesn't make sense to have them in dpu_dev_remove (as everything will be torn down by the devres anyway after the device is unbound from the driver). Reviewed-by: Rob Clark <robdclark@gmail.com> Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> Patchwork: https://patchwork.freedesktop.org/patch/561629/ Signed-off-by: Rob Clark <robdclark@chromium.org>
2023-10-09drm/msm: allow passing struct msm_kms to msm_drv_probe()Dmitry Baryshkov
In preparation of moving resource allocation to the probe time, allow MSM KMS drivers to pass struct msm_kms pointer via msm_drv_probe(). Reviewed-by: Rob Clark <robdclark@gmail.com> Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> Patchwork: https://patchwork.freedesktop.org/patch/561627/ Signed-off-by: Rob Clark <robdclark@chromium.org>
2023-10-09drm/msm/adreno: Add A635 speedbin 0xac (A643)Konrad Dybcio
Downstream calls this the "speedbin 1", but that number is already occupied. Use index two. Signed-off-by: Konrad Dybcio <konrad.dybcio@linaro.org> Patchwork: https://patchwork.freedesktop.org/patch/559607/ Signed-off-by: Rob Clark <robdclark@chromium.org>
2023-10-09drm/msm/adreno: Add ZAP firmware name to A635Konrad Dybcio
Some (many?) devices with A635 expect a ZAP shader to be loaded. Set the file name to allow for that. Signed-off-by: Konrad Dybcio <konrad.dybcio@linaro.org> Patchwork: https://patchwork.freedesktop.org/patch/559605/ Signed-off-by: Rob Clark <robdclark@chromium.org>
2023-10-09drm/msm/a6xx: Fix unknown speedbin caseKonrad Dybcio
When opp-supported-hw is present under an OPP node, but no form of opp_set_supported_hw() has been called, that OPP is ignored by the API and marked as unsupported. Before Commit c928a05e4415 ("drm/msm/adreno: Move speedbin mapping to device table"), an unknown speedbin would result in marking all OPPs as available, but it's better to avoid potentially overclocking the silicon - the GMU will simply refuse to power up the chip. Currently, the Adreno speedbin code does just that (AND returns an invalid error, (int)UINT_MAX). Fix that by defaulting to speedbin 0 (which is conveniently always bound to fuseval == 0). Fixes: c928a05e4415 ("drm/msm/adreno: Move speedbin mapping to device table") Signed-off-by: Konrad Dybcio <konrad.dybcio@linaro.org> Patchwork: https://patchwork.freedesktop.org/patch/559604/ Signed-off-by: Rob Clark <robdclark@chromium.org>
2023-10-09drm/msm/adreno: Fix SM6375 GPU IDKonrad Dybcio
SM6375 comes with a patchlevel=1. Fix the chipid up to reflect that. Fixes: 90b593ce1c9e ("drm/msm/adreno: Switch to chip-id for identifying GPU") Signed-off-by: Konrad Dybcio <konrad.dybcio@linaro.org> Patchwork: https://patchwork.freedesktop.org/patch/554527/ Signed-off-by: Rob Clark <robdclark@chromium.org>
2023-10-09drm/msm/a6xx: Poll for GBIF unhalt status in hw_initKonrad Dybcio
Some GPUs - particularly A7xx ones - are really really stubborn and sometimes take a longer-than-expected time to finish unhalting GBIF. Note that this is not caused by the request a few lines above. Poll for the unhalt ack to make sure we're not trying to write bits to an essentially dead GPU that can't receive data on its end of the bus. Failing to do this will result in inexplicable GMU timeouts or worse. This is a rather ugly hack which introduces a whole lot of latency. Tested-by: Neil Armstrong <neil.armstrong@linaro.org> # on SM8550-QRD Tested-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> # sm8450 Signed-off-by: Konrad Dybcio <konrad.dybcio@linaro.org> Patchwork: https://patchwork.freedesktop.org/patch/559292/ Signed-off-by: Rob Clark <robdclark@chromium.org>
2023-10-09drm/msm/a6xx: Add A740 supportKonrad Dybcio
A740 builds upon the A730 IP, shuffling some values and registers around. More differences will appear when things like BCL are implemented. adreno_is_a740_family is added in preparation for more A7xx GPUs, the logic checks will be valid resulting in smaller diffs. Tested-by: Neil Armstrong <neil.armstrong@linaro.org> # on SM8550-QRD Tested-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> # sm8450 Signed-off-by: Konrad Dybcio <konrad.dybcio@linaro.org> Patchwork: https://patchwork.freedesktop.org/patch/559291/ Signed-off-by: Rob Clark <robdclark@chromium.org>
2023-10-09drm/msm/a6xx: Add A730 supportKonrad Dybcio
Add support for Adreno 730, also known as GEN7_0_x, found on SM8450. Tested-by: Neil Armstrong <neil.armstrong@linaro.org> # on SM8550-QRD Tested-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> # sm8450 Signed-off-by: Konrad Dybcio <konrad.dybcio@linaro.org> Patchwork: https://patchwork.freedesktop.org/patch/559290/ Signed-off-by: Rob Clark <robdclark@chromium.org>
2023-10-09drm/msm/a6xx: Mostly implement A7xx gpu_stateKonrad Dybcio
Provide the necessary alternations to mostly support state dumping on A7xx. Newer GPUs will probably require more changes here. Crashdumper and debugbus remain untested. Tested-by: Neil Armstrong <neil.armstrong@linaro.org> # on SM8550-QRD Tested-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> # sm8450 Signed-off-by: Konrad Dybcio <konrad.dybcio@linaro.org> Patchwork: https://patchwork.freedesktop.org/patch/559289/ Signed-off-by: Rob Clark <robdclark@chromium.org>
2023-10-09drm/msm/a6xx: Send ACD state to QMP at GMU resumeKonrad Dybcio
The QMP mailbox expects to be notified of the ACD (Adaptive Clock Distribution) state. Get a handle to the mailbox at probe time and poke it at GMU resume. Since we don't fully support ACD yet, hardcode the message to "val: 0" (state = disabled). Tested-by: Neil Armstrong <neil.armstrong@linaro.org> # on SM8550-QRD Tested-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> # sm8450 Signed-off-by: Konrad Dybcio <konrad.dybcio@linaro.org> Patchwork: https://patchwork.freedesktop.org/patch/559287/ Signed-off-by: Rob Clark <robdclark@chromium.org>
2023-10-09drm/msm/a6xx: Add skeleton A7xx supportKonrad Dybcio
A7xx GPUs are - from kernel's POV anyway - basically another generation of A6xx. They build upon the A650/A660_family advancements, skipping some writes (presumably more values are preset correctly on reset), adding some new ones and changing others. One notable difference is the introduction of a second shadow, called BV. To handle this with the current code, allocate it right after the current RPTR shadow. BV handling and .submit are mostly based on Jonathan Marek's work. All A7xx GPUs are assumed to have a GMU. A702 is not an A7xx-class GPU, it's a weird forked A610. Tested-by: Neil Armstrong <neil.armstrong@linaro.org> # on SM8550-QRD Tested-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> # sm8450 Signed-off-by: Konrad Dybcio <konrad.dybcio@linaro.org> Patchwork: https://patchwork.freedesktop.org/patch/559285/ Signed-off-by: Rob Clark <robdclark@chromium.org>
2023-10-09drm/msm/a6xx: Add missing regs for A7XXKonrad Dybcio
Add some missing definitions required for A7 support. This may be substituted with a mesa header sync. Tested-by: Neil Armstrong <neil.armstrong@linaro.org> # on SM8550-QRD Tested-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> # sm8450 Signed-off-by: Konrad Dybcio <konrad.dybcio@linaro.org> Patchwork: https://patchwork.freedesktop.org/patch/559282/ Signed-off-by: Rob Clark <robdclark@chromium.org>
2023-10-09dt-bindings: display/msm/gpu: Allow A7xx SKUsKonrad Dybcio
Allow A7xx SKUs, such as the A730 GPU found on SM8450 and friends. They use GMU for all things DVFS, just like most A6xx GPUs. Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Tested-by: Neil Armstrong <neil.armstrong@linaro.org> # on SM8550-QRD Tested-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> # sm8450 Signed-off-by: Konrad Dybcio <konrad.dybcio@linaro.org> Patchwork: https://patchwork.freedesktop.org/patch/559281/ Signed-off-by: Rob Clark <robdclark@chromium.org>
2023-10-09dt-bindings: display/msm/gmu: Allow passing QMP handleKonrad Dybcio
When booting the GMU, the QMP mailbox should be pinged about some tunables (e.g. adaptive clock distribution state). To achieve that, a reference to it is necessary. Allow it and require it with A730. Tested-by: Neil Armstrong <neil.armstrong@linaro.org> # on SM8550-QRD Tested-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> # sm8450 Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Signed-off-by: Konrad Dybcio <konrad.dybcio@linaro.org> Patchwork: https://patchwork.freedesktop.org/patch/559279/ Signed-off-by: Rob Clark <robdclark@chromium.org>
2023-10-09dt-bindings: display/msm/gmu: Add Adreno 7[34]0 GMUKonrad Dybcio
The GMU on the A7xx series is pretty much the same as on the A6xx parts. It's now "smarter", needs a bit less register writes and controls more things (like inter-frame power collapse) mostly internally (instead of us having to write to G[PM]U_[CG]X registers from APPS) The only difference worth mentioning is the now-required DEMET clock, which is strictly required for things like asserting reset lines, not turning it on results in GMU not being fully functional (all OOB requests would fail and HFI would hang after the first submitted OOB). Describe the A730 and A740 GMU. Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Tested-by: Neil Armstrong <neil.armstrong@linaro.org> # on SM8550-QRD Tested-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> # sm8450 Signed-off-by: Konrad Dybcio <konrad.dybcio@linaro.org> Patchwork: https://patchwork.freedesktop.org/patch/559278/ Signed-off-by: Rob Clark <robdclark@chromium.org>
2023-10-09dt-bindings: display: msm: Make "additionalProperties: true" explicitRob Herring
Make it explicit that child nodes have additional properties and the child node schema is not complete. The complete schemas are applied separately based the compatible strings. Signed-off-by: Rob Herring <robh@kernel.org> Acked-by: Conor Dooley <conor.dooley@microchip.com> Patchwork: https://patchwork.freedesktop.org/patch/559387/ Link: https://lore.kernel.org/r/20230925212434.1972368-2-robh@kernel.org Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
2023-10-09dt-bindings: display: msm: Add missing unevaluatedProperties on child node ↵Rob Herring
schemas Just as unevaluatedProperties or additionalProperties are required at the top level of schemas, they should (and will) also be required for child node schemas. That ensures only documented properties are present for any node. Signed-off-by: Rob Herring <robh@kernel.org> Acked-by: Conor Dooley <conor.dooley@microchip.com> Patchwork: https://patchwork.freedesktop.org/patch/559385/ Link: https://lore.kernel.org/r/20230925212434.1972368-1-robh@kernel.org Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
2023-10-09drm/msm/dp: support setting the DP subconnector typeDmitry Baryshkov
Read the downstream port info and set the subconnector type accordingly. Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> Reviewed-by: Stephen Boyd <swboyd@chromium.org> Patchwork: https://patchwork.freedesktop.org/patch/555531/ Link: https://lore.kernel.org/r/20230903222432.2894093-1-dmitry.baryshkov@linaro.org
2023-10-09drm/msm/dp: Remove error message when downstream port not connectedStephen Boyd
Plugging in an Apple dongle without the HDMI cable attached prints out an error message in the kernel logs when nothing is actually wrong. no downstream ports connected This is because the downstream port for the HDMI connector is not connected, so the Apple dongle reports that as a zero sink count device. Cc: Vinod Polimera <quic_vpolimer@quicinc.com> Cc: Kuogee Hsieh <quic_khsieh@quicinc.com> Signed-off-by: Stephen Boyd <swboyd@chromium.org> Patchwork: https://patchwork.freedesktop.org/patch/556068/ Link: https://lore.kernel.org/r/20230906181226.2198441-3-swboyd@chromium.org Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
2023-10-09drm/msm/dp: Inline dp_display_is_sink_count_zero()Stephen Boyd
This function is basically a one-liner when you ignore the debug logging. Just inline the function and drop the log to simplify the code. Suggested-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> Cc: Vinod Polimera <quic_vpolimer@quicinc.com> Cc: Kuogee Hsieh <quic_khsieh@quicinc.com> Signed-off-by: Stephen Boyd <swboyd@chromium.org> Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> Patchwork: https://patchwork.freedesktop.org/patch/556066/ Link: https://lore.kernel.org/r/20230906181226.2198441-2-swboyd@chromium.org Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
2023-10-09drm/msm/dpu: move INTF tearing checks to dpu_encoder_phys_cmd_initDmitry Baryshkov
As the INTF is fixed at the encoder creation time, we can move the check whether INTF supports tearchck to dpu_encoder_phys_cmd_init(). This function can return an error if INTF doesn't have required feature. Performing this check in dpu_encoder_phys_cmd_tearcheck_config() is less useful, as this function returns void. Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> Reviewed-by: Stephen Boyd <swboyd@chromium.org> Patchwork: https://patchwork.freedesktop.org/patch/555553/ Link: https://lore.kernel.org/r/20230904020454.2945667-9-dmitry.baryshkov@linaro.org
2023-10-09drm/msm/dpu: drop useless check from dpu_encoder_phys_cmd_te_rd_ptr_irq()Dmitry Baryshkov
The dpu_encoder_phys_cmd_te_rd_ptr_irq() function uses neither hw_intf nor hw_pp data, so we can drop the corresponding check. Reviewed-by: Marijn Suijten <marijn.suijten@somainline.org> Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> Reviewed-by: Stephen Boyd <swboyd@chromium.org> Patchwork: https://patchwork.freedesktop.org/patch/555544/ Link: https://lore.kernel.org/r/20230904020454.2945667-8-dmitry.baryshkov@linaro.org
2023-10-09drm/msm/dpu: drop DPU_INTF_TE feature flagDmitry Baryshkov
Replace the only user of the DPU_INTF_TE feature flag with the direct DPU version comparison. Reviewed-by: Marijn Suijten <marijn.suijten@somainline.org> Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> Reviewed-by: Stephen Boyd <swboyd@chromium.org> Patchwork: https://patchwork.freedesktop.org/patch/555540/ Link: https://lore.kernel.org/r/20230904020454.2945667-7-dmitry.baryshkov@linaro.org
2023-10-09drm/msm/dpu: enable INTF TE operations only when supported by HWDmitry Baryshkov
The DPU_INTF_TE bit is set for all INTF blocks on DPU >= 5.0, however only INTF_1 and INTF_2 actually support tearing control (both are INTF_DSI). Rather than trying to limit the DPU_INTF_TE feature bit to those two INTF instances, check for the major && INTF type. Reviewed-by: Marijn Suijten <marijn.suijten@somainline.org> Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> Reviewed-by: Stephen Boyd <swboyd@chromium.org> Patchwork: https://patchwork.freedesktop.org/patch/555547/ Link: https://lore.kernel.org/r/20230904020454.2945667-6-dmitry.baryshkov@linaro.org
2023-10-09drm/msm/dpu: inline _setup_intf_ops()Dmitry Baryshkov
Inline the _setup_intf_ops() function, it makes it easier to handle different conditions involving INTF configuration. Reviewed-by: Marijn Suijten <marijn.suijten@somainline.org> Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> Patchwork: https://patchwork.freedesktop.org/patch/555551/ Link: https://lore.kernel.org/r/20230904020454.2945667-5-dmitry.baryshkov@linaro.org
2023-10-09drm/msm/dpu: drop the DPU_PINGPONG_TE flagDmitry Baryshkov
The DPU_PINGPONG_TE flag became unused, we can drop it now. Reviewed-by: Marijn Suijten <marijn.suijten@somainline.org> Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> Reviewed-by: Stephen Boyd <swboyd@chromium.org> Patchwork: https://patchwork.freedesktop.org/patch/555542/ Link: https://lore.kernel.org/r/20230904020454.2945667-4-dmitry.baryshkov@linaro.org
2023-10-09drm/msm/dpu: enable PINGPONG TE operations only when supported by HWDmitry Baryshkov
The DPU_PINGPONG_TE bit is set for all PINGPONG blocks on DPU < 5.0. Rather than checking for the flag, check for the presense of the corresponding interrupt line. Reviewed-by: Marijn Suijten <marijn.suijten@somainline.org> Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> Patchwork: https://patchwork.freedesktop.org/patch/555541/ Link: https://lore.kernel.org/r/20230904020454.2945667-3-dmitry.baryshkov@linaro.org
2023-10-09drm/msm/dpu: inline _setup_pingpong_ops()Dmitry Baryshkov
Inline the _setup_pingpong_ops() function, it makes it easier to handle different conditions involving PINGPONG configuration. Reviewed-by: Marijn Suijten <marijn.suijten@somainline.org> Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> Reviewed-by: Stephen Boyd <swboyd@chromium.org> Patchwork: https://patchwork.freedesktop.org/patch/555545/ Link: https://lore.kernel.org/r/20230904020454.2945667-2-dmitry.baryshkov@linaro.org
2023-10-09drm/msm/dp: skip validity check for DP CTS EDID checksumJani Nikula
The DP CTS test for EDID last block checksum expects the checksum for the last block, invalid or not. Skip the validity check. For the most part (*), the EDIDs returned by drm_get_edid() will be valid anyway, and there's the CTS workaround to get the checksum for completely invalid EDIDs. See commit 7948fe12d47a ("drm/msm/dp: return correct edid checksum after corrupted edid checksum read"). This lets us remove one user of drm_edid_block_valid() with hopes the function can be removed altogether in the future. (*) drm_get_edid() ignores checksum errors on CTA extensions. Cc: Abhinav Kumar <quic_abhinavk@quicinc.com> Cc: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> Cc: Kuogee Hsieh <khsieh@codeaurora.org> Cc: Marijn Suijten <marijn.suijten@somainline.org> Cc: Rob Clark <robdclark@gmail.com> Cc: Sean Paul <sean@poorly.run> Cc: Stephen Boyd <swboyd@chromium.org> Cc: linux-arm-msm@vger.kernel.org Cc: freedreno@lists.freedesktop.org Signed-off-by: Jani Nikula <jani.nikula@intel.com> Reviewed-by: Stephen Boyd <swboyd@chromium.org> Reviewed-by: Abhinav Kumar <quic_abhinavk@quicinc.com> Reviewed-by: Kuogee Hsieh <quic_khsieh@quicinc.com> Patchwork: https://patchwork.freedesktop.org/patch/555361/ Link: https://lore.kernel.org/r/20230901142034.580802-1-jani.nikula@intel.com Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
2023-10-09drm/msm/dp: Remove dp_display_is_ds_bridge()Stephen Boyd
This function is simply drm_dp_is_branch() so use that instead of open-coding it. Cc: Vinod Polimera <quic_vpolimer@quicinc.com> Cc: Kuogee Hsieh <quic_khsieh@quicinc.com> Signed-off-by: Stephen Boyd <swboyd@chromium.org> Tested-by: Kuogee Hsieh <quic_khsieh@quicinc.com> Reviewed-by: Kuogee Hsieh <quic_khsieh@quicinc.com> Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> Patchwork: https://patchwork.freedesktop.org/patch/554989/ Link: https://lore.kernel.org/r/20230829184735.2841739-8-swboyd@chromium.org Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
2023-10-09drm/msm/dp: Inline dp_link_parse_sink_count()Stephen Boyd
The function dp_link_parse_sink_count() is really just drm_dp_read_sink_count(). It debug prints out the bit for content protection (DP_SINK_CP_READY), but that is not useful beyond debug because 'link->dp_link.sink_count' is overwritten to only contain the sink_count in this same function. Just use drm_dp_read_sink_count() in the one place this function is called to simplify. Cc: Vinod Polimera <quic_vpolimer@quicinc.com> Cc: Kuogee Hsieh <quic_khsieh@quicinc.com> Signed-off-by: Stephen Boyd <swboyd@chromium.org> Tested-by: Kuogee Hsieh <quic_khsieh@quicinc.com> Reviewed-by: Kuogee Hsieh <quic_khsieh@quicinc.com> Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> Patchwork: https://patchwork.freedesktop.org/patch/554987/ Link: https://lore.kernel.org/r/20230829184735.2841739-7-swboyd@chromium.org Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
2023-10-09drm/msm/dp: Simplify with drm_dp_{max_link_rate, max_lane_count}()Stephen Boyd
These are open-coded versions of common functions. Replace them with the common code to improve readability. Cc: Vinod Polimera <quic_vpolimer@quicinc.com> Cc: Kuogee Hsieh <quic_khsieh@quicinc.com> Signed-off-by: Stephen Boyd <swboyd@chromium.org> Tested-by: Kuogee Hsieh <quic_khsieh@quicinc.com> Reviewed-by: Kuogee Hsieh <quic_khsieh@quicinc.com> Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> Patchwork: https://patchwork.freedesktop.org/patch/554990/ Link: https://lore.kernel.org/r/20230829184735.2841739-6-swboyd@chromium.org Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
2023-10-09drm/msm/dp: Remove aux_cfg_update_done and related codeStephen Boyd
The member 'aux_cfg_update_done' is always false. This is dead code that never runs. Remove it. Cc: Vinod Polimera <quic_vpolimer@quicinc.com> Cc: Kuogee Hsieh <quic_khsieh@quicinc.com> Signed-off-by: Stephen Boyd <swboyd@chromium.org> Tested-by: Kuogee Hsieh <quic_khsieh@quicinc.com> Reviewed-by: Kuogee Hsieh <quic_khsieh@quicinc.com> Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> Patchwork: https://patchwork.freedesktop.org/patch/554985/ Link: https://lore.kernel.org/r/20230829184735.2841739-5-swboyd@chromium.org Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
2023-10-09drm/msm/dp: Remove dead code related to downstream cap infoStephen Boyd
We read the downstream port count and capability info but never use it anywhere. Remove 'ds_port_cnt' and 'ds_cap_info' and any associated code from this driver. Fold the check for 'dfp_present' into a call to drm_dp_is_branch() at the one place it is used to get rid of any member storage related to downstream ports. Cc: Vinod Polimera <quic_vpolimer@quicinc.com> Cc: Kuogee Hsieh <quic_khsieh@quicinc.com> Signed-off-by: Stephen Boyd <swboyd@chromium.org> Tested-by: Kuogee Hsieh <quic_khsieh@quicinc.com> Reviewed-by: Kuogee Hsieh <quic_khsieh@quicinc.com> Tested-by: Kuogee Hsieh <quic_khsieh@quicinc.com> Reviewed-by: Kuogee Hsieh <quic_khsieh@quicinc.com> Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> Patchwork: https://patchwork.freedesktop.org/patch/554984/ Link: https://lore.kernel.org/r/20230829184735.2841739-4-swboyd@chromium.org Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
2023-10-09drm/msm/dp: Use drm_dp_read_sink_count() helperStephen Boyd
Use the common function drm_dp_read_sink_count() instead of open-coding it. This shrinks the kernel text a tiny bit. Cc: Vinod Polimera <quic_vpolimer@quicinc.com> Cc: Kuogee Hsieh <quic_khsieh@quicinc.com> Signed-off-by: Stephen Boyd <swboyd@chromium.org> Tested-by: Kuogee Hsieh <quic_khsieh@quicinc.com> Reviewed-by: Kuogee Hsieh <quic_khsieh@quicinc.com> Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> Patchwork: https://patchwork.freedesktop.org/patch/554983/ Link: https://lore.kernel.org/r/20230829184735.2841739-3-swboyd@chromium.org Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
2023-10-09drm/msm/dp: Replace open-coded drm_dp_read_dpcd_caps()Stephen Boyd
This function duplicates the common function drm_dp_read_dpcd_caps(). The array of DPCD registers filled in is one size larger than the function takes, but from what I can tell that extra byte was never used. Resize the array and use the common function to reduce the code here. Cc: Vinod Polimera <quic_vpolimer@quicinc.com> Cc: Kuogee Hsieh <quic_khsieh@quicinc.com> Signed-off-by: Stephen Boyd <swboyd@chromium.org> Tested-by: Kuogee Hsieh <quic_khsieh@quicinc.com> Reviewed-by: Kuogee Hsieh <quic_khsieh@quicinc.com> Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> Patchwork: https://patchwork.freedesktop.org/patch/554981/ Link: https://lore.kernel.org/r/20230829184735.2841739-2-swboyd@chromium.org Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
2023-10-09drm/msm/dsi: Enable widebus for DSIJessica Zhang
DSI 6G v2.5.x+ supports a data-bus widen mode that allows DSI to send 48 bits of compressed data instead of 24. Enable this mode whenever DSC is enabled for supported chipsets. Signed-off-by: Jessica Zhang <quic_jesszhan@quicinc.com> Reviewed-by: Abhinav Kumar <quic_abhinavk@quicinc.com> Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> Patchwork: https://patchwork.freedesktop.org/patch/553762/ Link: https://lore.kernel.org/r/20230822-add-widebus-support-v4-4-9dc86083d6ea@quicinc.com Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
2023-10-09drm/msm/dsi: Add DATABUS_WIDEN MDP_CTRL2 bitJessica Zhang
Add a DATABUS_WIDEN bit to the MDP_CTRL2 register to allow DSI to enable databus widen mode. Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> Signed-off-by: Jessica Zhang <quic_jesszhan@quicinc.com> Patchwork: https://patchwork.freedesktop.org/patch/553757/ Link: https://lore.kernel.org/r/20230822-add-widebus-support-v4-3-9dc86083d6ea@quicinc.com Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
2023-10-09drm/msm/dpu: Enable widebus for DSI INTFJessica Zhang
DPU supports a data-bus widen mode for DSI INTF. Enable this mode for all supported chipsets if widebus is enabled for DSI. Signed-off-by: Jessica Zhang <quic_jesszhan@quicinc.com> Reviewed-by: Abhinav Kumar <quic_abhinavk@quicinc.com> Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> Patchwork: https://patchwork.freedesktop.org/patch/553756/ Link: https://lore.kernel.org/r/20230822-add-widebus-support-v4-2-9dc86083d6ea@quicinc.com Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
2023-10-09drm/msm/dpu: Move setting of dpu_enc::wide_bus_en to atomic enable()Jessica Zhang
Move the setting of dpu_enc::wide_bus_en to dpu_encoder_virt_atomic_enable() so that it mirrors how dpu_enc::dsc is being set. Since wide bus for DSI is related to DSC, having it mirror how DSC is set in DPU will also make it easier to accommodate for the possibility of DSC for DSI being set during runtime in the future. Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> Signed-off-by: Jessica Zhang <quic_jesszhan@quicinc.com> Patchwork: https://patchwork.freedesktop.org/patch/553759/ Link: https://lore.kernel.org/r/20230822-add-widebus-support-v4-1-9dc86083d6ea@quicinc.com Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
2023-10-09drm/msm: Remove unnecessary NULL valuesRuan Jinjie
The NULL initialization of the pointers assigned by kzalloc() first is not necessary, because if the kzalloc() failed, the pointers will be assigned NULL, otherwise it works as usual. so remove it. Signed-off-by: Ruan Jinjie <ruanjinjie@huawei.com> Reviewed-by: Abhinav Kumar <quic_abhinavk@quicinc.com> Patchwork: https://patchwork.freedesktop.org/patch/551872/ Link: https://lore.kernel.org/r/20230809034445.434902-4-ruanjinjie@huawei.com Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
2023-10-09drm/msm/dpu: shift IRQ indices by 1Dmitry Baryshkov
In order to simplify IRQ declarations, shift IRQ indices by 1. This makes 0 the 'no IRQ' value. Thanks to this change, we do no longer have to explicitly set the 'no interrupt' fields in catalog structures. Reviewed-by: Marijn Suijten <marijn.suijten@somainline.org> Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> Patchwork: https://patchwork.freedesktop.org/patch/550938/ Link: https://lore.kernel.org/r/20230802100426.4184892-9-dmitry.baryshkov@linaro.org Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
2023-10-09drm/msm/dpu: stop using raw IRQ indices in the kernel tracesDmitry Baryshkov
In preparation to reworking IRQ indcies, stop using raw indices in kernel traces. Instead use a pair of register index and bit. This corresponds closer to the values in HW catalog. Reviewed-by: Marijn Suijten <marijn.suijten@somainline.org> Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> Patchwork: https://patchwork.freedesktop.org/patch/550935/ Link: https://lore.kernel.org/r/20230802100426.4184892-8-dmitry.baryshkov@linaro.org
generated by cgit (git 2.34.1) at 2025-09-07 14:59:22 +0000