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2012-03-21drm/radeon/kms: cayman gpu init updates for trinityAlex Deucher
Signed-off-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Dave Airlie <airlied@redhat.com>
2012-03-21drm/radeon/kms: Add checks for TN in the DP bridge codeAlex Deucher
TN (trinity) uses DP bridges for LVDS and VGA just like llano. Signed-off-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Dave Airlie <airlied@redhat.com>
2012-03-21drm/radeon/kms/DCE6.1: ss is not supported on the internal ppllsAlex Deucher
It's handled via external clock. It should already be protected by the external ss flag, but add an explicit check just in case. Signed-off-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Dave Airlie <airlied@redhat.com>
2012-03-21drm/radeon/kms: disable PPLL0 on DCE6.1 when not in useAlex Deucher
Signed-off-by: Alex Deucher <alexdeucher@gmail.com> Signed-off-by: Dave Airlie <airlied@redhat.com>
2012-03-21drm/radeon/kms: Adjust pll picker for DCE6.1Alex Deucher
On TN, UNIPHYA always uses PPLL2, UNIPHYB/C/D/E/F can use either PPLL1 or PPLL0. Signed-off-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Dave Airlie <airlied@redhat.com>
2012-03-21drm/radeon/kms: DCE6.1 disp eng pll updatesAlex Deucher
DCE6.1 uses EXT_PLL1 for disp eng. Signed-off-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Dave Airlie <airlied@redhat.com>
2012-03-21drm/radeon/kms: DCE6.1 watermark updates for TNAlex Deucher
Signed-off-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Dave Airlie <airlied@redhat.com>
2012-03-21drm/radeon/kms: no support for internal thermal sensor on TN yetAlex Deucher
Signed-off-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Dave Airlie <airlied@redhat.com>
2012-03-21drm/radeon/kms: add trinity (TN) chip familyAlex Deucher
Signed-off-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Dave Airlie <airlied@redhat.com>
2012-03-21drm/radeon/kms: Add SI pci idsAlex Deucher
Signed-off-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Dave Airlie <airlied@redhat.com>
2012-03-21drm/radeon: Update radeon_info_ioctl for SI. (v2)Michel Dänzer
v2: agd5f: add new MAX_PIPES param Signed-off-by: Michel Dänzer <michel.daenzer@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Dave Airlie <airlied@redhat.com>
2012-03-21drm/radeon/kms: add radeon_asic struct for SIAlex Deucher
Signed-off-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Dave Airlie <airlied@redhat.com>
2012-03-21drm/radeon/kms: add support for compute rings in CS ioctl on SIAlex Deucher
Very basic implementation for picking the ring priority. Signed-off-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Dave Airlie <airlied@redhat.com>
2012-03-21drm/radeon/kms: fill in startup/shutdown callbacks for SIAlex Deucher
Signed-off-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Dave Airlie <airlied@redhat.com>
2012-03-21drm/radeon/kms: add support for interrupts on SIAlex Deucher
This is mostly identical to evergreen/ni, however there are some additional fields in the IV vector for RINGID and VMID. Signed-off-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Dave Airlie <airlied@redhat.com>
2012-03-21drm/radeon/kms: Add support for RLC init on SIAlex Deucher
RLC handles the interrupt controller and other tasks on the GPU. Signed-off-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Dave Airlie <airlied@redhat.com>
2012-03-21drm/radeon/kms: add IB and fence dispatch functions for SIAlex Deucher
Support both IBs (DE) and CONST IBs (CE). Signed-off-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Dave Airlie <airlied@redhat.com>
2012-03-21drm/radeon/kms: add support for CP setup on SIAlex Deucher
Signed-off-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Dave Airlie <airlied@redhat.com>
2012-03-21drm/radeon/kms: add support for MC ucode loading on SIAlex Deucher
Signed-off-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Dave Airlie <airlied@redhat.com>
2012-03-21drm/radeon/kms: add ucode loading for SIAlex Deucher
Currently the driver required 5 sets of ucode: 1. pfp - pre-fetch parser, part of the CP 2. me - micro engine, part of the CP 3. ce - constant engine, part of the CP 4. rlc - interrupt controller 5. mc - memory controller Signed-off-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Dave Airlie <airlied@redhat.com>
2012-03-21drm/radeon/kms: Only VM CS ioctl is supported on SI (v2)Alex Deucher
v2: avoid double free. Signed-off-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Dave Airlie <airlied@redhat.com>
2012-03-21drm/radeon/kms: add VM CS checker for SIAlex Deucher
Signed-off-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Dave Airlie <airlied@redhat.com>
2012-03-21drm/radeon/kms: add support for the CONST IB to the CS ioctlAlex Deucher
This adds a new chunk id to the CS ioctl to support the INDIRECT_BUFFER_CONST packet. On SI, the CP adds a new engine called the CE (Constant Engine) which runs simulatenously with the DE (Drawing Engine, formerly called the ME). This allows the CP to process two related IBs simultaneously. The CE is tasked with loading the constant data (constant buffers, resource descriptors, samplers, etc.) while the DE loads context register state and issues drawing commands. It's up to the userspace application to sychronize the CE and the DE using special synchronization packets. Signed-off-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Dave Airlie <airlied@redhat.com>
2012-03-21drm/radeon/kms: add support for MC/VM setup on SIAlex Deucher
Sets up the VM and adds support for the new VM ioctls. Signed-off-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Dave Airlie <airlied@redhat.com>
2012-03-21drm/radeon/kms: Add support for SI GPU resetAlex Deucher
Signed-off-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Dave Airlie <airlied@redhat.com>
2012-03-21drm/radeon/kms: add gpu init support for SIAlex Deucher
Signed-off-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Dave Airlie <airlied@redhat.com>
2012-03-21drm/radeon/kms: add support for internal thermal sensor on SIAlex Deucher
Signed-off-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Dave Airlie <airlied@redhat.com>
2012-03-21drm/radeon/kms: update power table parsing for SIAlex Deucher
Signed-off-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Dave Airlie <airlied@redhat.com>
2012-03-21drm/radeon/kms/atom: add support for SI SetVoltage tableAlex Deucher
Signed-off-by: Alex Deucher <alexdeucher@gmail.com> Signed-off-by: Dave Airlie <airlied@redhat.com>
2012-03-21drm/radeon/kms: update comments about dig encoders/transmittersAlex Deucher
Signed-off-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Dave Airlie <airlied@redhat.com>
2012-03-21drm/radeon/kms: DP aux updates for DCE6Alex Deucher
DCE6 requires a non-0 value for lpAuxRequest for the ProcessAuxChannelTransaction command table. Setting lpAuxRequest to 0 is a special case used by AsicInit for setting up the aux pads. Signed-off-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Dave Airlie <airlied@redhat.com>
2012-03-21drm/radeon/kms/atom: add support for DCE6.x dig transmittersAlex Deucher
Signed-off-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Dave Airlie <airlied@redhat.com>
2012-03-21drm/radeon/kms: DCE6 disp eng pll updatesAlex Deucher
Rename the function to better match the functionality. DCPLL became PLL0 on DCE6. Signed-off-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Dave Airlie <airlied@redhat.com>
2012-03-21drm/radeon/kms/atom: add support for crtc power gatingAlex Deucher
Each pair of crtcs (0/1, 2/3, 4/5) can be power gated. Make sure the power is applied when the crtc is in use and only power down the pair when both are off. Signed-off-by: Alex Deucher <alexdeucher@gmail.com> Signed-off-by: Dave Airlie <airlied@redhat.com>
2012-03-21drm/radeon/kms/atom: DCE6 no longer has crtcmemreq bitsAlex Deucher
The hw no longer has the bits and the table is removed. Signed-off-by: Alex Deucher <alexdeucher@gmail.com> Signed-off-by: Dave Airlie <airlied@redhat.com>
2012-03-21drm/radeon/kms: fix up atom HPD gpio parsing for DCE6Alex Deucher
Signed-off-by: Alex Deucher <alexdeucher@gmail.com> Signed-off-by: Dave Airlie <airlied@redhat.com>
2012-03-21drm/radeon/kms: add initial DCE6 display watermark supportAlex Deucher
Signed-off-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Dave Airlie <airlied@redhat.com>
2012-03-21drm/radeon/kms: add SI chip familiesAlex Deucher
Signed-off-by: Alex Deucher <alexdeucher@gmail.com> Signed-off-by: Dave Airlie <airlied@redhat.com>
2012-03-21drm/radeon/kms: upstream power table updatesAlex Deucher
Signed-off-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Dave Airlie <airlied@redhat.com>
2012-03-21drm/radeon/kms: upstream atombios.h updatesAlex Deucher
Signed-off-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Dave Airlie <airlied@redhat.com>
2012-03-21drm/radeon/kms: Upstream ObjectID.h updatesAlex Deucher
Signed-off-by: Alex Deucher <alexdeucher@gmail.com> Signed-off-by: Dave Airlie <airlied@redhat.com>
2012-03-21drm/radeon/kms: add info query for max pipesTom Stellard
The maximum number of pipes is needed by the user space compute driver to calculate the number of wavefronts per thread group. Signed-off-by: Tom Stellard <thomas.stellard@amd.com> Signed-off-by: Dave Airlie <airlied@redhat.com>
2012-03-21SH: shmobile: Consolidate time keeping and irq enableRobert Lee
Enable core cpuidle timekeeping and irq enabling and remove that handling from this code. Signed-off-by: Robert Lee <rob.lee@linaro.org> Reviewed-by: Kevin Hilman <khilman@ti.com> Reviewed-by: Daniel Lezcano <daniel.lezcano@linaro.org> Acked-by: Jean Pihet <j-pihet@ti.com> Signed-off-by: Len Brown <len.brown@intel.com>
2012-03-21ARM: shmobile: Consolidate time keeping and irq enableRobert Lee
Enable core cpuidle timekeeping and irq enabling and remove that handling from this code. Signed-off-by: Robert Lee <rob.lee@linaro.org> Reviewed-by: Kevin Hilman <khilman@ti.com> Reviewed-by: Daniel Lezcano <daniel.lezcano@linaro.org> Acked-by: Jean Pihet <j-pihet@ti.com> Signed-off-by: Len Brown <len.brown@intel.com>
2012-03-21ARM: omap: Consolidate OMAP4 time keeping and irq enableRobert Lee
Enable core cpuidle timekeeping and irq enabling and remove that handling from this code. Signed-off-by: Robert Lee <rob.lee@linaro.org> Reviewed-by: Kevin Hilman <khilman@ti.com> Reviewed-by: Daniel Lezcano <daniel.lezcano@linaro.org> Acked-by: Jean Pihet <j-pihet@ti.com> Signed-off-by: Len Brown <len.brown@intel.com>
2012-03-21ARM: omap: Consolidate OMAP3 time keeping and irq enableRobert Lee
Use core cpuidle timekeeping and irqen wrapper and remove that handling from this code. Signed-off-by: Robert Lee <rob.lee@linaro.org> Reviewed-by: Kevin Hilman <khilman@ti.com> Reviewed-by: Daniel Lezcano <daniel.lezcano@linaro.org> Tested-by: Jean Pihet <j-pihet@ti.com> Acked-by: Jean Pihet <j-pihet@ti.com> Signed-off-by: Len Brown <len.brown@intel.com>
2012-03-21ARM: davinci: Consolidate time keeping and irq enableRobert Lee
Enable core cpuidle timekeeping and irq enabling and remove that handling from this code. Signed-off-by: Robert Lee <rob.lee@linaro.org> Reviewed-by: Kevin Hilman <khilman@ti.com> Reviewed-by: Daniel Lezcano <daniel.lezcano@linaro.org> Acked-by: Jean Pihet <j-pihet@ti.com> Signed-off-by: Len Brown <len.brown@intel.com>
2012-03-21ARM: kirkwood: Consolidate time keeping and irq enableRobert Lee
Enable core cpuidle timekeeping and irq enabling and remove that handling from this code. Signed-off-by: Robert Lee <rob.lee@linaro.org> Reviewed-by: Kevin Hilman <khilman@ti.com> Reviewed-by: Daniel Lezcano <daniel.lezcano@linaro.org> Acked-by: Jean Pihet <j-pihet@ti.com> Signed-off-by: Len Brown <len.brown@intel.com>
2012-03-21ARM: at91: Consolidate time keeping and irq enableRobert Lee
Enable core cpuidle timekeeping and irq enabling and remove that handling from this code. Signed-off-by: Robert Lee <rob.lee@linaro.org> Reviewed-by: Kevin Hilman <khilman@ti.com> Reviewed-by: Daniel Lezcano <daniel.lezcano@linaro.org> Acked-by: Jean Pihet <j-pihet@ti.com> Signed-off-by: Len Brown <len.brown@intel.com>
2012-03-21cpuidle: Add common time keeping and irq enablingRobert Lee
Make necessary changes to implement time keeping and irq enabling in the core cpuidle code. This will allow the removal of these functionalities from various platform cpuidle implementations whose timekeeping and irq enabling follows the form in this common code. Signed-off-by: Robert Lee <rob.lee@linaro.org> Tested-by: Jean Pihet <j-pihet@ti.com> Tested-by: Amit Daniel <amit.kachhap@linaro.org> Tested-by: Robert Lee <rob.lee@linaro.org> Reviewed-by: Kevin Hilman <khilman@ti.com> Reviewed-by: Daniel Lezcano <daniel.lezcano@linaro.org> Reviewed-by: Deepthi Dharwar <deepthi@linux.vnet.ibm.com> Acked-by: Jean Pihet <j-pihet@ti.com> Signed-off-by: Len Brown <len.brown@intel.com>
generated by cgit (git 2.34.1) at 2025-09-21 04:31:24 +0000