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2016-05-09ARC: [plat-eznps] Use dedicated SMP barriersNoam Camus
NPS device got 256 cores and each got 16 HW threads (SMT). We use EZchip dedicated ISA to trigger HW scheduler of the core that current HW thread belongs to. This scheduling makes sure that data beyond barrier is available to all HW threads in core and by that to all in device (4K). Signed-off-by: Noam Camus <noamc@ezchip.com> Cc: Peter Zijlstra <peterz@infradead.org>
2016-05-09ARC: [plat-eznps] Use dedicated atomic/bitops/cmpxchgNoam Camus
We need our own implementaions since we lack LLSC support. Our extended ISA provided with optimized solution for all 32bit operations we see in these three headers. Signed-off-by: Noam Camus <noamc@ezchip.com>
2016-05-09ARC: [plat-eznps] Use dedicated user stack topNoam Camus
NPS use special mapping right below TASK_SIZE. Hence we need to lower STACK_TOP so that user stack won't overlap NPS special mapping. Signed-off-by: Noam Camus <noamc@ezchip.com> Acked-by: Vineet Gupta <vgupta@synopsys.com>
2016-05-09ARC: [plat-eznps] Add eznps platformNoam Camus
This platform include boards: Hardware Emulator (HE) Simulator based upon nSIM. Signed-off-by: Noam Camus <noamc@ezchip.com>
2016-05-09ARC: [plat-eznps] Add eznps board defconfig and dtsNoam Camus
Adding default configuration file and DTS file Signed-off-by: Noam Camus <noamc@ezchip.com>
2016-05-09ARC: Mark secondary cpu online only after all HW setup is doneNoam Camus
In SMP setup, master loops for each_present_cpu calling cpu_up(). For ARC it returns as soon as new cpu's status becomes online, However secondary may still do HW initializing, machine or platform hook level. So turn secondary online only after all HW setup is done. Signed-off-by: Noam Camus <noamc@ezchip.com> Acked-by: Vineet Gupta <vgupta@synopsys.com>
2016-05-09ARC: rwlock: disable interrupts in !LLSC variantNoam Camus
If we hold rwlock and interrupt occures we may end up spinning on it for ever during softirq. Note that this lock is an internal lock and since the lock is free to be used from any context, the lock needs to be IRQ-safe. Below you may see an example for interrupt we get while nl_table_lock is holding its rw->lock_mutex and we spinned on it for ever. The concept for the fix was taken from SPARC. [2015-05-12 19:16:12] Stack Trace: [2015-05-12 19:16:12] arc_unwind_core+0xb8/0x11c [2015-05-12 19:16:12] dump_stack+0x68/0xac [2015-05-12 19:16:12] _raw_read_lock+0xa8/0xac [2015-05-12 19:16:12] netlink_broadcast_filtered+0x56/0x35c [2015-05-12 19:16:12] nlmsg_notify+0x42/0xa4 [2015-05-12 19:16:13] neigh_update+0x1fe/0x44c [2015-05-12 19:16:13] neigh_event_ns+0x40/0xa4 [2015-05-12 19:16:13] arp_process+0x46e/0x5a8 [2015-05-12 19:16:13] __netif_receive_skb_core+0x358/0x500 [2015-05-12 19:16:13] process_backlog+0x92/0x154 [2015-05-12 19:16:13] net_rx_action+0xb8/0x188 [2015-05-12 19:16:13] __do_softirq+0xda/0x1d8 [2015-05-12 19:16:14] irq_exit+0x8a/0x8c [2015-05-12 19:16:14] arch_do_IRQ+0x6c/0xa8 [2015-05-12 19:16:14] handle_interrupt_level1+0xe4/0xf0 Signed-off-by: Noam Camus <noamc@ezchip.com> Acked-by: Peter Zijlstra <peterz@infradead.org>
2016-05-09ARC: Make vmalloc size configurableNoam Camus
On ARC, lower 2G of address space is translated and used for - user vaddr space (region 0 to 5) - unused kernel-user gutter (region 6) - kernel vaddr space (region 7) where each region simply represents 256MB of address space. The kernel vaddr space of 256MB is used to implement vmalloc, modules So far this was enough, but not on EZChip system with 4K CPUs (given that per cpu mechanism uses vmalloc for allocating chunks) So allow VMALLOC_SIZE to be configurable by expanding down into the unused kernel-user gutter region which at default 256M was excessive anyways. Also use _BITUL() to fix a build error since PGDIR_SIZE cannot use "1UL" as called from assembly code in mm/tlbex.S Signed-off-by: Noam Camus <noamc@ezchip.com> [vgupta: rewrote changelog, debugged bootup crash due to int vs. hex] Acked-by: Vineet Gupta <vgupta@synopsys.com>
2016-05-09ARC: clean out UAPI byteorder.h clean off Kconfig symbolNoam Camus
UAPI header should not use Kconfig items Use __BIG_ENDIAN__ defined as a compiler intrinsic Signed-off-by: Noam Camus <noamc@ezchip.com> [vgupta: fix changelog] Signed-off-by: Vineet Gupta <vgupta@synopsys.com> Signed-off-by: Vineet Gupta <vgupta@synopsys.com>
2016-05-09irqchip: add nps Internal and external irqchipsNoam Camus
Adding EZchip NPS400 support. Internal interrupts are handled by Multi Thread Manager (MTM) Once interrupt is serviced MTM is acked for deactivating the interrupt. External interrupts are handled by MTM as well as at Global Interrupt Controller (GIC) e.g. serial and network devices. Signed-off-by: Noam Camus <noamc@ezchip.com> Acked-by: Marc Zyngier <marc.zyngier@arm.com> Acked-by: Vineet Gupta <vgupta@synopsys.com> Acked-by: Jason Cooper <jason@lakedaemon.net> Cc: Thomas Gleixner <tglx@linutronix.de>
2016-05-09clocksource: Add NPS400 timers driverNoam Camus
Add internal tick generator which is shared by all cores. Each cluster of cores view it through dedicated address. This is used for SMP system where all CPUs synced by same clock source. Signed-off-by: Noam Camus <noamc@ezchip.com> Cc: Daniel Lezcano <daniel.lezcano@linaro.org> Cc: Rob Herring <robh+dt@kernel.org> Cc: Thomas Gleixner <tglx@linutronix.de> Cc: John Stultz <john.stultz@linaro.org> Acked-by: Vineet Gupta <vgupta@synopsys.com> Acked-by: Daniel Lezcano <daniel.lezcano@linaro.org>
2016-05-09soc: Support for EZchip SoCNoam Camus
This header file is for NPS400 SoC. It includes macros for accessing memory mapped registers. These are functional registers that core can use to configure SoC. Signed-off-by: Noam Camus <noamc@ezchip.com> Acked-by: Daniel Lezcano <daniel.lezcano@linaro.org> Acked-by: Vineet Gupta <vgupta@synopsys.com>
2016-05-09Documentation: Add EZchip vendor to binding listNoam Camus
Add EZchip to vendor prefixes list. EZchip introduce the NPS platform for the ARC architecture. Signed-off-by: Noam Camus <noamc@ezchip.com> Acked-by: Rob Herring <robh+dt@kernel.org> Cc: Pawel Moll <pawel.moll@arm.com>
2016-05-09ARC: RIP arc_{get|set}_core_freq() clk APIAlexey Brodkin
There are no more users of this - so RIP! Signed-off-by: Alexey Brodkin <abrodkin@synopsys.com> [vgupta: update changelog] Signed-off-by: Vineet Gupta <vgupta@synopsys.com>
2016-05-09ARC: Don't try to use value of top level clock-frequency in DTAlexey Brodkin
We no longer use it and instead a real clk device such as fixed-clk instance is fed to timers etc. Signed-off-by: Alexey Brodkin <abrodkin@synopsys.com> [vgupta: broken out of a bigger patch, rewrote changelog] Signed-off-by: Vineet Gupta <vgupta@synopsys.com>
2016-05-09ARC: use fixed frequencies in arc_set_early_base_baud()Alexey Brodkin
UARTs usually have fixed clock so we're switching to use of constant values instead of something derived from core clock frequency. Among other things this will allow us to get rid of arc_{get|set}_core_freq() and switch to generic clock framework later on. Acked-by: Christian Ruppert <christian.ruppert@alitech.com> Signed-off-by: Alexey Brodkin <abrodkin@synopsys.com> Signed-off-by: Vineet Gupta <vgupta@synopsys.com>
2016-05-09ARC: [intc-*] switch to linear domainVineet Gupta
Now that we have Timers probed from DT, don't need legacy domain This however requires mapping to be called explicitly for the IRQ which still can't (and probably never) be probed from DT such as IPI and SOFTIRQ Acked-by: Marc Zyngier <marc.zyngier@arm.com> Signed-off-by: Vineet Gupta <vgupta@synopsys.com>
2016-05-09ARC: [intc-*] Do a domain lookup in primary handler for hwirq -> linux virqVineet Gupta
The primary interrupt handler arch_do_IRQ() was passing hwirq as linux virq to core code. This was fragile and worked so far as we only had legacy/linear domains. This came out of a rant by Marc Zyngier. http://lists.infradead.org/pipermail/linux-snps-arc/2015-December/000298.html Cc: Marc Zyngier <marc.zyngier@arm.com> Cc: Thomas Gleixner <tglx@linutronix.de> Cc: Noam Camus <noamc@ezchip.com> Signed-off-by: Vineet Gupta <vgupta@synopsys.com>
2016-05-09ARC: irq: export some IRQs againVineet Gupta
This will be needed for switching to linear irq domain as irq_create_mapping() called by intr code needs the IRQ numbers in addition to existing usage in mcip.c for requesting the irq Signed-off-by: Vineet Gupta <vgupta@synopsys.com>
2016-05-09ARC: clocksource: DT based probeVineet Gupta
- Remove explicit clocksource setup and let it be done by OF framework by defining CLOCKSOURCE_OF_DECLARE() for various timers - This allows multiple clocksources to be potentially registered simultaneouly: previously we could only do one - as all of them had same arc_counter_setup() routine for registration - Setup routines also ensure that the underlying timer actually exists. - Remove some of the panic() calls if underlying timer is NOT detected as fallback clocksource might still be available 1. If GRFC doesn't exist, jiffies clocksource gets registered anyways 2. if RTC doesn't exist, TIMER1 can take over (as it is always present) Cc: Daniel Lezcano <daniel.lezcano@linaro.org> Signed-off-by: Vineet Gupta <vgupta@synopsys.com>
2016-05-09ARC: clockevent: DT based probeVineet Gupta
- timer frequency is derived from DT (no longer rely on top level DT "clock-frequency" probed early and exported by asm/clk.h) - TIMER0_IRQ need not be exported across arch code, confined to intc as it is property of same - Any failures in clockevent setup are considered pedantic and system panic()'s as there is no generic fallback (unlike clocksource where a jiffies based soft clocksource always exists) Acked-by: Daniel Lezcano <daniel.lezcano@linaro.org> Signed-off-by: Vineet Gupta <vgupta@synopsys.com>
2016-05-09ARC: [dts] Introduce Timer bindingsVineet Gupta
ARC Timers have historically been probed directly. As precursor to start probing Timers thru DT introduce these bindings Note that to keep series bisectable, these bindings are not yet used in code. Cc: Daniel Lezcano <daniel.lezcano@linaro.org> Cc: devicetree@vger.kernel.org Acked-by: Rob Herring <robh@kernel.org> Signed-off-by: Vineet Gupta <vgupta@synopsys.com>
2016-05-09ARC: [dts] Add clk feeding into timers to DTsVineet Gupta
This allows us to introduce timers in DT in next commit The core clk frequency hack in AXS103 platform is also extended, where the core clk feeding into timers is updated in-place in FDT. Cc: Daniel Lezcano <daniel.lezcano@linaro.org> Cc: Rob Herring <robh@kernel.org> Cc: devicetree@vger.kernel.org Signed-off-by: Vineet Gupta <vgupta@synopsys.com>
2016-05-09ARC: [dts] Rename cpu_intc -> core_intcVineet Gupta
This is again for future changes to use common DTSI for timers which refer to @core_intc Signed-off-by: Vineet Gupta <vgupta@synopsys.com>
2016-05-09ARCv2: [dts]: Introduce HS38 specific include DTS ...Vineet Gupta
... and add them to plat-sim DTS. This allows for future change to introduce timers in DT in single place Signed-off-by: Vineet Gupta <vgupta@synopsys.com>
2016-05-09ARC: clockevent: Prepare for DT based probeNoam Camus
- call clocksource_probe() - This in turns needs of_clk_init() to be called earlier Cc: Daniel Lezcano <daniel.lezcano@linaro.org> Signed-off-by: Noam Camus <noamc@ezchip.com> [vgupta: broken off from a bigger patch] Signed-off-by: Vineet Gupta <vgupta@synopsys.com>
2016-05-09ARC: clockevent: switch to cpu notifier for clockevent setupNoam Camus
ARC Timers so far have been handled as "legacy" w/o explicit description in DT. This poses challenge for newer platforms wanting to use them. This series will eventually help move timers over to DT. This patch does a small change of using a CPU notifier to set clockevent on non-boot CPUs. So explicit setup is done only on boot CPU (which will later be done by DT) Signed-off-by: Noam Camus <noamc@ezchip.com> [vgupta: broken off from a bigger patch] Signed-off-by: Vineet Gupta <vgupta@synopsys.com>
2016-05-09ARC: [plat-axs] Refactor core freq get/setVineet Gupta
Reduces diff in future patches ! Signed-off-by: Vineet Gupta <vgupta@synopsys.com>
2016-05-09ARC: opencode arc_request_percpu_irqVineet Gupta
- The idea is to remove the API usage since it has a subltle design flaw - relies on being called on cpu0 first. This is true for some early per cpu irqs such as TIMER/IPI, but not for late probed per cpu peripherals such a perf. And it's usage in perf has already bitten us once: see c6317bc7c5ab ("ARCv2: perf: Ensure perf intr gets enabled on all cores") where we ended up open coding it anyways - The seeming duplication will go away once we start using cpu notifier for timer setup Signed-off-by: Vineet Gupta <vgupta@synopsys.com>
2016-05-09ARC: [intc-compact] setup TIMER as percpu_devVineet Gupta
This removes the quirk from arc_request_percpu_irq() and paves way for future simplifications Signed-off-by: Vineet Gupta <vgupta@synopsys.com>
2016-05-09ifb: support more featuresEric Dumazet
When using ifb+netem on ingress on SIT/IPIP/GRE traffic, GRO packets are not properly processed. Segmentation should not be forced, since ifb is already adding quite a performance hit. Signed-off-by: Eric Dumazet <edumazet@google.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2016-05-08net: make sch_handle_ingress() drop monitor readyEric Dumazet
TC_ACT_STOLEN is used when ingress traffic is mirred/redirected to say ifb. Packet is not dropped, but consumed. Only TC_ACT_SHOT is a clear indication something went wrong. Signed-off-by: Eric Dumazet <edumazet@google.com> Cc: Jamal Hadi Salim <jhs@mojatatu.com> Acked-by: Alexei Starovoitov <ast@kernel.org> Acked-by: Jamal Hadi Salim <jhs@mojatatu.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2016-05-08ISDN: eicon: replace custom hex_asc_lo() / hex_pack_byte()Andy Shevchenko
Instead of custom approach re-use generic helpers to convert byte to hex format. Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2016-05-08Documentation/networking: more accurate LCO explanationShmulik Ladkani
In few places the term "ones-complement sum" was used but the actual meaning is "the complement of the ones-complement sum". Also, avoid enclosing long statements with underscore, to ease readability. Signed-off-by: Shmulik Ladkani <shmulik.ladkani@gmail.com> Acked-by: Edward Cree <ecree@solarflare.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2016-05-08fq_codel: add memory limitation per queueEric Dumazet
On small embedded routers, one wants to control maximal amount of memory used by fq_codel, instead of controlling number of packets or bytes, since GRO/TSO make these not practical. Assuming skb->truesize is accurate, we have to keep track of skb->truesize sum for skbs in queue. This patch adds a new TCA_FQ_CODEL_MEMORY_LIMIT attribute. I chose a default value of 32 MBytes, which looks reasonable even for heavy duty usages. (Prior fq_codel users should not be hurt when they upgrade their kernels) Two fields are added to tc_fq_codel_qd_stats to report : - Current memory usage - Number of drops caused by memory limits # tc qd replace dev eth1 root est 1sec 4sec fq_codel memory_limit 4M .. # tc -s -d qd sh dev eth1 qdisc fq_codel 8008: root refcnt 257 limit 10240p flows 1024 quantum 1514 target 5.0ms interval 100.0ms memory_limit 4Mb ecn Sent 2083566791363 bytes 1376214889 pkt (dropped 4994406, overlimits 0 requeues 21705223) rate 9841Mbit 812549pps backlog 3906120b 376p requeues 21705223 maxpacket 68130 drop_overlimit 4994406 new_flow_count 28855414 ecn_mark 0 memory_used 4190048 drop_overmemory 4994406 new_flows_len 1 old_flows_len 177 Signed-off-by: Eric Dumazet <edumazet@google.com> Cc: Jesper Dangaard Brouer <brouer@redhat.com> Cc: Dave Täht <dave.taht@gmail.com> Cc: Sebastian Möller <moeller0@gmx.de> Signed-off-by: David S. Miller <davem@davemloft.net>
2016-05-08net: Add Qualcomm IPC routerCourtney Cavin
Add an implementation of Qualcomm's IPC router protocol, used to communicate with service providing remote processors. Signed-off-by: Courtney Cavin <courtney.cavin@sonymobile.com> Signed-off-by: Bjorn Andersson <bjorn.andersson@sonymobile.com> [bjorn: Cope with 0 being a valid node id and implement RTM_NEWADDR] Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org> Signed-off-by: David S. Miller <davem@davemloft.net>
2016-05-08soc: qcom: smd: Introduce compile stubsBjorn Andersson
Introduce compile stubs for the SMD API, allowing consumers to be compile tested. Acked-by: Andy Gross <andy.gross@linaro.org> Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org> Signed-off-by: David S. Miller <davem@davemloft.net>
2016-05-08macvtap: segmented packet is consumedEric Dumazet
If GSO packet is segmented and its segments are properly queued, we call consume_skb() instead of kfree_skb() to be drop monitor friendly. Fixes: 3e4f8b7873709 ("macvtap: Perform GSO on forwarding path.") Signed-off-by: Eric Dumazet <edumazet@google.com> Cc: Vlad Yasevich <vyasevic@redhat.com> Reviewed-by: Shmulik Ladkani <shmulik.ladkani@gmail.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2016-05-08tools: bpf_jit_disasm: check for klogctl failureColin Ian King
klogctl can fail and return -ve len, so check for this and return NULL to avoid passing a (size_t)-1 to malloc. Signed-off-by: Colin Ian King <colin.king@canonical.com> Acked-by: Daniel Borkmann <daniel@iogearbox.net> Signed-off-by: David S. Miller <davem@davemloft.net>
2016-05-08qede: uninitialized variable in qede_start_xmit()Dan Carpenter
"data_split" was never set to false. It's just uninitialized. Fixes: 2950219d87b0 ('qede: Add basic network device support') Signed-off-by: Dan Carpenter <dan.carpenter@oracle.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2016-05-08Linux 4.6-rc7v4.6-rc7Linus Torvalds
2016-05-08clk: rockchip: fix the rk3399 sdmmc sample / drv nameDouglas Anderson
The rk3399 clock table had a simple typo in it, calling the SDMMC sample and drive clocks by the wrong name. Fix this minor typo. Signed-off-by: Douglas Anderson <dianders@chromium.org> Tested-by: Brian Norris <briannorris@chromium.org> Acked-by: Brian Norris <briannorris@chromium.org> Signed-off-by: Heiko Stuebner <heiko@sntech.de>
2016-05-08ARM: sun7i: dt: Add pll3 and pll7 clocksPriit Laes
Enable pll3 and pll7 clocks that are needed by display clocks. Signed-off-by: Priit Laes <plaes@plaes.org> Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
2016-05-08ARM: dts: sunxi: Add a olinuxino-lime2-emmcOlliver Schinagl
There are 3 kinds of OLinuXino Lime2 boards. One without any on board storage, one with NAND storage and one with eMMC storage. This patch adds the eMMC variant of boards. eMMC storage is different from a regular SD card in that it is soldered on the board and cannot be changed. Additionally, it shares pins with the NAND module and with the second SPI port. Signed-off-by: Olliver Schinagl <oliver@schinagl.nl> [Maxime: Removed the change log from the commit log] Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
2016-05-08mailbox: Fix devm_ioremap_resource error detection codeAmitoj Kaur Chawla
devm_ioremap_resource returns an ERR_PTR value, not NULL, on failure. The Coccinelle semantic patch used to make this change is as follows: @@ expression e,e1; statement S; @@ *e = devm_ioremap_resource(...); if (!e1) S Signed-off-by: Amitoj Kaur Chawla <amitoj1606@gmail.com> Signed-off-by: Jassi Brar <jaswinder.singh@linaro.org>
2016-05-08ALSA: hda: fix to wait for RIRB & CORB DMA to setJeeja KP
If the DMAs are not being quiesced properly, it may lead to stability issues, so the recommendation is to wait till DMAs are stopped. After setting the stop bit of RIRB/CORB DMA, we should wait for stop bit to be set. Signed-off-by: Jeeja KP <jeeja.kp@intel.com> Signed-off-by: Vinod Koul <vinod.koul@intel.com> Signed-off-by: Takashi Iwai <tiwai@suse.de>
2016-05-08ALSA: hda: fix the missing ptr initializationVinod Koul
ebus is a member of extended device and was never initialized, so do this at device creation. Signed-off-by: Jeeja KP <jeeja.kp@intel.com> Signed-off-by: Vinod Koul <vinod.koul@intel.com> Signed-off-by: Takashi Iwai <tiwai@suse.de>
2016-05-08ALSA: usb-midi: correct speed checkingOliver Neukum
Allow for SS+ USB devices Signed-off-by: Oliver Neukum <oneukum@suse.com> Signed-off-by: Takashi Iwai <tiwai@suse.de>
2016-05-08ALSA: usb-audio: correct speed checkingOliver Neukum
Allow handling SS+ USB devices correctly. Signed-off-by: Oliver Neukum <oneukum@suse.com> Signed-off-by: Takashi Iwai <tiwai@suse.de>
2016-05-08ALSA: hda/realtek - New codecs support for ALC234/ALC274/ALC294Kailang Yang
Support new codecs for ALC234/ALC274/ALC294. This three codecs was the same IC. But bonding is not the same. Signed-off-by: Kailang Yang <kailang@realtek.com> Cc: <stable@vger.kernel.org> Signed-off-by: Takashi Iwai <tiwai@suse.de>
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