| Age | Commit message (Collapse) | Author |
|---|
|
This patch moves the validation for all the suspend prerequisites to be
done at SUSPEND_PREPARE notification. Previously in the SDIO case parts
of the validation was done from mmc_suspend_host.
This patch invents a new pre_suspend bus_ops callback and implements it
for SDIO. Returning an error code from it, will mean at SUSPEND_PREPARE
notification, the card will be removed before proceeding with the
suspend sequence.
Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
Tested-by: Jaehoon Chung <jh80.chung@samsung.com>
Signed-off-by: Chris Ball <cjb@laptop.org>
|
|
For every bus_ops type the .remove callback always exist, thus there
are no need to check the existence of it, before we decide to call it.
Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
Tested-by: Jaehoon Chung <jh80.chung@samsung.com>
Signed-off-by: Chris Ball <cjb@laptop.org>
|
|
Use managed resources for the mmio memory region and the clock.
Makes the code a bit shorter.
Signed-off-by: Lars-Peter Clausen <lars@metafoo.de>
Signed-off-by: Chris Ball <cjb@laptop.org>
|
|
Use the slot-gpio helpers to handle the write protect and card detect
GPIO pins instead of re-implementing the same functionality in the driver.
Signed-off-by: Lars-Peter Clausen <lars@metafoo.de>
Signed-off-by: Chris Ball <cjb@laptop.org>
|
|
It's a bit shorter than open-conding it. While we are at it also make
jz4740_mmc_pm_ops static.
Signed-off-by: Lars-Peter Clausen <lars@metafoo.de>
Signed-off-by: Chris Ball <cjb@laptop.org>
|
|
For no reason, the code handling write errors was implemented while
the code handling read errors was missing.
Signed-off-by: Paul Cercueil <paul@crapouillou.net>
Signed-off-by: Lars-Peter Clausen <lars@metafoo.de>
Signed-off-by: Chris Ball <cjb@laptop.org>
|
|
Signed-off-by: Paul Cercueil <paul@crapouillou.net>
Signed-off-by: Lars-Peter Clausen <lars@metafoo.de>
Signed-off-by: Chris Ball <cjb@laptop.org>
|
|
The following error randomly appears on an imx6q board where gpio is
used to implement card-detection when mounting EXT4 rootfs during boot.
mmc1: Card removed during transfer!
mmc1: Resetting controller.
mmcblk0: unknown error -123 sending read/write command, card status 0x900
end_request: I/O error, dev mmcblk0, sector 106744
EXT4-fs error (device mmcblk0p2): ext4_find_entry:1312: inode #5011: comm swapper/0: reading directory lblock 0
It turns out that the error message comes from the card removal check
in function sdhci_card_event(). While we have a well implemented
function sdhci_do_get_cd() handling all the possible cases of
CD, the current code only checks controller internal CD case. That
causes problem for other CD cases like gpio on above imx6q board.
Improve the check by using sdhci_do_get_cd() to cover all possible CD
cases, so that above error on the imx6q board gets fixed.
Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
Signed-off-by: Chris Ball <cjb@laptop.org>
|
|
As of now we rely on code outside of the driver to set the ciu clock
frequency. There's no reason to do that. Add support for setting up
the clock in the driver during probe.
Signed-off-by: Doug Anderson <dianders@chromium.org>
Acked-by: Jaehoon Chung <jh80.chung@samsung.com>
Signed-off-by: Chris Ball <cjb@laptop.org>
|
|
It is possible to specify a regulator that should be turned on when
dw_mmc is probed. At the moment dw_mmc will fail to use the regulator
properly if the regulator probes after dw_mmc. Fix this problem by
honoring EPROBE_DEFER.
At the same time move the regulator code out of the slot init code.
We only specify one regulator for the whole device and other parts of
the code (like suspend/resume) assume that the regulator has only been
enabled once.
Signed-off-by: Doug Anderson <dianders@chromium.org>
Signed-off-by: Chris Ball <cjb@laptop.org>
|
|
In order to make it possible to reduce the SD bus frequency,
parse the optional "max-frequency" attribute as documented in
devicetree/bindings/mmc/mmc.txt
Signed-off-by: Lucas Stach <l.stach@pengutronix.de>
Acked-by: Shawn Guo <shawn.guo@linaro.org>
Signed-off-by: Chris Ball <cjb@laptop.org>
|
|
The SDCLK is divided down from the host controller clock. Host
controller clock may be different from the maximum SDCLK, so
get it from the platform, instead of just using the max SDCLK.
Signed-off-by: Lucas Stach <l.stach@pengutronix.de>
Acked-by: Shawn Guo <shawn.guo@linaro.org>
Signed-off-by: Chris Ball <cjb@laptop.org>
|
|
Inside the routine mmc_blk_ioctl_cmd() the sanitize command is
identified according to the value of bits 16-23 of the argument.
but what happens if a different command is sent, and only by
chance, bits 16-23 contain the value of SANITIZE command ?
In that case a SANITIZE command will be falsely identified.
In order to prevent such a case, the condition is expanded and
now it also checks the opcode itself, and verifies that it is an
MMC_SWITCH opcode.
Signed-off-by: Yaniv Gardi <ygardi@codeaurora.org>
Signed-off-by: Chris Ball <cjb@laptop.org>
|
|
Header file not needed anymore as we have removed the calls to
cpu_is_xxx() macro.
Signed-off-by: Nicolas Ferre <nicolas.ferre@atmel.com>
Acked-by: Ludovic Desroches <ludovic.desroches@atmel.com>
Acked-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
Signed-off-by: Chris Ball <cjb@laptop.org>
|
|
The PCI driver is getting simplier and tidier with pcim_* and devm_*
functions in use.
Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
Acked-by: Seungwon Jeon <tgih.jun@samsung.com>
Signed-off-by: Chris Ball <cjb@laptop.org>
|
|
In few places usage of ret variable is not needed.
This patch simplifies those pieces of code.
Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
Acked-by: Seungwon Jeon <tgih.jun@samsung.com>
Signed-off-by: Chris Ball <cjb@laptop.org>
|
|
devm_ioremap_resource does sanity checks on the given resource.
No need to duplicate this in the driver.
Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
Acked-by: Seungwon Jeon <tgih.jun@samsung.com>
Signed-off-by: Chris Ball <cjb@laptop.org>
|
|
We had a multi-partition SD-Card with two ext2 file systems. The partition
table was getting overwritten by a race between the card removal and
the unmount of the 2nd ext2 partition.
What was observed:
1. Suspend/resume would call to remove the device. The clearing
of the device information is done asynchronously.
2. A request is made to unmount the file system (this is called
after the removal has started).
3. The remapping table was cleared by the asynchronous part of
the device removal.
4. A write request to the super block (block 0 of the partition)
was sent down and instead of being remapped to the partition
offset, it was remapped to block 0 of the device which is where
the partition table is located.
5. Write was queued and written resulting in the overwriting
of the partition table with the ext2 super block.
6. The mmc_queue is cleaned up.
The mmc card device driver used to access SD cards, was calling del_gendisk
before calling mmc_cleanup-queue. The comment in the mmc_blk_remove_req
code indicated that it expected del_gendisk to block all further requests
from being queued but it doesn't. The mmc driver uses the presences of the
mmc_queue to determine if the request should be queued.
The fix was to clean up the mmc_queue before the rest of the
the delete partition code is called.
This prevents the overwriting of the partition table.
However, the umount gets an error trying to write the super block.
The umount should be issued before the device is removed but that
is not always possible. The umount is still needed to cleanup other
data structures.
Addresses the problem described in http://crbug.com/240815
Signed-off-by: Paul Taysom <taysom@chromium.org>
Signed-off-by: Chris Ball <cjb@laptop.org>
|
|
Patch "mmc: sdhci: Add size for caller in init+register" changed the
interface for sdhci_pltfm_init, while patch "mmc: sdhci-sirf: add mmc
host sdhci-pltfm based driver for SiRF SoCs" added a new driver
with the old interface.
This changes the sirf driver to use the new interface, avoiding
one warning, and simplifying the init sequence. Since we're here
already, this also adds an error path for failed clk_prepare_enable.
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Acked-by: Christian Daudt <csd@broadcom.com>
Signed-off-by: Chris Ball <cjb@laptop.org>
|
|
Use the wrapper functions for getting and setting the driver data using
platform_device instead of using dev_{get,set}_drvdata() with &pdev->dev,
so we can directly pass a struct platform_device.
Signed-off-by: Jingoo Han <jg1.han@samsung.com>
Acked-by: Michał Mirosław <mirq-linux@rere.qmqm.pl>
Signed-off-by: Chris Ball <cjb@laptop.org>
|
|
Fix to return a negative error code instead of 0 when we cannot get
IRQ source by platform_get_irq(), as done elsewhere in this function.
Signed-off-by: Wei Yongjun <yongjun_wei@trendmicro.com.cn>
Acked-by: Guennadi Liakhovetski <g.liakhovetski@gmx.de>
Signed-off-by: Chris Ball <cjb@laptop.org>
|
|
Fix to return a negative error code in the gpio_to_irq() error
handling case instead of 0, as done elsewhere in this function.
Signed-off-by: Wei Yongjun <yongjun_wei@trendmicro.com.cn>
Reviewed-by: Jingoo Han <jg1.han@samsung.com>
Acked-by: Adrian Hunter <adrian.hunter@intel.com>
Signed-off-by: Chris Ball <cjb@laptop.org>
|
|
At Interrupt status register, Bit9 is Data Read Timeout.
But we used macro name as the DTO. It could be confused with the
Data Transfer Over(DTO)-Bit[3].
It's clearly that is changed the DRTO instead of DTO.
Signed-off-by: Jaehoon Chung <jh80.chung@samsung.com>
Reviewed-by: James Hogan <james.hogan@imgtec.com>
Acked-by: Seungwon Jeon <tgih.jun@samsung.com>
Signed-off-by: Chris Ball <cjb@laptop.org>
|
|
This adds dpm support for rv6xx asics. This includes:
- clockgating
- dynamic engine clock scaling
- dynamic memory clock scaling
- dynamic voltage scaling
- dynamic pcie gen1/gen2 switching
Set radeon.dpm=1 to enable.
v2: remove duplicate line
v3: fix thermal interrupt check noticed by Jerome
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
|
|
This adds dpm support for rs780/rs880 asics. This includes:
- clockgating
- dynamic engine clock scaling
- dynamic voltage scaling
set radeon.dpm=1 to enable it.
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
|
|
These are shared by rs780/rs880, rv6xx, and newer chips.
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
|
|
Calculate the low and high watermarks based on the low and high
clocks for the current power state. The dynamic pm hw will select
the appropriate watermark based on the internal dpm state.
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
|
|
Calculate the low and high watermarks based on the low and high
clocks for the current power state. The dynamic pm hw will select
the appropriate watermark based on the internal dpm state.
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
|
|
Calculate the low and high watermarks based on the low and high
clocks for the current power state. The dynamic pm hw will select
the appropriate watermark based on the internal dpm state.
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
|
|
calculate the low and high watermarks based on the low and high
clocks for the current power state. The dynamic pm hw will select
the appropriate watermark based on the internal dpm state.
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
|
|
This adds the common dpm (dynamic power management)
infrastructure:
- dpm callbacks
- dpm init/fini/suspend/resume
- dpm power state selection
No device specific code is enabled yet.
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
|
|
Has a different dpm controller than r600.
v2: rebase on gpu reset changes
v3: rebase on get_xclk changes
v4: update rptr/wtpr callbacks
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
|
|
dpm needs access to atombios data and command tables
for setup and calculation of a number of parameters.
v2: endian fix
v3: fix mc reg table bug
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
|
|
This is required for certain advanced functionality.
v2: save/restore list takes dword offsets
v3: rebase on gpu reset changes
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
|
|
Avoids confusion and duplication.
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
|
|
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
|
|
Since commit ab78029 (drivers/pinctrl: grab default handles from
device core), we can rely on device core for handling pinctrl.
So remove devm_pinctrl_get_select_default() from the driver.
Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
Signed-off-by: Chris Ball <cjb@laptop.org>
|
|
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
|
|
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
|
|
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
|
|
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
|
|
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
|
|
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
|
|
v2: fix up for latest reset changes
v3: use CP for pt updates for now
v4: update for 2 level PTs
v5: update for ib_parse removal
v6: vm_flush api change
v7: rebase
v8: fix gfx ring function pointers
v9: fix vm_set_page function params
v10: update for compute changes
v11: cleanup for release
v12: update rptr/wptr callbacks
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
|
|
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
|
|
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
|
|
The compute rings use RELEASE_MEM rather then EOP
packets for writing fences and there is no SYNC_PFP_ME
packet on the compute rings.
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
|
|
Type 2 packets are deprecated on CIK MEC and we should use
type 3 nop packets. Setting the count field to the max value
(0x3fff) indicates that only one dword should be skipped
like a type 2 packet.
v2: add comment to code
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Reviewed-by: Jerome Glisse <jglisse@redhat.com>
|
|
On CIK, the compute rings work slightly differently than
on previous asics, however the basic concepts are the same.
The main differences:
- New MEC engines for compute queues
- Multiple queues per MEC:
- CI/KB: 1 MEC, 4 pipes per MEC, 8 queues per pipe = 32 queues
- KV: 2 MEC, 4 pipes per MEC, 8 queues per pipe = 64 queues
- Queues can be allocated and scheduled by another queue
- New doorbell aperture allows you to assign space in the aperture
for the wptr which allows for userspace access to queues
v2: add wptr shadow, fix eop setup
v3: fix comment
v4: switch to new callback method
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Reviewed-by: Jerome Glisse <jglisse@redhat.com>
|
|
The doorbell aperture is a PCI BAR whose pages can be
mapped to compute resources for things like wptrs
for userspace queues.
This patch maps the BAR and sets up a simple allocator
to allocate pages from the BAR.
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
|
