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2024-04-22drm/gud: switch to struct drm_edidJani Nikula
Prefer struct drm_edid based functions over struct edid. Reviewed-by: Noralf Trønnes <noralf@tronnes.org> Link: https://patchwork.freedesktop.org/patch/msgid/c519a9b9d3c3c9a413de33b99b97a1120f774f2d.1713273659.git.jani.nikula@intel.com Signed-off-by: Jani Nikula <jani.nikula@intel.com>
2024-04-22drm/vc4: hdmi: switch to struct drm_edidJani Nikula
Prefer struct drm_edid based functions over struct edid. Acked-by: Maxime Ripard <mripard@kernel.org> Link: https://patchwork.freedesktop.org/patch/msgid/eabece3ca7fae28395dcad0d2c221113cd924180.1713273659.git.jani.nikula@intel.com Signed-off-by: Jani Nikula <jani.nikula@intel.com>
2024-04-22drm/sun4i: hdmi: switch to struct drm_edidJani Nikula
Prefer struct drm_edid based functions over struct edid. Acked-by: Maxime Ripard <mripard@kernel.org> Link: https://patchwork.freedesktop.org/patch/msgid/0967dde8ae35cd58ab8ea58397d514bb9df29fd1.1713273659.git.jani.nikula@intel.com Signed-off-by: Jani Nikula <jani.nikula@intel.com>
2024-04-22drm/panel-edp: switch to struct drm_edidJani Nikula
Prefer struct drm_edid based functions over struct edid. Reviewed-by: Neil Armstrong <neil.armstrong@linaro.org> Link: https://patchwork.freedesktop.org/patch/msgid/a68ee923449a70cc7a59d0d3c96b0bb6764296bd.1713273659.git.jani.nikula@intel.com Signed-off-by: Jani Nikula <jani.nikula@intel.com>
2024-04-22drm/panel-samsung-atna33xc20: switch to struct drm_edidJani Nikula
Prefer struct drm_edid based functions over struct edid. Reviewed-by: Neil Armstrong <neil.armstrong@linaro.org> Link: https://patchwork.freedesktop.org/patch/msgid/4ec5ec3ac5c5fbe738f51aeeb4363de1a9672684.1713273659.git.jani.nikula@intel.com Signed-off-by: Jani Nikula <jani.nikula@intel.com>
2024-04-22drm/panel: simple: switch to struct drm_edidJani Nikula
Prefer struct drm_edid based functions over struct edid. Reviewed-by: Neil Armstrong <neil.armstrong@linaro.org> Link: https://patchwork.freedesktop.org/patch/msgid/869e91527e8f9da054d776ed6109c7a6bc6151cb.1713273659.git.jani.nikula@intel.com Signed-off-by: Jani Nikula <jani.nikula@intel.com>
2024-04-22drm/xe/guc: Fix arguments passed to relay G2H handlersMichal Wajdeczko
By default CT code was passing just payload of the G2H event message, while Relay code expects full G2H message including HXG header which contains DATA0 field. Fix that. Fixes: 26d4481ac23f ("drm/xe/guc: Start handling GuC Relay event messages") Signed-off-by: Michal Wajdeczko <michal.wajdeczko@intel.com> Reviewed-by: Piotr Piórkowski <piotr.piorkowski@intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/20240419150351.358-1-michal.wajdeczko@intel.com
2024-04-22drm/xe/pf: Fix xe_gt_sriov_pf_config_print_available_ggtt()Michal Wajdeczko
This function is using internal helper pf_get_spare_ggtt() that expects PF's master mutex to be locked. Fix that. Fixes: ac6598aed1b3 ("drm/xe/pf: Add support to configure SR-IOV VFs") Signed-off-by: Michal Wajdeczko <michal.wajdeczko@intel.com> Cc: Piotr Piórkowski <piotr.piorkowski@intel.com> Reviewed-by: Piotr Piórkowski <piotr.piorkowski@intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/20240419141000.314-1-michal.wajdeczko@intel.com
2024-04-22drm/tests: Add a test case for drm buddy clear allocationArunpravin Paneer Selvam
Add a new test case for the drm buddy clear and dirty allocation. v2:(Matthew) - make size as u32 - rename PAGE_SIZE with SZ_4K - dont fragment the address space for all the order allocation iterations. we can do it once and just increment and allocate the size. - create new mm with non power-of-two size to ensure the multi-root force_merge during fini. v3: - add randomness in size calculation(Matthew) Signed-off-by: Arunpravin Paneer Selvam <Arunpravin.PaneerSelvam@amd.com> Reviewed-by: Matthew Auld <matthew.auld@intel.com> Suggested-by: Matthew Auld <matthew.auld@intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/20240419063538.11957-3-Arunpravin.PaneerSelvam@amd.com Signed-off-by: Christian König <christian.koenig@amd.com>
2024-04-22drm/amdgpu: Enable clear page functionalityArunpravin Paneer Selvam
Add clear page support in vram memory region. v1(Christian): - Dont handle clear page as TTM flag since when moving the BO back in from GTT again we don't need that. - Make a specialized version of amdgpu_fill_buffer() which only clears the VRAM areas which are not already cleared - Drop the TTM_PL_FLAG_WIPE_ON_RELEASE check in amdgpu_object.c v2: - Modify the function name amdgpu_ttm_* (Alex) - Drop the delayed parameter (Christian) - handle amdgpu_res_cleared(&cursor) just above the size calculation (Christian) - Use AMDGPU_GEM_CREATE_VRAM_WIPE_ON_RELEASE for clearing the buffers in the free path to properly wait for fences etc.. (Christian) v3(Christian): - Remove buffer clear code in VRAM manager instead change the AMDGPU_GEM_CREATE_VRAM_WIPE_ON_RELEASE handling to set the DRM_BUDDY_CLEARED flag. - Remove ! from amdgpu_res_cleared(&cursor) check. v4(Christian): - vres flag setting move to vram manager file - use dma_fence_get_stub in amdgpu_ttm_clear_buffer function - make fence a mandatory parameter and drop the if and the get/put dance Signed-off-by: Arunpravin Paneer Selvam <Arunpravin.PaneerSelvam@amd.com> Suggested-by: Christian König <christian.koenig@amd.com> Acked-by: Felix Kuehling <felix.kuehling@amd.com> Link: https://patchwork.freedesktop.org/patch/msgid/20240419063538.11957-2-Arunpravin.PaneerSelvam@amd.com Signed-off-by: Christian König <christian.koenig@amd.com>
2024-04-22drm/buddy: Implement tracking clear page featureArunpravin Paneer Selvam
- Add tracking clear page feature. - Driver should enable the DRM_BUDDY_CLEARED flag if it successfully clears the blocks in the free path. On the otherhand, DRM buddy marks each block as cleared. - Track the available cleared pages size - If driver requests cleared memory we prefer cleared memory but fallback to uncleared if we can't find the cleared blocks. when driver requests uncleared memory we try to use uncleared but fallback to cleared memory if necessary. - When a block gets freed we clear it and mark the freed block as cleared, when there are buddies which are cleared as well we can merge them. Otherwise, we prefer to keep the blocks as separated. - Add a function to support defragmentation. v1: - Depends on the flag check DRM_BUDDY_CLEARED, enable the block as cleared. Else, reset the clear flag for each block in the list(Christian) - For merging the 2 cleared blocks compare as below, drm_buddy_is_clear(block) != drm_buddy_is_clear(buddy)(Christian) - Defragment the memory beginning from min_order till the required memory space is available. v2: (Matthew) - Add a wrapper drm_buddy_free_list_internal for the freeing of blocks operation within drm buddy. - Write a macro block_incompatible() to allocate the required blocks. - Update the xe driver for the drm_buddy_free_list change in arguments. - add a warning if the two blocks are incompatible on defragmentation - call full defragmentation in the fini() function - place a condition to test if min_order is equal to 0 - replace the list with safe_reverse() variant as we might remove the block from the list. v3: - fix Gitlab user reported lockup issue. - Keep DRM_BUDDY_HEADER_CLEAR define sorted(Matthew) - modify to pass the root order instead max_order in fini() function(Matthew) - change bool 1 to true(Matthew) - add check if min_block_size is power of 2(Matthew) - modify the min_block_size datatype to u64(Matthew) v4: - rename the function drm_buddy_defrag with __force_merge. - Include __force_merge directly in drm buddy file and remove the defrag use in amdgpu driver. - Remove list_empty() check(Matthew) - Remove unnecessary space, headers and placement of new variables(Matthew) - Add a unit test case(Matthew) v5: - remove force merge support to actual range allocation and not to bail out when contains && split(Matthew) - add range support to force merge function. v6: - modify the alloc_range() function clear page non merged blocks allocation(Matthew) - correct the list_insert function name(Matthew). Signed-off-by: Arunpravin Paneer Selvam <Arunpravin.PaneerSelvam@amd.com> Signed-off-by: Matthew Auld <matthew.auld@intel.com> Suggested-by: Christian König <christian.koenig@amd.com> Suggested-by: Matthew Auld <matthew.auld@intel.com> Reviewed-by: Matthew Auld <matthew.auld@intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/20240419063538.11957-1-Arunpravin.PaneerSelvam@amd.com Signed-off-by: Christian König <christian.koenig@amd.com>
2024-04-22ACPI: CPPC: Fix access width used for PCC registersVanshidhar Konda
commit 2f4a4d63a193 ("ACPI: CPPC: Use access_width over bit_width for system memory accesses") modified cpc_read()/cpc_write() to use access_width to read CPC registers. However, for PCC registers the access width field in the ACPI register macro specifies the PCC subspace ID. For non-zero PCC subspace ID it is incorrectly treated as access width. This causes errors when reading from PCC registers in the CPPC driver. For PCC registers, base the size of read/write on the bit width field. The debug message in cpc_read()/cpc_write() is updated to print relevant information for the address space type used to read the register. Fixes: 2f4a4d63a193 ("ACPI: CPPC: Use access_width over bit_width for system memory accesses") Signed-off-by: Vanshidhar Konda <vanshikonda@os.amperecomputing.com> Tested-by: Jarred White <jarredwhite@linux.microsoft.com> Reviewed-by: Jarred White <jarredwhite@linux.microsoft.com> Reviewed-by: Easwar Hariharan <eahariha@linux.microsoft.com> Cc: 5.15+ <stable@vger.kernel.org> # 5.15+ Signed-off-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com>
2024-04-22drm/meson: gate px_clk when setting rateNeil Armstrong
Disable the px_clk when setting the rate to recover a fully configured and correctly reset VCLK clock tree after the rate is set. Fixes: 77d9e1e6b846 ("drm/meson: add support for MIPI-DSI transceiver") Reviewed-by: Nicolas Belin <nbelin@baylibre.com> Link: https://lore.kernel.org/r/20240403-amlogic-v6-4-upstream-dsi-ccf-vim3-v12-4-99ecdfdc87fc@linaro.org Signed-off-by: Neil Armstrong <neil.armstrong@linaro.org> Link: https://patchwork.freedesktop.org/patch/msgid/20240403-amlogic-v6-4-upstream-dsi-ccf-vim3-v12-4-99ecdfdc87fc@linaro.org
2024-04-22ACPI: CPPC: Fix bit_offset shift in MASK_VAL() macroJarred White
Commit 2f4a4d63a193 ("ACPI: CPPC: Use access_width over bit_width for system memory accesses") neglected to properly wrap the bit_offset shift when it comes to applying the mask. This may cause incorrect values to be read and may cause the cpufreq module not be loaded. [ 11.059751] cpu_capacity: CPU0 missing/invalid highest performance. [ 11.066005] cpu_capacity: partial information: fallback to 1024 for all CPUs Also, corrected the bitmask generation in GENMASK (extra bit being added). Fixes: 2f4a4d63a193 ("ACPI: CPPC: Use access_width over bit_width for system memory accesses") Signed-off-by: Jarred White <jarredwhite@linux.microsoft.com> Cc: 5.15+ <stable@vger.kernel.org> # 5.15+ Reviewed-by: Vanshidhar Konda <vanshikonda@os.amperecomputing.com> Signed-off-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com>
2024-04-22Merge tag 'docs-6.9-fixes2' of git://git.lwn.net/linuxLinus Torvalds
Pull documentation fixes from Jonathan Corbet: "A set of updates from Thorsten to his (new) guide to verifying bugs and tracking down regressions" * tag 'docs-6.9-fixes2' of git://git.lwn.net/linux: docs: verify/bisect: stable regressions: first stable, then mainline docs: verify/bisect: describe how to use a build host docs: verify/bisect: explain testing reverts, patches and newer code docs: verify/bisect: proper headlines and more spacing docs: verify/bisect: add and fetch stable branches ahead of time docs: verify/bisect: use git switch, tag kernel, and various fixes
2024-04-22x86/sev: Check for MWAITX and MONITORX opcodes in the #VC handlerTom Lendacky
The MWAITX and MONITORX instructions generate the same #VC error code as the MWAIT and MONITOR instructions, respectively. Update the #VC handler opcode checking to also support the MWAITX and MONITORX opcodes. Fixes: e3ef461af35a ("x86/sev: Harden #VC instruction emulation somewhat") Signed-off-by: Tom Lendacky <thomas.lendacky@amd.com> Signed-off-by: Borislav Petkov (AMD) <bp@alien8.de> Link: https://lore.kernel.org/r/453d5a7cfb4b9fe818b6fb67f93ae25468bc9e23.1713793161.git.thomas.lendacky@amd.com
2024-04-22cxl/core: Fix potential payload size confusion in cxl_mem_get_poison()Dan Williams
A recent change to cxl_mem_get_records_log() [1] highlighted a subtle nuance of looping calls to cxl_internal_send_cmd(), i.e. that cxl_internal_send_cmd() modifies the 'size_out' member of the @mbox_cmd argument. That mechanism is useful for communicating underflow, but it is unwanted when reusing @mbox_cmd for a subsequent submission. It turns out that cxl_xfer_log() avoids this scenario by always redefining @mbox_cmd each iteration. Update cxl_mem_get_records_log() and cxl_mem_get_poison() to follow the same style as cxl_xfer_log(), i.e. re-define @mbox_cmd each iteration. The cxl_mem_get_records_log() change is just a style fixup, but the cxl_mem_get_poison() change is a potential fix, per Alison [2]: Poison list retrieval can hit this case if the MORE flag is set and a follow on read of the list delivers more records than the previous read. ie. device gives one record, sets the _MORE flag, then gives 5. Not an urgent fix since this behavior has not been seen in the wild, but worth tracking as a fix. Cc: Kwangjin Ko <kwangjin.ko@sk.com> Cc: Alison Schofield <alison.schofield@intel.com> Fixes: ed83f7ca398b ("cxl/mbox: Add GET_POISON_LIST mailbox command") Link: http://lore.kernel.org/r/20240402081404.1106-2-kwangjin.ko@sk.com [1] Link: http://lore.kernel.org/r/ZhAhAL/GOaWFrauw@aschofie-mobl2 [2] Signed-off-by: Dan Williams <dan.j.williams@intel.com> Reviewed-by: Ira Weiny <ira.weiny@intel.com> Reviewed-by: Alison Schofield <alison.schofield@intel.com> Link: https://lore.kernel.org/r/171235441633.2716581.12330082428680958635.stgit@dwillia2-xfh.jf.intel.com Signed-off-by: Dave Jiang <dave.jiang@intel.com>
2024-04-22cifs: reinstate original behavior again for forceuid/forcegidTakayuki Nagata
forceuid/forcegid should be enabled by default when uid=/gid= options are specified, but commit 24e0a1eff9e2 ("cifs: switch to new mount api") changed the behavior. Due to the change, a mounted share does not show intentional uid/gid for files and directories even though uid=/gid= options are specified since forceuid/forcegid are not enabled. This patch reinstates original behavior that overrides uid/gid with specified uid/gid by the options. Fixes: 24e0a1eff9e2 ("cifs: switch to new mount api") Signed-off-by: Takayuki Nagata <tnagata@redhat.com> Acked-by: Paulo Alcantara (Red Hat) <pc@manguebit.com> Acked-by: Ronnie Sahlberg <lsahlber@redhat.com> Acked-by: Tom Talpey <tom@talpey.com> Signed-off-by: Steve French <stfrench@microsoft.com>
2024-04-22 fs/9p: mitigate inode collisionsEric Van Hensbergen
Detect and mitigate inode collsions that now occur since we fixed 9p generating duplicate inode structures. Underlying cause of these appears to be a race condition between reuse of inode numbers in underlying file system and cleanup of inode numbers in the client. Enabling caching makes this much more likely to happen as it increases cleanup latency due to writebacks. Reported-by: Kent Overstreet <kent.overstreet@linux.dev> Signed-off-by: Eric Van Hensbergen <ericvh@kernel.org>
2024-04-22drm/i915/display: move dmc_firmware_path to display paramsJani Nikula
The dmc_firmware_path parameter is clearly a display parameter. Move it there so it's available to both i915 and xe modules. This also cleans up the ugly member in struct xe_device. v2: - New try with the NULL/"" param value issue resolved Reviewed-by: Gustavo Sousa <gustavo.sousa@intel.com> Acked-by: Lucas De Marchi <lucas.demarchi@intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/7c8223b68fdafbc72bee0bf5afdb2ab15261cf00.1713519628.git.jani.nikula@intel.com Signed-off-by: Jani Nikula <jani.nikula@intel.com>
2024-04-22drm/i915/dmc: change how to disable DMC firmware using module paramJani Nikula
The distinction between the dmc_firmware_path module param being NULL and the empty string "" is problematic. It's not possible to set the parameter back to NULL via sysfs or debugfs. Remove the distinction, and consider NULL and the empty string to be the same thing, and use the platform default for them. This removes the possibility to disable DMC (and runtime PM) via i915.dmc_firmware_path="". Instead, use "/dev/null" as the magic firmware path to skip DMC firmware loading and disable runtime PM. v2: Add support for i915.dmc_firmware_path="/dev/null" (Gustavo) Cc: Gustavo Sousa <gustavo.sousa@intel.com> Cc: Lucas De Marchi <lucas.demarchi@intel.com> Reviewed-by: Gustavo Sousa <gustavo.sousa@intel.com> Acked-by: Lucas De Marchi <lucas.demarchi@intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/8695aca8a6643e36bb680bc2dcab97c637e70b00.1713519628.git.jani.nikula@intel.com Signed-off-by: Jani Nikula <jani.nikula@intel.com>
2024-04-22drm/i915/dmc: split out per-platform firmware path selectionJani Nikula
The big if ladder clutters intel_dmc_init(). Split it out to a separate function. Reviewed-by: Gustavo Sousa <gustavo.sousa@intel.com> Acked-by: Lucas De Marchi <lucas.demarchi@intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/fe3d7b2b18c317a2f924f2023271d38afee3b18a.1713519628.git.jani.nikula@intel.com Signed-off-by: Jani Nikula <jani.nikula@intel.com>
2024-04-22drm/i915/dmc: improve firmware parse failure propagationJani Nikula
Return failures from parse_dmc_fw() instead of relying on intel_dmc_has_payload(). Handle and error report them slightly better, including a new error message for when the firmware does not contain the main program. v2: Print specific error message for payload not found (Gustavo) Reviewed-by: Gustavo Sousa <gustavo.sousa@intel.com> Acked-by: Lucas De Marchi <lucas.demarchi@intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/18833681978ec3ac779cce943221cc5b532c7c45.1713519628.git.jani.nikula@intel.com Signed-off-by: Jani Nikula <jani.nikula@intel.com>
2024-04-22drm/i915/dmc: handle request_firmware() errors separatelyJani Nikula
Clarify request_firmware() error handling. Don't proceed to trying to parse non-existent firmware or check for payload when request_firmware() failed to begin with. There's no reason to release_firmware() either when request_firmware() failed. Also move the message about DMC firmware homepage here, as in other cases the user probably has some firmware, although its parsing fails for some reason. Reviewed-by: Gustavo Sousa <gustavo.sousa@intel.com> Acked-by: Lucas De Marchi <lucas.demarchi@intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/0654bb3480f8d2103225d26f665badead5495532.1713519628.git.jani.nikula@intel.com Signed-off-by: Jani Nikula <jani.nikula@intel.com>
2024-04-22drm/mediatek: dsi: Correct calculation formula of PHY TimingShuijing Li
This patch correct calculation formula of PHY timing. The spec define HS-PREPARE should be from 40ns+4*UI(44ns) to 85ns+6*UI(91ns). But current duration is 88ns and is near the boundary. So this patch make the duration to 64ns so it is near the safe range. Signed-off-by: Shuijing Li <shuijing.li@mediatek.com> Reviewed-by: CK Hu <ck.hu@mediatek.com> Link: https://patchwork.kernel.org/project/dri-devel/patch/20240412031208.30688-1-shuijing.li@mediatek.com/ Signed-off-by: Chun-Kuang Hu <chunkuang.hu@kernel.org>
2024-04-22drm/mediatek: dp: Fix mtk_dp_aux_transfer return valueWojciech Macek
In case there is no DP device attached to the port the transfer function should return IO error, similar to what other drivers do. In case EAGAIN is returned then any read from /dev/drm_dp_aux device ends up in an infinite loop as the upper layers constantly repeats the transfer request. Fixes: f70ac097a2cf ("drm/mediatek: Add MT8195 Embedded DisplayPort driver") Signed-off-by: Wojciech Macek <wmacek@chromium.org> Reviewed-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com> Reviewed-by: CK Hu <ck.hu@mediatek.com> Link: https://patchwork.kernel.org/project/dri-devel/patch/20240417103819.990512-1-wmacek@chromium.org/ Signed-off-by: Chun-Kuang Hu <chunkuang.hu@kernel.org>
2024-04-22drm/msm/dpu: use format-related definitions from mdp_common.xml.hDmitry Baryshkov
Instead of having DPU-specific defines, switch to the definitions from the mdp_common.xml.h file. This is the preparation for merged of DPU and MDP format tables. Reviewed-by: Abhinav Kumar <quic_abhinavk@quicinc.com> Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> Patchwork: https://patchwork.freedesktop.org/patch/590420/ Link: https://lore.kernel.org/r/20240420-dpu-format-v2-1-9e93226cbffd@linaro.org
2024-04-22drm/msm/dpu: Rename `ctx` parameter to `intf` to match other functionsMarijn Suijten
All other functions in dpu_hw_intf name the "self" parameter `intf`, except dpu_hw_intf_setup_timing_engine() and the recently added dpu_hw_intf_program_intf_cmd_cfg(). Clean that up for consistency. Signed-off-by: Marijn Suijten <marijn.suijten@somainline.org> Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> Patchwork: https://patchwork.freedesktop.org/patch/589903/ Link: https://lore.kernel.org/r/20240417-drm-msm-initial-dualpipe-dsc-fixes-v1-7-78ae3ee9a697@somainline.org Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
2024-04-22drm/msm/dpu: Allow configuring multiple active DSC blocksMarijn Suijten
Just like the active interface and writeback block in ctl_intf_cfg_v1(), and later the rest of the blocks in followup active-CTL fixes or reworks, multiple calls to this function should enable additional DSC blocks instead of overwriting the blocks that are enabled. This pattern is observed in an active-CTL scenario since DPU 5.0.0 where for example bonded-DSI uses a single CTL to drive multiple INTFs, and each encoder calls this function individually with the INTF (hence the pre-existing update instead of overwrite of this bitmask) and DSC blocks it wishes to be enabled, and expects them to be OR'd into the bitmask. The reverse already exists in reset_intf_cfg_v1() where only specified DSC blocks are removed out of the CTL_DSC_ACTIVE bitmask (same for all other blocks and ACTIVE bitmasks), leaving the rest enabled. Fixes: 77f6da90487c ("drm/msm/disp/dpu1: Add DSC support in hw_ctl") Signed-off-by: Marijn Suijten <marijn.suijten@somainline.org> Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> Patchwork: https://patchwork.freedesktop.org/patch/589902/ Link: https://lore.kernel.org/r/20240417-drm-msm-initial-dualpipe-dsc-fixes-v1-4-78ae3ee9a697@somainline.org Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
2024-04-22drm/msm/dpu: Always flush the slave INTF on the CTLMarijn Suijten
As we can clearly see in a downstream kernel [1], flushing the slave INTF is skipped /only if/ the PPSPLIT topology is active. However, when DPU was originally submitted to mainline PPSPLIT was no longer part of it (seems to have been ripped out before submission), but this clause was incorrectly ported from the original SDE driver. Given that there is no support for PPSPLIT (currently), flushing the slave INTF should /never/ be skipped (as the `if (ppsplit && !master) goto skip;` clause downstream never becomes true). [1]: https://git.codelinaro.org/clo/la/platform/vendor/opensource/display-drivers/-/blob/display-kernel.lnx.5.4.r1-rel/msm/sde/sde_encoder_phys_cmd.c?ref_type=heads#L1131-1139 Fixes: 25fdd5933e4c ("drm/msm: Add SDM845 DPU support") Signed-off-by: Marijn Suijten <marijn.suijten@somainline.org> Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> Patchwork: https://patchwork.freedesktop.org/patch/589901/ Link: https://lore.kernel.org/r/20240417-drm-msm-initial-dualpipe-dsc-fixes-v1-3-78ae3ee9a697@somainline.org Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
2024-04-22drm/msm/dsi: Print dual-DSI-adjusted pclk instead of original mode pclkMarijn Suijten
When dual-DSI (bonded DSI) was added in commit ed9976a09b48 ("drm/msm/dsi: adjust dsi timing for dual dsi mode") some DBG() prints were not updated, leading to print the original mode->clock rather than the adjusted (typically the mode clock divided by two, though more recently also adjusted for DSC compression) msm_host->pixel_clk_rate which is passed to clk_set_rate() just below. Fix that by printing the actual pixel_clk_rate that is being set. Fixes: ed9976a09b48 ("drm/msm/dsi: adjust dsi timing for dual dsi mode") Signed-off-by: Marijn Suijten <marijn.suijten@somainline.org> Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> Patchwork: https://patchwork.freedesktop.org/patch/589896/ Link: https://lore.kernel.org/r/20240417-drm-msm-initial-dualpipe-dsc-fixes-v1-1-78ae3ee9a697@somainline.org Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
2024-04-22drm/msm/dsi: simplify connector creationDmitry Baryshkov
Instead of having two functions, msm_dsi_manager_bridge_init() and msm_dsi_manager_ext_bridge_init(), merge them into msm_dsi_manager_connector_init(), moving drm_bridge_attach() to be called from the bridge's attach callback (as most other bridges do). Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> Reviewed-by: Abhinav Kumar <quic_abhinavk@quicinc.com> Patchwork: https://patchwork.freedesktop.org/patch/582212/ Link: https://lore.kernel.org/r/20240309-fd-dsi-cleanup-bridges-v1-3-962ebdba82ed@linaro.org
2024-04-22drm/msm/dsi: move next bridge acquisition to dsi_bindDmitry Baryshkov
Currently the MSM DSI driver looks for the next bridge during msm_dsi_modeset_init(). If the bridge is not registered at that point, this might result in -EPROBE_DEFER, which can be problematic that late during the device probe process. Move next bridge acquisition to the dsi_bind state so that probe deferral is returned as early as possible. Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> Reviewed-by: Abhinav Kumar <quic_abhinavk@quicinc.com> Patchwork: https://patchwork.freedesktop.org/patch/582210/ Link: https://lore.kernel.org/r/20240309-fd-dsi-cleanup-bridges-v1-2-962ebdba82ed@linaro.org
2024-04-22drm/msm/dsi: remove the drm_bridge_attach fallbackDmitry Baryshkov
All the bridges that are being used with the MSM DSI hosts have been converted to support DRM_BRIDGE_ATTACH_NO_CONNECTOR. Drop the fallback code and require DRM_BRIDGE_ATTACH_NO_CONNECTOR to be supported by the downstream bridges. Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> Reviewed-by: Abhinav Kumar <quic_abhinavk@quicinc.com> Patchwork: https://patchwork.freedesktop.org/patch/582209/ Link: https://lore.kernel.org/r/20240309-fd-dsi-cleanup-bridges-v1-1-962ebdba82ed@linaro.org
2024-04-22drm/msm: Drop msm_read/writelKonrad Dybcio
Totally useless. Signed-off-by: Konrad Dybcio <konrad.dybcio@linaro.org> Reviewed-by: Andrew Halaney <ahalaney@redhat.com> Patchwork: https://patchwork.freedesktop.org/patch/588804/ Link: https://lore.kernel.org/r/20240410-topic-msm_rw-v1-1-e1fede9ffaba@linaro.org Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
2024-04-22drm/msm: Fix gen_header.py for older python3 versionsJon Hunter
The gen_header.py script is failing for older versions of python3 such as python 3.5. Two issues observed with python 3.5 are ... 1. Python 3 versions prior to 3.6 do not support the f-string format. 2. Early python 3 versions do not support the 'required' argument for the argparse add_subparsers(). Fix both of the above so that older versions of python 3 still work. Fixes: 8f7abf0b86fe ("drm/msm: generate headers on the fly") Signed-off-by: Jon Hunter <jonathanh@nvidia.com> Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> Patchwork: https://patchwork.freedesktop.org/patch/589427/ Link: https://lore.kernel.org/r/20240412165407.42163-1-jonathanh@nvidia.com Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
2024-04-22drm/msm: drop A6xx headerDmitry Baryshkov
Now as the headers are generated during the build step, drop pre-generated copies of the Adreno A6xx header. Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> Patchwork: https://patchwork.freedesktop.org/patch/585868/ Link: https://lore.kernel.org/r/20240401-fd-xml-shipped-v5-18-4bdb277a85a1@linaro.org
2024-04-22drm/msm: drop C++ parts of a6xx.xml.hDmitry Baryshkov
As a preparation to removal of a6xx.xml.h, drop the C++ part of the heder, it is not used by the kernel anyway. Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> Patchwork: https://patchwork.freedesktop.org/patch/585866/ Link: https://lore.kernel.org/r/20240401-fd-xml-shipped-v5-17-4bdb277a85a1@linaro.org
2024-04-22drm/msm: drop A6xx GMU headerDmitry Baryshkov
Now as the headers are generated during the build step, drop pre-generated copies of the Adreno A6xx GMU header. Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> Patchwork: https://patchwork.freedesktop.org/patch/585870/ Link: https://lore.kernel.org/r/20240401-fd-xml-shipped-v5-16-4bdb277a85a1@linaro.org
2024-04-22drm/msm: drop A5xx headerDmitry Baryshkov
Now as the headers are generated during the build step, drop pre-generated copies of the Adreno A5xx header. Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> Patchwork: https://patchwork.freedesktop.org/patch/585865/ Link: https://lore.kernel.org/r/20240401-fd-xml-shipped-v5-15-4bdb277a85a1@linaro.org
2024-04-22drm/msm: drop A3xx and A4xx headersDmitry Baryshkov
Now as the headers are generated during the build step, drop pre-generated copies of the Adreno A3xx and A4xx headers. Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> Patchwork: https://patchwork.freedesktop.org/patch/585869/ Link: https://lore.kernel.org/r/20240401-fd-xml-shipped-v5-14-4bdb277a85a1@linaro.org
2024-04-22drm/msm: drop A2xx and common headersDmitry Baryshkov
Now as the headers are generated during the build step, drop pre-generated copies of the Adreno A2xx and common headers. Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> Patchwork: https://patchwork.freedesktop.org/patch/585861/ Link: https://lore.kernel.org/r/20240401-fd-xml-shipped-v5-13-4bdb277a85a1@linaro.org
2024-04-22drm/msm: drop display-related headersDmitry Baryshkov
Now as the headers are generated during the build step, drop pre-generated copies of the display-related headers. Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> Patchwork: https://patchwork.freedesktop.org/patch/585860/ Link: https://lore.kernel.org/r/20240401-fd-xml-shipped-v5-12-4bdb277a85a1@linaro.org
2024-04-22drm/msm: generate headers on the flyDmitry Baryshkov
Generate DRM/MSM headers on the fly during kernel build. This removes a need to push register changes to Mesa with the following manual synchronization step. Existing headers will be removed in the following commits (split away to ease reviews). Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> Patchwork: https://patchwork.freedesktop.org/patch/585862/ Link: https://lore.kernel.org/r/20240401-fd-xml-shipped-v5-11-4bdb277a85a1@linaro.org
2024-04-22drm/msm: import gen_header.py script from MesaDmitry Baryshkov
Import the gen_headers.py script from Mesa, commit b5414e716684 ("freedreno/registers: Add license header"). This script will be used to generate MSM register files on the fly during compilation. Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> Patchwork: https://patchwork.freedesktop.org/patch/585864/ Link: https://lore.kernel.org/r/20240401-fd-xml-shipped-v5-10-4bdb277a85a1@linaro.org
2024-04-22drm/msm: import A6xx XML display registers databaseDmitry Baryshkov
Import Adreno registers database for A6xx from the Mesa, commit 639488f924d9 ("freedreno/registers: limit the rules schema"). Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> Patchwork: https://patchwork.freedesktop.org/patch/585856/ Link: https://lore.kernel.org/r/20240401-fd-xml-shipped-v5-9-4bdb277a85a1@linaro.org
2024-04-22drm/msm: import A5xx XML display registers databaseDmitry Baryshkov
Import Adreno registers database for A5xx from the Mesa, commit 639488f924d9 ("freedreno/registers: limit the rules schema"). Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> Patchwork: https://patchwork.freedesktop.org/patch/585857/ Link: https://lore.kernel.org/r/20240401-fd-xml-shipped-v5-8-4bdb277a85a1@linaro.org
2024-04-22drm/msm: import A2xx-A4xx XML display registers databaseDmitry Baryshkov
Import Adreno registers database for A2xx-A4xx from the Mesa, commit 639488f924d9 ("freedreno/registers: limit the rules schema"). Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> Patchwork: https://patchwork.freedesktop.org/patch/585854/ Link: https://lore.kernel.org/r/20240401-fd-xml-shipped-v5-7-4bdb277a85a1@linaro.org
2024-04-22drm/msm: import XML display registers databaseDmitry Baryshkov
Import display-related registers database from the Mesa, commit 639488f924d9 ("freedreno/registers: limit the rules schema"). The msm.xml and mdp_common.xml files were adjusted to drop subdirectory paths. Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> Patchwork: https://patchwork.freedesktop.org/patch/585852/ Link: https://lore.kernel.org/r/20240401-fd-xml-shipped-v5-6-4bdb277a85a1@linaro.org
2024-04-22drm/msm: remove dependencies from core onto adreno headersDmitry Baryshkov
Two core driver files include headers from Adreno subdir, which also brings dependency on the Adreno register headers. Rework those includes to remove unnecessary dependency. Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> Patchwork: https://patchwork.freedesktop.org/patch/585850/ Link: https://lore.kernel.org/r/20240401-fd-xml-shipped-v5-5-4bdb277a85a1@linaro.org
generated by cgit (git 2.34.1) at 2025-09-13 11:17:30 +0000