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2012-02-07HID: wiimote: fix invalid power_supply_powers callJiri Kosina
Analogically to d7cb3dbd1 ("HID: wacom: Fix invalid power_supply_powers calls"), fix also the same occurence in wiimote driver. Reported-by: przemo@firszt.eu Signed-off-by: Jiri Kosina <jkosina@suse.cz>
2012-02-07ALSA: hda - Fix error handling in patch_ca0132.cTakashi Iwai
In patch_ca0132.c, the error returned from chipio_write() isn't checked always. Also, the power-up/down sequence isn't tracked properly in some error paths. Reported-by: Dan Carpenter <dan.carpenter@oracle.com> Signed-off-by: Takashi Iwai <tiwai@suse.de>
2012-02-07Merge tag 'asoc-3.3' of ↵Takashi Iwai
git://git.kernel.org/pub/scm/linux/kernel/git/broonie/sound into for-linus The only particularly remarkable change here is the one for handling of the Android suspend ignore code for idle_bias_off CODECs. That one is actually a regression fix as some of the new power savings that have been introduced confused the suspend ignore code, making devices that are active for non-audio reasons look like they are idle causing them to be suspended instead of being kept active.
2012-02-07Merge tag 'perf-urgent-for-mingo' of ↵Ingo Molnar
git://git.kernel.org/pub/scm/linux/kernel/git/acme/linux into perf/urgent Fixes for some long standing problems. Signed-off-by: Ingo Molnar <mingo@elte.hu>
2012-02-07mtip32xx: removed the irrelevant argument of mtip_hw_submit_io() and the ↵Asai Thambi S P
unused member of struct driver_data Removed the following: * irrelevant argument 'barrier' of mtip_hw_submit_io() * unused member 'eh_active' of struct driver_data Signed-off-by: Asai Thambi S P <asamymuthupa@micron.com> Signed-off-by: Sam Bradshaw <sbradshaw@micron.com> Signed-off-by: Jens Axboe <axboe@kernel.dk>
2012-02-07block: strip out locking optimization in put_io_context()Tejun Heo
put_io_context() performed a complex trylock dancing to avoid deferring ioc release to workqueue. It was also broken on UP because trylock was always assumed to succeed which resulted in unbalanced preemption count. While there are ways to fix the UP breakage, even the most pathological microbench (forced ioc allocation and tight fork/exit loop) fails to show any appreciable performance benefit of the optimization. Strip it out. If there turns out to be workloads which are affected by this change, simpler optimization from the discussion thread can be applied later. Signed-off-by: Tejun Heo <tj@kernel.org> LKML-Reference: <1328514611.21268.66.camel@sli10-conroe> Signed-off-by: Jens Axboe <axboe@kernel.dk>
2012-02-07target: Fix unsupported WRITE_SAME sense payloadMartin Svec
This patch fixes a bug in target-core where unsupported WRITE_SAME ops from a target_check_write_same_discard() failure was incorrectly returning CHECK_CONDITION w/ TCM_INVALID_CDB_FIELD sense data. This was causing some clients to not properly fall back, so go ahead and use the correct TCM_UNSUPPORTED_SCSI_OPCODE sense for this case. Reported-by: Martin Svec <martin.svec@zoner.cz> Signed-off-by: Nicholas Bellinger <nab@linux-iscsi.org>
2012-02-07iscsi: use IP_FREEBIND socket optionDax Kelson
Use IP_FREEBIND socket option so that iscsi portal configuration with explicit IP addresses can happen during boot, before network interfaces have been assigned IPs. This is especially important on systemd based Linux boxes where system boot happens asynchronously and non-trivial configuration must be done to get targetcli.service to start synchronously after the network is configured. Reference: http://lists.fedoraproject.org/pipermail/devel/2011-October/158025.html Signed-off-by: Dax Kelson <dkelson@gurulabs.com> Cc: "Nicholas A. Bellinger" <nab@linux-iscsi.org> Cc: "Andy Grover" <agrover@redhat.com> Cc: "Lennart Poettering" <lennart@poettering.net> Signed-off-by: Nicholas Bellinger <nab@linux-iscsi.org>
2012-02-07iblock: fix handling of large requestsChristoph Hellwig
Requesting to many bvecs upsets bio_alloc_bioset, so limit the number we ask for to the amount it can handle. Signed-off-by: Christoph Hellwig <hch@lst.de> Signed-off-by: Nicholas Bellinger <nab@linux-iscsi.org>
2012-02-07target: handle empty string writes in sysfsDan Carpenter
These are root only and we're not likely to hit the problem in practise, but it makes the static checkers happy. Signed-off-by: Dan Carpenter <dan.carpenter@oracle.com> Signed-off-by: Nicholas Bellinger <nab@linux-iscsi.org>
2012-02-07iscsi_target: in_aton needs linux/inet.hStephen Rothwell
Fixes this error after a recent nfs cleanup: drivers/target/iscsi/iscsi_target_configfs.c: In function 'lio_target_call_addnptotpg': drivers/target/iscsi/iscsi_target_configfs.c:214:3: error: implicit declaration of function 'in6_pton' [-Werror=implicit-function-declaration] drivers/target/iscsi/iscsi_target_configfs.c:239:3: error: implicit declaration of function 'in_aton' [-Werror=implicit-function-declaration] Signed-off-by: Stephen Rothwell <sfr@canb.auug.org.au> Signed-off-by: Nicholas Bellinger <nab@linux-iscsi.org>
2012-02-07target: Fix iblock se_dev_attrib.unmap_granularityMarco Sanvido
The block layer keeps q->limits.discard_granularity in bytes, but iblock (and the SCSI Block Limits VPD page) keep unmap_granularity in blocks. Report the correct value when exporting block devices by dividing to convert bytes to blocks. Signed-off-by: Roland Dreier <roland@purestorage.com> Signed-off-by: Nicholas Bellinger <nab@linux-iscsi.org>
2012-02-07target: Fix target_submit_cmd() exception handlingNicholas Bellinger
This patch fixes a bug in target_submit_cmd() where the failure path for transport_generic_allocate_tasks() made a direct call to transport_send_check_condition_and_sense() and not calling the final target_put_sess_cmd() release callback. For transport_generic_allocate_tasks() failures, use the proper call to transport_generic_request_failure() to handle kref_put() along with potential internal queue full response processing. It also makes transport_lookup_cmd_lun() failures in target_submit_cmd() use transport_send_check_condition_and_sense() and target_put_sess_cmd() directly to avoid se_cmd->se_dev reference in transport_generic_request_failure() handling. Finally it drops the out_check_cond: label and use direct reference for allocate task failures, and per-se_device queue_full handling is currently not supported for transport_lookup_cmd_lun() failure descriptors due to se_device dependency. Reported-by: Roland Dreier <roland@purestorage.com> Cc: Roland Dreier <roland@purestorage.com> Signed-off-by: Nicholas Bellinger <nab@linux-iscsi.org>
2012-02-07target: Change target_submit_cmd() to return voidAndy Grover
Retval not very useful, and may even be harmful. Once submitted, fabrics should expect a sense error if anything goes wrong. All fabrics checking of this retval are useless or broken: fc checks it just to emit more debug output. ib_srpt trickles retval up, then it is ignored. qla2xxx trickles it up, which then causes a bug because the abort goto in qla_target.c thinks cmd hasn't been sent to target. Just returning nothing is best. Signed-off-by: Andy Grover <agrover@redhat.com> Signed-off-by: Nicholas Bellinger <nab@linux-iscsi.org>
2012-02-07target: accept REQUEST_SENSE with 18bytesSebastian Andrzej Siewior
WindowsXP+BOT issues a MODE_SENSE request with page 0x1c which is not suppoerted by target. Target rejects that command with TCM_INVALID_CDB_FIELD, so far so good. On BOT I can't send the SENSE response back, instead I can only reply that an error occured. The next thing happens is a REQUEST_SENSE request with 18 bytes length. Since the check here is more than 18 bytes I have to NACK that request as well. This is not really required: We check for some additional room, but we never use it. The additional length is set to 0xa so the total length is 0xa + 8 = 18 which is fine with my 18 bytes. Signed-off-by: Sebastian Andrzej Siewior <bigeasy@linutronix.de> Signed-off-by: Nicholas Bellinger <nab@linux-iscsi.org>
2012-02-06ARM: tegra: paz00: fix wrong UART port on mini-pcie plugMarc Dietrich
UARTC is connected to the mini-pcie port. Signed-off-by: Marc Dietrich <marvin24@gmx.de> Acked-by: Stephen Warren <swarren@nvidia.com> Signed-off-by: Olof Johansson <olof@lixom.net>
2012-02-06ARM: tegra: paz00: fix wrong SD1 power gpioMarc Dietrich
The power gpio for the external memory card was specified wrongly. Replace it with the correct value (tested with warmboot with fastboot). Signed-off-by: Marc Dietrich <marvin24@gmx.de> Acked-by: Stephen Warren <swarren@nvidia.com> Signed-off-by: Olof Johansson <olof@lixom.net>
2012-02-06i2c: tegra: Add devexit_p() for removeShubhrajyoti Datta
It was originally missed in the __devinit/__devexit annotations. Signed-off-by: Shubhrajyoti D <shubhrajyoti@ti.com> Acked-by: Stephen Warren <swarren@nvidia.com> Acked-by: Ben Dooks <ben-linux@fluff.org> Signed-off-by: Olof Johansson <olof@lixom.net>
2012-02-06ARM: tegra: Add a simple PMC driverStephen Warren
This PMC driver is enough to parse the nvidia,invert-interrupt property from device tree, and configure the PMC's to honor that. In the future, this file could expand to centralize all other PMC accesses within the mach-tegra code. Signed-off-by: Stephen Warren <swarren@nvidia.com> Signed-off-by: Olof Johansson <olof@lixom.net>
2012-02-06ARM: tegra: dma: not required to move requestor when stopping.Laxman Dewangan
It is not require to move the requestor of dma to INVALID option before stopping dma. Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com> Acked-by: Stephen Warren <swarren@nvidia.com> Tested-by: Stephen Warren <swarren@nvidia.com> Signed-off-by: Olof Johansson <olof@lixom.net>
2012-02-06ARM: tegra: Fix EMC pdata initialization from registersStephen Warren
Commit d91eeb0 "ARM: tegra: emc: device tree support" modified the EMC driver to create an EMC table from existing register settings when none was provided through platform data or device tree. This code wrote the wrong clock rate into the table; the actual rate in Hz, rather than the expected half-rate in KHz. This caused the BUG_ON in tegra2_emc_clk_round_rate() to fire, since that enormous rate could not be generated. Fixes: [ 2.425921] kernel BUG at arch/arm/mach-tegra/tegra2_clocks.c:1158! ... [ 2.618766] [<c001c0e8>] (tegra2_emc_clk_round_rate+0x58/0x70) from [<c00198b4>] (clk_round_rate+0x48/0x68) [ 2.628494] [<c00198b4>] (clk_round_rate+0x48/0x68) from [<c0019cc0>] (clk_set_rate_locked+0x40/0x68) [ 2.637707] [<c0019cc0>] (clk_set_rate_locked+0x40/0x68) from [<c0019d10>] (clk_set_rate+0x28/0x40) [ 2.646754] [<c0019d10>] (clk_set_rate+0x28/0x40) from [<c001ffc8>] (tegra_update_cpu_speed+0x54/0x144) [ 2.656144] [<c001ffc8>] (tegra_update_cpu_speed+0x54/0x144) from [<c002016c>] (tegra_target+0xb4/0xe0) [ 2.665538] [<c002016c>] (tegra_target+0xb4/0xe0) from [<c01a96c0>] (__cpufreq_driver_target+0x88/0xa4) [ 2.674931] [<c01a96c0>] (__cpufreq_driver_target+0x88/0xa4) from [<c01ac9d0>] (dbs_check_cpu+0x324/0x340) [ 2.684582] [<c01ac9d0>] (dbs_check_cpu+0x324/0x340) from [<c01aca40>] (do_dbs_timer+0x54/0xf4) [ 2.693277] [<c01aca40>] (do_dbs_timer+0x54/0xf4) from [<c00369a8>] (process_one_work+0x1d4/0x320) [ 2.702225] [<c00369a8>] (process_one_work+0x1d4/0x320) from [<c0036f34>] (worker_thread+0x134/0x230) [ 2.711437] [<c0036f34>] (worker_thread+0x134/0x230) from [<c003add0>] (kthread+0x80/0x8c) [ 2.719700] [<c003add0>] (kthread+0x80/0x8c) from [<c000ebf4>] (kernel_thread_exit+0x0/0x8) Reported-by: Marc Dietrich <marvin24@gmx.de> Signed-off-by: Stephen Warren <swarren@nvidia.com> [olof: fixed calculation of printed values] Signed-off-by: Olof Johansson <olof@lixom.net>
2012-02-06gpio: tegra: Parameterize the number of banksStephen Warren
Tegra20's GPIO controller has 7 banks, and Tegra30's controller has 8 banks. Allow the number of banks to be configured at run-time by the device tree. Signed-off-by: Stephen Warren <swarren@nvidia.com> Acked-by: Grant Likely <grant.likely@secretlab.ca> Signed-off-by: Olof Johansson <olof@lixom.net>
2012-02-06gpio: tegra: Dynamically allocate IRQ base, and support DTStephen Warren
Enhance the driver to dynamically allocate the base IRQ number, and create an IRQ domain for itself. The use of an IRQ domain ensures that any device tree node interrupts properties are correctly parsed. Describe interrupt-related properties in the device tree binding docs, and the contents of "child" node interrupts property. Update tegra*.dtsi to specify the required interrupt-related properties. Finally, remove the definition of TEGRA_GPIO_TO_IRQ; this macro no longer gives correct results since the IRQ numbers for GPIOs are dynamically allocated. Signed-off-by: Stephen Warren <swarren@nvidia.com> Acked-by: Grant Likely <grant.likely@secretlab.ca> Signed-off-by: Olof Johansson <olof@lixom.net>
2012-02-06ARM: tegra: Remove use of TEGRA_GPIO_TO_IRQStephen Warren
Replace compile-time usage of TEGRA_GPIO_TO_IRQ with run-time calls to gpio_to_irq(). This will allow the base IRQ number for the Tegra GPIO driver to be dynamically allocated in a later patch. Signed-off-by: Stephen Warren <swarren@nvidia.com> Acked-by: Grant Likely <grant.likely@secretlab.ca> Signed-off-by: Olof Johansson <olof@lixom.net>
2012-02-06ARM: tegra: Pass uncompress.h UART selection to DEBUG_LLStephen Warren
uncompress.h now saves the selected UART's physical address in Tegra's IRAM, along with a cookie to indicate validity. The first time it's run, macro addruart in debug-macro.S looks for this cookie, and if it's present, uses the UART address stored there. If not, the static value TEGRA_DEBUG_UART_BASE is used, as was previous behaviour. The static behaviour will thus be used when not booting using a zImage. This work was inspired by work by Doug Anderson <dianders@chromium.org>; see http://lkml.org/lkml/2011/9/26/284. However, this patch relies on the data passing describe above, rather than duplicating the UART selection logic in debug-macro.S; the latest selection logic is more complex due to the need to check reset/clock bits too. Signed-off-by: Stephen Warren <swarren@nvidia.com> Tested-by: Doug Anderson <dianders@chromium.org> Acked-by: Doug Anderson <dianders@chromium.org> Signed-off-by: Olof Johansson <olof@lixom.net>
2012-02-06ARM: tegra: uncompress.h: Choose a UART at runtimeStephen Warren
With this change we automatically detect which UART to use for for printing during decompression. The detection involves coordination with the bootloader: it's expected that the bootloader will leave a 'D' (for [D]ebug) in the UART scratchpad register for whichever UART we should use for debugging. If we don't find any such UART, we fall back to the UART that was specified during config time: CONFIG_TEGRA_DEBUG_UART_XXX. As a side effect of this change, uncompress debug messages will work if you've specified CONFIG_TEGRA_DEBUG_UART_NONE, provided the bootloader obeys the protocol. This change is in line with what is documented in Documentation/arm/Booting. Other approaches considered: * Hardcode based on machine ID (as many other ARM boards do). OK, but nice to not have yet another place to add per-board code. Better to have bootloader parse device tree and pass us this info. * Check for TXE bit (like SA1110). Nice (and doesn't require a bootloader change), but a little less explicit. Also: if bootloader (for some reason) uses another UART, it needs to remember to turn it off before jumping to the kernel or we may print to it. NOTE: adapting this patch to check TXE too would be easy if desired. Signed-off-by: Doug Anderson <dianders@chromium.org> [swarren: Added clock/reset condition checks] Signed-off-by: Stephen Warren <swarren@nvidia.com> Tested-by: Doug Anderson <dianders@chromium.org> Acked-by: Doug Anderson <dianders@chromium.org> Signed-off-by: Olof Johansson <olof@lixom.net>
2012-02-06ARM: tegra: uncompress.h: Store UART address in a variableDoug Anderson
This will allow a future change to auto-detect which UART to use. Signed-off-by: Doug Anderson <dianders@chromium.org> [swarren: Extracted from a larger patch by Doug] Signed-off-by: Stephen Warren <swarren@nvidia.com> Tested-by: Doug Anderson <dianders@chromium.org> Acked-by: Doug Anderson <dianders@chromium.org> Signed-off-by: Olof Johansson <olof@lixom.net>
2012-02-06ARM: tegra: Introduce define DEBUG_UART_SHIFTDoug Anderson
This removes the need for the variable "shift" in all functions in uncompress.h. Signed-off-by: Doug Anderson <dianders@chromium.org> [swarren: Extracted from a larger patch by Doug] Signed-off-by: Stephen Warren <swarren@nvidia.com> Tested-by: Doug Anderson <dianders@chromium.org> Acked-by: Doug Anderson <dianders@chromium.org> Signed-off-by: Olof Johansson <olof@lixom.net>
2012-02-06ARM: tegra: Support Tegra30 in decompressor UART setupStephen Warren
On Tegra20, the UART clock runs at 216MHz, whereas on Tegra30 it runs at 408MHz. Modify arch_decomp_setup() to detect Tegra20-vs-Tegra30 at run- time, and program the correct divisor. This makes uncompressor messages work correctly on Tegra30. This also fixes early printk, assuming zImage is used and this setup code runs. v2: Use CHIPID register to differentiate between chips, rather than a GIC register. This should be more future-proof. Volatile is required to prevent the compiler transforming the 32-bit apb_misc register read into an 8-bit read of address 1 higher, since the HW only supports 32- bit accesses, and will hang on an 8-bit access. Signed-off-by: Stephen Warren <swarren@nvidia.com> Signed-off-by: Olof Johansson <olof@lixom.net>
2012-02-06ARM: tegra: Pause DMA when reading transfer countLaxman Dewangan
In order to read an accurate channel transfer count from the APB DMA engine, the DMA controller must be paused first. Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com> Acked-by: Stephen Warren <swarren@nvidia.com> Tested-by: Stephen Warren <swarren@nvidia.com> Signed-off-by: Olof Johansson <olof@lixom.net>
2012-02-06ARM: tegra: emc: device tree supportOlof Johansson
Add device tree support to the emc driver, filling in the platform data based on the DT bindings. Changes since v1: * Unmangled some messed up patch squashes, moving changes to earlier patches * Flipped an of_property_read_u32 return value test * Clarified clock settings message on case where no table is provided Signed-off-by: Olof Johansson <olof@lixom.net> Acked-by: Stephen Warren <swarren@nvidia.com>
2012-02-06ARM: tegra: emc: convert tegra2_emc to a platform driverOlof Johansson
This is the first step in making it device-tree aware and get rid of the in-kernel EMC tables (of which there are none in mainline, thankfully). Changes since v3: * moved to devm_request_and_ioremap() in probe() Changes since v2: * D'oh -- missed a couple of variables that were added, never used and then later removed in a later patch. Changes since v1: * Fixed messed up indentation * Removed code that should be gone (was added here and removed later in series) Signed-off-by: Olof Johansson <olof@lixom.net> Acked-by: Stephen Warren <swarren@nvidia.com>
2012-02-06ARM: tegra: fuse: add bct strapping readingOlof Johansson
This is used by the memory setup code to pick the right memory timing table, if needed. Signed-off-by: Olof Johansson <olof@lixom.net>
2012-02-06ARM: tegra: fuse: add functions to access chip revisionOlof Johansson
Add function to get chip revision, and print it out at boot time. Restructure the fuse access to just use cached variables instead of always reading the fuses, and export those variables directly instead of using accessor functions. Add a SKU ID table of currently known values. Based on code originally by Colin Cross <ccross@android.com>. Changes since v1: * Add A01 minor rev support * Don't decode for A03p on anything but T2x Signed-off-by: Olof Johansson <olof@lixom.net> Acked-by: Stephen Warren <swarren@nvidia.com>
2012-02-06ARM: tegra: fuse: use apbio dma for register accessOlof Johansson
Use the apbio dma functions for accessing the fuse registers. Signed-off-by: Olof Johansson <olof@lixom.net>
2012-02-06ARM: tegra: use APB DMA for accessing APB devicesOlof Johansson
Tegra2 hangs if APB registers are accessed from the cpu during an apb dma operation. The workaround is to use apb dma to read/write the registers instead. There is a dependency loop between fuses, clocks, and APBDMA. If dma is enabled, fuse reads must go through APBDMA to avoid corruption due to a hw bug. APBDMA requires a clock to be enabled. Clocks must read a fuse to determine allowable cpu frequencies. Separate out the fuse DMA initialization, and allow the fuse read and write functions to be called without using DMA before the DMA initialization has been completed. Access to the fuses before APBDMA is initialized won't hit the hardware bug because nothing else can be using DMA. Original fuse registar access code from Varun Wadekar <vwadekar@nvidia.com>, improved by Colin Cross <ccross@android.com> and later moved to separate driver by Jon Mayo <jmayo@nvidia.com>. Major refactoring/cleanup by Olof Johansson <olof@lixom.net>. Changes since v1: * fix 'return false' on error condition * dequeue dma ops in case of timeout From: Jon Mayo <jmayo@nvidia.com>. Signed-off-by: Jon Mayo <jmayo@nvidia.com>. Signed-off-by: Olof Johansson <olof@lixom.net> Acked-by: Stephen Warren <swarren@nvidia.com>
2012-02-06ARM: tegra: Don't WARN_ON() for too early dma channel allocationsOlof Johansson
Since we'll do opportunistic allocations before the dma subsystem is enabled we want just silent failures and retries instead. Signed-off-by: Olof Johansson <olof@lixom.net>
2012-02-06ARM: dt: tegra: Enable headset autodetection on PAZ00 board.Leon Romanovsky
This patch is adding device tree support of headset autodetection on PAZ00 board. Signed-off-by: Leon Romanovsky <leon@leon.nu> Signed-off-by: Olof Johansson <olof@lixom.net>
2012-02-06ARM: dt: tegra: Enable device tree audio codec on PAZ00 board.Leon Romanovsky
This patch adds initial device tree support of ALC5632 sound codec and machine driver for PAZ00 board. The implementation is based on the WM8903 codec. Signed-off-by: Marc Dietrich <marvin24@gmx.de> Signed-off-by: Leon Romanovsky <leon@leon.nu> Signed-off-by: Olof Johansson <olof@lixom.net>
2012-02-06ARM: dt: Add binding for Tegra PMCStephen Warren
The Tegra PMC (Power Management Controller) interfaces with an external PMU (Power Management Unit), and controls wake-up from sleep modes. This initial binding is the bare minimum required to control the PMC's inversion of the PMU's interrupt signal. Signed-off-by: Stephen Warren <swarren@nvidia.com> Signed-off-by: Olof Johansson <olof@lixom.net>
2012-02-06ARM: dt: tegra: Enable audio on WM8903 boards, disable othersStephen Warren
Add complete bindings to instantiate and configure the codec and top-level audio complex on all currently supported boards using the Tegra+WM8903 audio driver. On those boards, disable the I2S2 controller since it isn't used. On boards not using the WM8903 codec, disable all the audio devices; they can be re-enabled once the relevant codec and ASoC machine drivers have been ported to device-tree. Signed-off-by: Stephen Warren <swarren@nvidia.com> Signed-off-by: Olof Johansson <olof@lixom.net>
2012-02-06ARM: dt: tegra: Add labels for I2S controllersStephen Warren
This will allow the sound node to refer to the I2S controllers by name when creating phandles. Signed-off-by: Stephen Warren <swarren@nvidia.com> Signed-off-by: Olof Johansson <olof@lixom.net>
2012-02-06ARM: dt: tegra: Modify I2S nodes to match bindingStephen Warren
Adjust the dma-channel property name to match the binding implemented by the driver. The binding was implemented and documented in a separate change to the ASoC tree. Signed-off-by: Stephen Warren <swarren@nvidia.com> Signed-off-by: Olof Johansson <olof@lixom.net>
2012-02-06ARM: dt: tegra: Add Tegra APB DMA device tree bindingStephen Warren
Document binding, and add the node to tegra*.dtsi. The driver isn't actually instantiated from this node yet, but the I2S binding will rely on being able to refer to the APB DMA node using a phandle. Signed-off-by: Stephen Warren <swarren@nvidia.com> Signed-off-by: Olof Johansson <olof@lixom.net>
2012-02-06ARM: dt: tegra30.dtsi: Add extra GPIO interruptStephen Warren
The Tegra30 GPIO controller has one more bank than Tegra20, and hence has one more interrupt. Signed-off-by: Stephen Warren <swarren@nvidia.com> Acked-by: Grant Likely <grant.likely@secretlab.ca> Signed-off-by: Olof Johansson <olof@lixom.net>
2012-02-06ARM: dt: tegra30.dtsi: Reformat gpio's interrupts propertyStephen Warren
The new content matches tegra20.dtsi, and is < 80 columns. Signed-off-by: Stephen Warren <swarren@nvidia.com> Acked-by: Grant Likely <grant.likely@secretlab.ca> Signed-off-by: Olof Johansson <olof@lixom.net>
2012-02-06dt: tegra gpio: Flesh out binding documentationStephen Warren
Document the required reg and interrupts properties. Add a complete example. Signed-off-by: Stephen Warren <swarren@nvidia.com> Acked-by: Grant Likely <grant.likely@secretlab.ca> Signed-off-by: Olof Johansson <olof@lixom.net>
2012-02-06ARM: tegra: seaboard: add EMC table to device treeOlof Johansson
Timings for the T25 version of seaboard, only one memory manufacturer and timing table (two speeds). Signed-off-by: Olof Johansson <olof@lixom.net>
2012-02-06ARM: tegra: emc: device tree bindingsOlof Johansson
Device tree bindings for the EMC tables on tegra. Signed-off-by: Olof Johansson <olof@lixom.net> Acked-by: Grant Likely <grant.likely@secretlab.ca>
2012-02-07m68k: Do not set global share for non-kernel shared pagesAlexander Stein
If the SG bit is set in MMUTR the page is accessible for all userspace processes (ignoring the ASID). So a process might randomly access a page from a different process which had a shared page (from shared memory) in its context. Signed-off-by: Alexander Stein <alexander.stein@systec-electronic.com> Signed-off-by: Greg Ungerer <gerg@uclinux.org>
generated by cgit (git 2.34.1) at 2025-09-12 19:41:49 +0000