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2018-06-01fs: move page_cache_seek_hole_data to iomap.cChristoph Hellwig
This function is only used by the iomap code, depends on being called from it, and will soon stop poking into buffer head internals. Signed-off-by: Christoph Hellwig <hch@lst.de> Reviewed-by: Andreas Gruenbacher <agruenba@redhat.com> Reviewed-by: Dave Chinner <dchinner@redhat.com> Reviewed-by: Darrick J. Wong <darrick.wong@oracle.com> Signed-off-by: Darrick J. Wong <darrick.wong@oracle.com>
2018-06-01xfs: use iomap_bmapChristoph Hellwig
Switch to the iomap based bmap implementation to get rid of one of the last users of xfs_get_blocks. Signed-off-by: Christoph Hellwig <hch@lst.de> Reviewed-by: Dave Chinner <dchinner@redhat.com> Reviewed-by: Darrick J. Wong <darrick.wong@oracle.com> Signed-off-by: Darrick J. Wong <darrick.wong@oracle.com>
2018-06-01iomap: add an iomap-based bmap implementationChristoph Hellwig
This adds a simple iomap-based implementation of the legacy ->bmap interface. Note that we can't easily add checks for rt or reflink files, so these will have to remain in the callers. This interface just needs to die.. Signed-off-by: Christoph Hellwig <hch@lst.de> Reviewed-by: Dave Chinner <dchinner@redhat.com> Reviewed-by: Darrick J. Wong <darrick.wong@oracle.com> Signed-off-by: Darrick J. Wong <darrick.wong@oracle.com>
2018-06-01iomap: add a iomap_sector helperChristoph Hellwig
Factor the repeated calculation of the on-disk sector for a given logical block into a littler helper. Signed-off-by: Christoph Hellwig <hch@lst.de> Reviewed-by: Dave Chinner <dchinner@redhat.com> Reviewed-by: Darrick J. Wong <darrick.wong@oracle.com> Signed-off-by: Darrick J. Wong <darrick.wong@oracle.com>
2018-06-01iomap: use __bio_add_page in iomap_dio_zeroChristoph Hellwig
We don't need any merging logic, and this also replaces a BUG_ON with a WARN_ON_ONCE inside __bio_add_page for the impossible overflow condition. Signed-off-by: Christoph Hellwig <hch@lst.de> Reviewed-by: Dave Chinner <dchinner@redhat.com> Reviewed-by: Darrick J. Wong <darrick.wong@oracle.com> Signed-off-by: Darrick J. Wong <darrick.wong@oracle.com>
2018-06-01iomap: move IOMAP_F_BOUNDARY to gfs2Christoph Hellwig
Just define a range of fs specific flags and use that in gfs2 instead of exposing this internal flag globally. Signed-off-by: Christoph Hellwig <hch@lst.de> Reviewed-by: Dave Chinner <dchinner@redhat.com> Reviewed-by: Darrick J. Wong <darrick.wong@oracle.com> Signed-off-by: Darrick J. Wong <darrick.wong@oracle.com>
2018-06-01iomap: fix the comment describing IOMAP_NOWAITChristoph Hellwig
Signed-off-by: Christoph Hellwig <hch@lst.de> Reviewed-by: Dave Chinner <dchinner@redhat.com> Reviewed-by: Darrick J. Wong <darrick.wong@oracle.com> Signed-off-by: Darrick J. Wong <darrick.wong@oracle.com>
2018-06-01iomap: inline data should be an iomap type, not a flagChristoph Hellwig
Inline data is fundamentally different from our normal mapped case in that it doesn't even have a block address. So instead of having a flag for it it should be an entirely separate iomap range type. Signed-off-by: Christoph Hellwig <hch@lst.de> Reviewed-by: Dave Chinner <dchinner@redhat.com> Reviewed-by: Darrick J. Wong <darrick.wong@oracle.com> Signed-off-by: Darrick J. Wong <darrick.wong@oracle.com>
2018-06-01mm: split ->readpages calls to avoid non-contiguous pages listsChristoph Hellwig
That way file systems don't have to go spotting for non-contiguous pages and work around them. It also kicks off I/O earlier, allowing it to finish earlier and reduce latency. Signed-off-by: Christoph Hellwig <hch@lst.de> Reviewed-by: Dave Chinner <dchinner@redhat.com> Reviewed-by: Darrick J. Wong <darrick.wong@oracle.com> Signed-off-by: Darrick J. Wong <darrick.wong@oracle.com>
2018-06-01mm: return an unsigned int from __do_page_cache_readaheadChristoph Hellwig
We never return an error, so switch to returning an unsigned int. Most callers already did implicit casts to an unsigned type, and the one that didn't can be simplified now. Suggested-by: Matthew Wilcox <willy@infradead.org> Signed-off-by: Christoph Hellwig <hch@lst.de> Reviewed-by: Dave Chinner <dchinner@redhat.com> Reviewed-by: Darrick J. Wong <darrick.wong@oracle.com> Signed-off-by: Darrick J. Wong <darrick.wong@oracle.com>
2018-06-01mm: give the 'ret' variable a better name __do_page_cache_readaheadChristoph Hellwig
It counts the number of pages acted on, so name it nr_pages to make that obvious. Signed-off-by: Christoph Hellwig <hch@lst.de> Reviewed-by: Dave Chinner <dchinner@redhat.com> Reviewed-by: Darrick J. Wong <darrick.wong@oracle.com> Signed-off-by: Darrick J. Wong <darrick.wong@oracle.com>
2018-06-01block: add a lower-level bio_add_page interfaceChristoph Hellwig
For the upcoming removal of buffer heads in XFS we need to keep track of the number of outstanding writeback requests per page. For this we need to know if bio_add_page merged a region with the previous bvec or not. Instead of adding additional arguments this refactors bio_add_page to be implemented using three lower level helpers which users like XFS can use directly if they care about the merge decisions. Signed-off-by: Christoph Hellwig <hch@lst.de> Reviewed-by: Jens Axboe <axboe@kernel.dk> Reviewed-by: Ming Lei <ming.lei@redhat.com> Reviewed-by: Darrick J. Wong <darrick.wong@oracle.com> Signed-off-by: Darrick J. Wong <darrick.wong@oracle.com>
2018-06-01net/mlx5e: TX, Separate cachelines of xmit and completion statsTariq Toukan
Avoid false sharing of cachelines by separating the cachelines of TX stats that are dertied in xmit flow and in completion flow. Signed-off-by: Tariq Toukan <tariqt@mellanox.com> Signed-off-by: Saeed Mahameed <saeedm@mellanox.com>
2018-06-01net/mlx5e: RX, Always prefer Linear SKB configurationTariq Toukan
Prefer the linear SKB configuration of Legacy RQ over the non-linear one of Striding RQ. This implies that ConnectX-4 LX now uses legacy RQ by default, as it does not support the linear configuration of Striding RQ. Signed-off-by: Tariq Toukan <tariqt@mellanox.com> Signed-off-by: Saeed Mahameed <saeedm@mellanox.com>
2018-06-01net/mlx5e: RX, Enhance legacy Receive Queue memory schemeTariq Toukan
Enhance the memory scheme of the legacy RQ, such that only order-0 pages are used. Whenever possible, prefer using a linear SKB, and build it wrapping the WQE buffer. Otherwise (for example, jumbo frames on x86), use non-linear SKB, with as many frags as needed. In this case, multiple WQE scatter entries are used, up to a maximum of 4 frags and 10KB of MTU. This implied to remove support of HW LRO in legacy RQ, as it would require large number of page allocations and scatter entries per WQE on archs with PAGE_SIZE = 4KB, yielding bad performance. In earlier patches, we guaranteed that all completions are in-order, and that we use a cyclic WQ. This creates an oppurtunity for a performance optimization: The mapping between a "struct mlx5e_dma_info", and the WQEs (struct mlx5e_wqe_frag_info) pointing to it, is constant across different cycles of a WQ. This allows initializing the mapping in the time of RQ creation, and not handle it in datapath. A struct mlx5e_dma_info that is shared between different WQEs is allocated by the first WQE, and freed by the last one. This implies an important requirement: WQEs that share the same struct mlx5e_dma_info must be posted within the same NAPI. Otherwise, upon completion, struct mlx5e_wqe_frag_info would mistakenly point to the new struct mlx5e_dma_info, not the one that was posted (and the HW wrote to). This bulking requirement is actually good also for performance reasons, hence we extend the bulk beyong the minimal requirement above. With this memory scheme, the RQs memory footprint is reduce by a factor of 2 on x86, and by a factor of 32 on PowerPC. Same factors apply for the number of pages in a GRO session. Performance tests: ConnectX-4, single core, single RX ring, default MTU. x86: CPU: Intel(R) Xeon(R) CPU E5-2680 v3 @ 2.50GHz Packet rate (early drop in TC): no degradation TCP streams: ~5% improvement PowerPC: CPU: POWER8 (raw), altivec supported Packet rate (early drop in TC): 20% gain TCP streams: 25% gain Signed-off-by: Tariq Toukan <tariqt@mellanox.com> Signed-off-by: Saeed Mahameed <saeedm@mellanox.com>
2018-06-01net/mlx5e: RX, Use cyclic WQ in legacy RQTariq Toukan
Now that LRO is not supported for Legacy RQ, there is no source of out-of-order completions in the WQ, and we can use a cyclic one. This has multiple advantages: - reduces the WQE size (smaller PCI transactions). - lower overhead in datapath (no handling of 'next' pointers). - no reserved WQE for the WQ head (was need in linked-list). - allows using a constant map between frag and dma_info struct, in downstream patch. Performance tests: ConnectX-4, single core, single RX ring. Major gain in packet rate of single ring XDP drop. Bottleneck is shifted form HW (at 16Mpps) to SW (at 20Mpps). Signed-off-by: Tariq Toukan <tariqt@mellanox.com> Signed-off-by: Saeed Mahameed <saeedm@mellanox.com>
2018-06-01net/mlx5e: RX, Split WQ objects for different RQ typesTariq Toukan
Replace the common RQ WQ object with two separate ones for the different RQ types. This is in preparation for switching to using a cyclic WQ type in Legacy RQ. Signed-off-by: Tariq Toukan <tariqt@mellanox.com> Signed-off-by: Saeed Mahameed <saeedm@mellanox.com>
2018-06-01net/mlx5e: RX, Remove HW LRO support in legacy RQTariq Toukan
Current LRO implementation in Legacy RQ uses high-order pages. In downstream patches of this series we complete the transition to using only order-0 pages in RX datapath (which was already done in Striding RQ). Unlike the more advanced Striding RQ, Legacy RQ does not make reuse of any non-consumed buffers of non-full LRO sessions, and combining it with order-0 pages has many performance drawbacks. Hence, here we totally remove LRO support in Legacy RQ. This guarantees having no out-of-order completions, which allows using a cyclic work queue (instead of a linked-list) in a downstream patch. Signed-off-by: Tariq Toukan <tariqt@mellanox.com> Signed-off-by: Saeed Mahameed <saeedm@mellanox.com>
2018-06-01net/mlx5e: RX, Dedicate a function for copying SKB headerTariq Toukan
Get the logic of copying the packet header into the SKB linear part into a generic function. Function does copy length alignment and dma buffer sync. It is currently called only within the MPWQE flow. In a downstream patch, it will be called within the legacy RQ flow as well. Signed-off-by: Tariq Toukan <tariqt@mellanox.com> Signed-off-by: Saeed Mahameed <saeedm@mellanox.com>
2018-06-01net/mlx5e: RX, Generalise function of SKB frag additionTariq Toukan
Rename it and pass truesize as an extra argument, as it will be used also in Legacy RQ in a downstream patch. Signed-off-by: Tariq Toukan <tariqt@mellanox.com> Signed-off-by: Saeed Mahameed <saeedm@mellanox.com>
2018-06-01net/mlx5e: RX, Generalise name of non-linear SKB head sizeTariq Toukan
Make name more generic by dropping MPWRQ from it, as it will be used also in Legacy RQ in a downstream patch. Signed-off-by: Tariq Toukan <tariqt@mellanox.com> Signed-off-by: Saeed Mahameed <saeedm@mellanox.com>
2018-06-01net/mlx5e: TX, Obsolete maintaining local copies of skb->len/dataTariq Toukan
Instead of maintaining a local copy of skb->len/data and updating it upon every copy to the WQE inline part, just calculate it once when needed, using the ihs. This obsoletes the function mlx5e_tx_skb_pull_inline. Signed-off-by: Tariq Toukan <tariqt@mellanox.com> Signed-off-by: Saeed Mahameed <saeedm@mellanox.com>
2018-06-01net/mlx5: FPGA, Handle QP error eventIlan Tayari
Add handlers for this event to perform graceful teardown of the device. Signed-off-by: Ilan Tayari <ilant@mellanox.com> Signed-off-by: Adi Nissim <adin@mellanox.com> Signed-off-by: Saeed Mahameed <saeedm@mellanox.com>
2018-06-01net/mlx5e: Support configurable MTU for vport representorsAdi Nissim
The representor MTU was hard coded to 1500 bytes. Allow setting arbitrary MTU values up to the max supported by the FW. Signed-off-by: Adi Nissim <adin@mellanox.com> Reviewed-by: Or Gerlitz <ogerlitz@mellanox.com> Signed-off-by: Saeed Mahameed <saeedm@mellanox.com>
2018-06-01net/mlx5e: Increase aRFS flow tables sizeMaor Gottlieb
Increase the aRFS flow table size to 64k so it could contain up to 64k different streams. Signed-off-by: Maor Gottlieb <maorg@mellanox.com> Signed-off-by: Saeed Mahameed <saeedm@mellanox.com>
2018-06-01net/mlx5e: Remove redundant active_channels indicationEran Ben Elisha
Now, when all channels stats are saved regardless of the channel's state {open, closed}, we can safely remove this indication and the stats spin lock which protects it. Fixes: 76c3810bade3 ("net/mlx5e: Avoid reset netdev stats on configuration changes") Signed-off-by: Eran Ben Elisha <eranbe@mellanox.com> Signed-off-by: Saeed Mahameed <saeedm@mellanox.com>
2018-06-01net/mlx5e: Present SW stats when state is not openedEran Ben Elisha
The driver can present all SW stats even when the state not opened. Fixed get strings, count and stats to support it. In addition, fix tc2txq to hold a static mapping which doesn't depend on the amount of open channels, and cannot have the same value on two different cells while moving between configurations. Example: - OOB 16 channels - Change to 2 channels, 8 TCs - tc2txq[15][0] == tc2txq[1][7] == 15 This will cause multiple appearances of the same TX index in statistics output. Fixes: 76c3810bade3 ("net/mlx5e: Avoid reset netdev stats on configuration changes") Signed-off-by: Eran Ben Elisha <eranbe@mellanox.com> Signed-off-by: Saeed Mahameed <saeedm@mellanox.com>
2018-06-01net/mlx5e: IPOIB, Add a missing skb_pullTariq Toukan
A call to mlx5e_tx_skb_pull_inline was mistakenly dropped in the cited patch. Get it back. Fixes: 043dc78ecf07 ("net/mlx5e: TX, Use actual WQE size for SQ edge fill") Signed-off-by: Tariq Toukan <tariqt@mellanox.com> Signed-off-by: Saeed Mahameed <saeedm@mellanox.com>
2018-06-01net/mlx5e: IPOIB, Fix overflowing SQ WQE memsetTariq Toukan
IPoIB WQE size is larger than a single WQEBB. Must not fetch the WQE, and surely not memset it, until it is guaranteed that there are enough WQEBBs available before getting to SQ/frag edge. Fixes: 043dc78ecf07 ("net/mlx5e: TX, Use actual WQE size for SQ edge fill") Signed-off-by: Tariq Toukan <tariqt@mellanox.com> Signed-off-by: Saeed Mahameed <saeedm@mellanox.com>
2018-06-01tools/power turbostat: Don't make man pages executableLaura Abbott
rpm-lint flagged these as being executable: kernel-tools.x86_64: W: spurious-executable-perm /usr/share/man/man8/turbostat.8.gz kernel-tools.x86_64: W: spurious-executable-perm /usr/share/man/man8/x86_energy_perf_policy.8.gz Fix this Signed-off-by: Laura Abbott <labbott@redhat.com> Signed-off-by: Len Brown <len.brown@intel.com>
2018-06-01tools/power turbostat: remove blank linesLen Brown
When the user reuests to collect and show columns that are not present on every row (eg. for every CPU) turbostat still prints an (empty) line for every CPU. Update so no blank lines are printed. old: # turbostat --quiet --show Pkg%pc6 Pkg%pc6 9.12 9.12 Pkg%pc6 9.12 9.12 new: # turbostat --quiet --show Pkg%pc6 Pkg%pc6 9.12 9.12 Pkg%pc6 9.12 9.12 Reported-by: Artem Bityutskiy <artem.bityutskiy@linux.intel.com> Signed-off-by: Len Brown <len.brown@intel.com>
2018-06-01tools/power turbostat: a small C-states dump readability immprovementArtem Bityutskiy
Improve readability a little bit by changing this output: MSR_PKG_CST_CONFIG_CONTROL: 0x00008407 (locked: pkg-cstate-limit=7: unlimited, automatic-c-state-conversion=off) with this output: MSR_PKG_CST_CONFIG_CONTROL: 0x00008407 (locked, pkg-cstate-limit=7 (unlimited), automatic-c-state-conversion=off) Signed-off-by: Artem Bityutskiy <artem.bityutskiy@linux.intel.com> Signed-off-by: Len Brown <len.brown@intel.com>
2018-06-01tools/power turbostat: dump BDX, SKX automatic C-state conversion bitArtem Bityutskiy
BDX and SKX have a bit that tells them to PROMOTE shallow C-states requests to MWAIT(C6). It is generally a BIOS bug if this bit is set. As we have encountered that BIOS bug, let's print this bit in turbostat debug output. Signed-off-by: Artem Bityutskiy <artem.bityutskiy@linux.intel.com> Signed-off-by: Len Brown <len.brown@intel.com>
2018-06-01tools/power turbostat: do not hard-code 25MHz crystal on SKXLen Brown
Some SKX use a 24 MHz crystal, so do not hard code 25 MHz. Also, SKX crystal is not exact, because SKX uses an EMI reduction circuit that costs a fraction of a percent. Signed-off-by: Len Brown <len.brown@intel.com>
2018-06-01tools/power turbostat: fix possible sprintf buffer overflowLen Brown
Signed-off-by: Len Brown <len.brown@intel.com>
2018-06-01Merge tag 'irqchip-4.18' of ↵Thomas Gleixner
git://git.kernel.org/pub/scm/linux/kernel/git/maz/arm-platforms into irq/core Pull irqchip updates for 4.18 from Marc Zyngier: - Support for Meson-AXG GPIO irqchip - Large stm32 irqchip rework (suspend/resume, hierarchical domains)
2018-06-01clk: mvebu: use correct bit for 98DX3236 NANDChris Packham
The correct fieldbit value for the NAND PLL reload trigger is 27. Fixes: commit e120c17a70e5 ("clk: mvebu: support for 98DX3236 SoC") Signed-off-by: Chris Packham <chris.packham@alliedtelesis.co.nz> Signed-off-by: Stephen Boyd <sboyd@kernel.org>
2018-06-01clk/driver/hisi: Consolidate the Kconfig for the CLOCK_STUBDaniel Lezcano
The current defconfig is inconsistent as it selects the mailbox and the clock for the hi6220 and the hi3660 without having their Kconfigs making sure the dependencies are correct. It ends up when selecting different versions for the kernel (for example when git bisecting) those options disappear and they don't get back, leading to unexpected behaviors. In our case, the cpufreq driver does no longer work because the clock fails to initialize due to the clock stub and the mailbox missing. In order to have the dependencies correctly set when defaulting, let's do the same as commit 3a49afb84ca074e ("clk: enable hi655x common clk automatically") where we select automatically the driver when the parent driver is selected. With sensible defaults in place, we can leave other choices for EXPERT. Signed-off-by: Daniel Lezcano <daniel.lezcano@linaro.org> Signed-off-by: Leo Yan <leo.yan@linaro.org> Signed-off-by: Stephen Boyd <sboyd@kernel.org>
2018-06-01clk: imx7d: reset parent for mipi csi rootRui Miguel Silva
To guarantee that we do not get Overflow in image FIFO the outer bandwidth has to be faster than inputer bandwidth. For that it must be possible to set a faster frequency clock. So set new parent to sys_pfd3 clock for the mipi csi block. Acked-by: Shawn Guo <shawnguo@kernel.org> Signed-off-by: Rui Miguel Silva <rui.silva@linaro.org> Signed-off-by: Stephen Boyd <sboyd@kernel.org>
2018-06-01clk: imx7d: fix mipi dphy div parentRui Miguel Silva
Fix the mipi dphy root divider to mipi_dphy_pre_div, this would remove a orphan clock and set the correct parent. before: cat clk_orphan_summary enable prepare protect clock count count count rate accuracy phase ---------------------------------------------------------------------------------------- mipi_dphy_post_div 1 1 0 0 0 0 mipi_dphy_root_clk 1 1 0 0 0 0 cat clk_dump | grep mipi_dphy mipi_dphy_post_div 1 1 0 0 0 0 mipi_dphy_root_clk 1 1 0 0 0 0 after: cat clk_dump | grep mipi_dphy mipi_dphy_src 1 1 0 24000000 0 0 mipi_dphy_cg 1 1 0 24000000 0 0 mipi_dphy_pre_div 1 1 0 24000000 0 0 mipi_dphy_post_div 1 1 0 24000000 0 0 mipi_dphy_root_clk 1 1 0 24000000 0 0 Fixes: 8f6d8094b215 ("ARM: imx: add imx7d clk tree support") Acked-by: Dong Aisheng <Aisheng.dong@nxp.com> Signed-off-by: Rui Miguel Silva <rui.silva@linaro.org> Signed-off-by: Stephen Boyd <sboyd@kernel.org>
2018-06-01clk: qcom: gcc-msm8996: Disable halt check on UFS clocksBjorn Andersson
The halt check of the UFS symbol clocks always fails, as such probing UFS after clk_disable_unused always fails. This makes it impossible to boot a system with the UFS phy or UFS HCD drivers compiled as modules. Follow SDM845 and disable the halt check on these clocks. Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org> Signed-off-by: Stephen Boyd <sboyd@kernel.org>
2018-06-01clk: aspeed: Add 24MHz fixed clockLei YU
Add a 24MHz fixed clock. This clock will be used for certain devices, e.g. pwm. Signed-off-by: Lei YU <mine260309@gmail.com> Reviewed-by: Joel Stanley <joel@jms.id.au> Acked-by: Rob Herring <robh@kernel.org> Signed-off-by: Stephen Boyd <sboyd@kernel.org>
2018-06-01ARM: dts: imx7: correct enet ipg clockAnson Huang
ENET "ipg" clock should be IMX7D_ENETx_IPG_ROOT_CLK rather than IMX7D_ENET_AXI_ROOT_CLK which is for ENET bus clock. Based on Andy Duan's patch from the NXP kernel tree. Signed-off-by: Anson Huang <Anson.Huang@nxp.com> Reviewed-by: Stefan Agner <stefan@agner.ch> Signed-off-by: Stephen Boyd <sboyd@kernel.org>
2018-06-01clk: imx7d: correct enet clock CCGR registersAnson Huang
Correct enet clock gates as below: CCGR6: IMX7D_ENET_AXI_ROOT_CLK (enet1 and enet2 bus clocks) CCGR112: IMX7D_ENET1_TIME_ROOT_CLK, IMX7D_ENET1_IPG_ROOT_CLK CCGR113: IMX7D_ENET2_TIME_ROOT_CLK, IMX7D_ENET2_IPG_ROOT_CLK Just rename unused IMX7D_ENETx_REF_ROOT_CLK for IMX7D_ENETx_IPG_ROOT_CLK instead of adding new clocks. Based on Andy Duan's patch from the NXP kernel tree. Signed-off-by: Anson Huang <Anson.Huang@nxp.com> Acked-by: Rob Herring <robh@kernel.org> Reviewed-by: Stefan Agner <stefan@agner.ch> Signed-off-by: Stephen Boyd <sboyd@kernel.org>
2018-06-01clk: imx7d: correct enet phy ref clock gatesAnson Huang
IMX7D_ENET_PHY_REF_ROOT_DIV supplies clock for PHY directly, there is no clock gate after it, rename it to IMX7D_ENET_PHY_REF_ROOT_CLK to avoid device tree change. Signed-off-by: Anson Huang <Anson.Huang@nxp.com> Reviewed-by: Stefan Agner <stefan@agner.ch> Signed-off-by: Stephen Boyd <sboyd@kernel.org>
2018-06-01perf tools intel-pt-decoder: Update insn.h from the kernel sourcesArnaldo Carvalho de Melo
To pick up the changes in: ee6a7354a362 ("kprobes/x86: Prohibit probing on exception masking instructions") That doesn't entail changes in tooling, but silences this perf build warning: Warning: Intel PT: x86 instruction decoder header at 'tools/perf/util/intel-pt-decoder/insn.h' differs from latest version at 'arch/x86/include/asm/insn.h' Cc: Adrian Hunter <adrian.hunter@intel.com> Cc: David Ahern <dsahern@gmail.com> Cc: Jiri Olsa <jolsa@kernel.org> Cc: Masami Hiramatsu <mhiramat@kernel.org> Cc: Namhyung Kim <namhyung@kernel.org> Cc: Thomas Gleixner <tglx@linutronix.de> Cc: Wang Nan <wangnan0@huawei.com> Link: https://lkml.kernel.org/n/tip-o3wfwjnyh7r8l0gi9q3y9f44@git.kernel.org Signed-off-by: Arnaldo Carvalho de Melo <acme@redhat.com>
2018-06-01tools headers: Sync x86 cpufeatures.h with the kernel sourcesArnaldo Carvalho de Melo
To pick up changes found in these csets: 11fb0683493b x86/speculation: Add virtualized speculative store bypass disable support d1035d971829 x86/cpufeatures: Add FEATURE_ZEN 52817587e706 x86/cpufeatures: Disentangle SSBD enumeration 7eb8956a7fec x86/cpufeatures: Disentangle MSR_SPEC_CTRL enumeration from IBRS e7c587da1252 x86/speculation: Use synthetic bits for IBRS/IBPB/STIBP 9f65fb29374e x86/bugs: Rename _RDS to _SSBD 764f3c21588a x86/bugs/AMD: Add support to disable RDS on Fam[15,16,17]h if requested 24f7fc83b920 x86/bugs: Provide boot parameters for the spec_store_bypass_disable mitigation 0cc5fa00b0a8 x86/cpufeatures: Add X86_FEATURE_RDS c456442cd3a5 x86/bugs: Expose /sys/../spec_store_bypass The usage of this file in tools doesn't use the newly added X86_FEATURE_ defines: CC /tmp/build/perf/bench/mem-memcpy-x86-64-asm.o CC /tmp/build/perf/bench/mem-memset-x86-64-asm.o LD /tmp/build/perf/bench/perf-in.o LD /tmp/build/perf/perf-in.o Silencing this perf build warning: Warning: Kernel ABI header at 'tools/arch/x86/include/asm/cpufeatures.h' differs from latest version at 'arch/x86/include/asm/cpufeatures.h' Cc: Adrian Hunter <adrian.hunter@intel.com> Cc: Borislav Petkov <bp@suse.de> Cc: David Ahern <dsahern@gmail.com> Cc: Jiri Olsa <jolsa@kernel.org> Cc: Konrad Rzeszutek Wilk <konrad.wilk@oracle.com> Cc: Namhyung Kim <namhyung@kernel.org> Cc: Thomas Gleixner <tglx@linutronix.de> Cc: Tom Lendacky <thomas.lendacky@amd.com> Cc: Wang Nan <wangnan0@huawei.com> Link: https://lkml.kernel.org/n/tip-mrwyauyov8c7s048abg26khg@git.kernel.org Signed-off-by: Arnaldo Carvalho de Melo <acme@redhat.com>
2018-06-01tools headers: Synchronize prctl.h ABI headerArnaldo Carvalho de Melo
To pick up changes from: $ git log --oneline -2 -i include/uapi/linux/prctl.h 356e4bfff2c5 prctl: Add force disable speculation b617cfc85816 prctl: Add speculation control prctls $ tools/perf/trace/beauty/prctl_option.sh > before.c $ cp include/uapi/linux/prctl.h tools/include/uapi/linux/prctl.h $ tools/perf/trace/beauty/prctl_option.sh > after.c $ diff -u before.c after.c --- before.c 2018-06-01 10:39:53.834073962 -0300 +++ after.c 2018-06-01 10:42:11.307985394 -0300 @@ -35,6 +35,8 @@ [42] = "GET_THP_DISABLE", [45] = "SET_FP_MODE", [46] = "GET_FP_MODE", + [52] = "GET_SPECULATION_CTRL", + [53] = "SET_SPECULATION_CTRL", }; static const char *prctl_set_mm_options[] = { [1] = "START_CODE", $ This will be used by 'perf trace' to show these strings when beautifying the prctl syscall args. At some point we'll be able to say something like: 'perf trace --all-cpus -e prctl(option=*SPEC*)' To filter by arg by name. This silences this warning when building tools/perf: Warning: Kernel ABI header at 'tools/include/uapi/linux/prctl.h' differs from latest version at 'include/uapi/linux/prctl.h' Cc: Adrian Hunter <adrian.hunter@intel.com> Cc: David Ahern <dsahern@gmail.com> Cc: Jiri Olsa <jolsa@kernel.org> Cc: Namhyung Kim <namhyung@kernel.org> Cc: Thomas Gleixner <tglx@linutronix.de> Cc: Wang Nan <wangnan0@huawei.com> Link: https://lkml.kernel.org/n/tip-zztsptwhc264r8wg44tqh5gp@git.kernel.org Signed-off-by: Arnaldo Carvalho de Melo <acme@redhat.com>
2018-06-01perf trace beauty prctl: Default header_dir to cwd to work without parmsArnaldo Carvalho de Melo
Useful when checking the effects of header synchs for the files it uses as a input to generate string tables, in retrospect this is how it should've been done from day 1, not requiring the header_dir to be set on the Makefile, will change everything later, so that the only parm, common to all generators will be $(srctree) and $(beauty_outdir). So, to see what it generates, just call it without any parameters: $ tools/perf/trace/beauty/prctl_option.sh static const char *prctl_options[] = { [1] = "SET_PDEATHSIG", [2] = "GET_PDEATHSIG", [3] = "GET_DUMPABLE", [4] = "SET_DUMPABLE", [5] = "GET_UNALIGN", [6] = "SET_UNALIGN", [7] = "GET_KEEPCAPS", [8] = "SET_KEEPCAPS", [9] = "GET_FPEMU", [10] = "SET_FPEMU", [11] = "GET_FPEXC", [12] = "SET_FPEXC", [13] = "GET_TIMING", [14] = "SET_TIMING", [15] = "SET_NAME", [16] = "GET_NAME", [19] = "GET_ENDIAN", [20] = "SET_ENDIAN", [21] = "GET_SECCOMP", [22] = "SET_SECCOMP", [25] = "GET_TSC", [26] = "SET_TSC", [27] = "GET_SECUREBITS", [28] = "SET_SECUREBITS", [29] = "SET_TIMERSLACK", [30] = "GET_TIMERSLACK", [35] = "SET_MM", [36] = "SET_CHILD_SUBREAPER", [37] = "GET_CHILD_SUBREAPER", [38] = "SET_NO_NEW_PRIVS", [39] = "GET_NO_NEW_PRIVS", [40] = "GET_TID_ADDRESS", [41] = "SET_THP_DISABLE", [42] = "GET_THP_DISABLE", [45] = "SET_FP_MODE", [46] = "GET_FP_MODE", }; static const char *prctl_set_mm_options[] = { [1] = "START_CODE", [2] = "END_CODE", [3] = "START_DATA", [4] = "END_DATA", [5] = "START_STACK", [6] = "START_BRK", [7] = "BRK", [8] = "ARG_START", [9] = "ARG_END", [10] = "ENV_START", [11] = "ENV_END", [12] = "AUXV", [13] = "EXE_FILE", [14] = "MAP", [15] = "MAP_SIZE", }; $ Cc: Adrian Hunter <adrian.hunter@intel.com> Cc: David Ahern <dsahern@gmail.com> Cc: Jiri Olsa <jolsa@kernel.org> Cc: Namhyung Kim <namhyung@kernel.org> Cc: Wang Nan <wangnan0@huawei.com> Link: https://lkml.kernel.org/n/tip-qtotspuztydjttxi7k6mec6h@git.kernel.org Signed-off-by: Arnaldo Carvalho de Melo <acme@redhat.com>
2018-06-01clk: imx6sl: correct ocram_podf clock typeAnson Huang
IMX6SL_CLK_OCRAM_PODF is a busy divider, its name in CCM_CDHIPR register of Reference Manual CCM chapter is axi_podf_busy, correct its clock type. Signed-off-by: Anson Huang <Anson.Huang@nxp.com> Acked-by: Shawn Guo <shawnguo@kernel.org> Signed-off-by: Stephen Boyd <sboyd@kernel.org>
generated by cgit (git 2.34.1) at 2025-09-15 17:58:27 +0000