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2019-08-03arm64: dts: bitmain: Add reset controller support for BM1880 SoCManivannan Sadhasivam
Add reset controller support for Bitmain BM1880 SoC. This commit also adds reset support to UART peripherals. Signed-off-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org> Reviewed-by: Philipp Zabel <p.zabel@pengutronix.de>
2019-08-03arm64: dts: imx8mm: Add opp-suspend property to OPP tableAnson Huang
Add opp-suspend property to each OPP, the of opp core will select the OPP HW supported and with highest rate to be suspend opp, it will speed up the suspend/resume process. Signed-off-by: Anson Huang <Anson.Huang@nxp.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2019-08-03arm64: dts: imx8mq: Add opp-suspend property to OPP tableAnson Huang
Add opp-suspend property to each OPP, the of opp core will select the OPP HW supported and with highest rate to be suspend opp, it will speed up the suspend/resume process. Signed-off-by: Anson Huang <Anson.Huang@nxp.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2019-08-03arm64: dts: ls1088a: Revise gpio registers to little-endianChuanhua Han
Since fsl-ls1088a Soc GPIO registers are used as little endian, the patch adds the little-endian attribute to each gpio node. Signed-off-by: Chuanhua Han <chuanhua.han@nxp.com> Acked-by: Li Yang <leoyang.li@nxp.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2019-08-03arm64: dts: add the console node for DPAA2 platformsIoana Ciornei
Add the console device tree node for the following DPAA2 based platforms: LS1088A, LS2080A, LS2088A and LX2160A. Signed-off-by: Ioana Ciornei <ioana.ciornei@nxp.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2019-08-03arm64: dts: fsl: pico-pi: Add a device tree for the PICO-PI-IMX8MRichard Hu
TechNexion PICO-PI-IMX8M-DEV evaluation and development kit based on NXP i.MX8M Quad applications processor. Datasheet can be found at: https://s3.us-east-2.amazonaws.com/technexion/datasheets/picopiimx8m.pdf The current level of support yields a working console and is able to boot userspace from NFS or init ramdisk. Additional subsystems that are active : - Ethernet - USB Cc: Daniel Baluta <daniel.baluta@nxp.com> Signed-off-by: Richard Hu <richard.hu@technexion.com> Signed-off-by: Andra Danciu <andradanciu1997@gmail.com> Reviewed-by: Fabio Estevam <festevam@gmail.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2019-08-03arm64: dts: imx8qxp: add serial aliasFugang Duan
Add i.MX8QXP serial alias for lpuart ports. Signed-off-by: Fugang Duan <fugang.duan@nxp.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2019-08-03arm64: dts: imx8qxp: add lpuart baud clockFugang Duan
Add imx8qxp lpuart baud clock. Signed-off-by: Fugang Duan <fugang.duan@nxp.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2019-08-03arm64: dts: ls1028a: Add optional property node for Mali DP500Wen He
This patch use the optional property node "arm,malidp-arqos-value" to can be dynamic configure QoS signaling. Signed-off-by: Wen He <wen.he_1@nxp.com> Reviewed-by: Liviu Dudau <liviu.dudau@arm.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2019-08-03arm64: dts: freescale: Add support for i.MX8QXP AI_ML boardManivannan Sadhasivam
Add support for i.MX8QXP AI_ML board from Einfochips. This board is one of the Consumer Edition boards of the 96Boards family based on i.MX8QXP SoC from NXP/Freescale. The initial support includes following peripherals which are tested and known to be working: 1. Debug serial via UART2 2. uSD 3. WiFi 4. Ethernet More information about this board can be found in Arrow website: https://www.arrow.com/en/products/imx8-ai-ml/arrow-development-tools Signed-off-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org> Reviewed-by: Dong Aisheng <aisheng.dong@nxp.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2019-08-03arm64: dts: imx8mm-evk: Remove invalid propertiesFabio Estevam
All these at803x properties are not documented anywhere, so just remove them. Signed-off-by: Fabio Estevam <festevam@gmail.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2019-08-03arm64: dts: nxp: add ls1046a-frwy board supportPramod Kumar
ls1046afrwy board is based on nxp ls1046a SoC. Board support's 4GB ddr memory, i2c, microSD card, serial console,qspi nor flash,ifc nand flash,qsgmii network interface, usb 3.0 and serdes interface to support two x1gen3 pcie interface. Signed-off-by: Vabhav Sharma <vabhav.sharma@nxp.com> Signed-off-by: Pramod Kumar <pramod.kumar_1@nxp.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2019-08-03arm64: dts: rdu3: add UCS1002 charge controller nodeLucas Stach
Add the charge controller node. With the controller driver loaded the VBUS of the user USB socket is controlled exclusively via i2c with the GPIO controls ignored, so vbus-supply for the user USB port must be linked to the charge controller. Hog the previously used GPIO control to unconditionally enable VBUS until the driver is loaded. Signed-off-by: Lucas Stach <l.stach@pengutronix.de> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2019-08-03arm64: dts: imx8mq: correct usb controller clocksLi Jun
The correct clock for "bus_early", "ref", "suspend" should be: IMX8MQ_CLK_USB1_CTRL_ROOT, IMX8MQ_CLK_USB_CORE_REF, IMX8MQ_CLK_32K, especially we may need the right suspend clock rate to set register in controller driver. Signed-off-by: Li Jun <jun.li@nxp.com> Reviewed-by: Abel Vesa <abel.vesa@nxp.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2019-08-03arm64: dts: imx8mq: Add clock for TMU nodeAnson Huang
i.MX8MQ has clock gate for TMU module, add clock info to TMU node for clock management. Signed-off-by: Anson Huang <Anson.Huang@nxp.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2019-08-03arm64: dts: imx8mq: Correct OPP table according to latest datasheetAnson Huang
According to latest datasheet (Rev.1, 10/2018) from below links, in the consumer datasheet, 1.5GHz is mentioned as highest opp but depends on speed grading fuse, and in the industrial datasheet, 1.3GHz is mentioned as highest opp but depends on speed grading fuse. 1.5GHz and 1.3GHz opp use same voltage, so no need for consumer part to support 1.3GHz opp, with same voltage, CPU should run at highest frequency in order to go into idle as quick as possible, this can save power. That means for consumer part, 1GHz/1.5GHz are supported, for industrial part, 800MHz/1.3GHz are supported, and then check the speed grading fuse to limit the highest CPU frequency further. Correct the market segment bits in opp table to make them work according to datasheets. https://www.nxp.com/docs/en/data-sheet/IMX8MDQLQIEC.pdf https://www.nxp.com/docs/en/data-sheet/IMX8MDQLQCEC.pdf Fixes: 12629c5c3749 ("arm64: dts: imx8mq: Add cpu speed grading and all OPPs") Signed-off-by: Anson Huang <Anson.Huang@nxp.com> Reviewed-by: Leonard Crestez <leonard.crestez@nxp.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2019-08-03arm64: dts: imx8mm: Correct OPP table according to latest datasheetAnson Huang
According to latest datasheet (Rev.0.2, 04/2019) from below links, 1.8GHz is ONLY available for consumer part, so the market segment bits for 1.8GHz opp should ONLY available for consumer part accordingly. https://www.nxp.com/docs/en/data-sheet/IMX8MMIEC.pdf https://www.nxp.com/docs/en/data-sheet/IMX8MMCEC.pdf Fixes: f403a26c865b (arm64: dts: imx8mm: Add cpu speed grading and all OPPs) Signed-off-by: Anson Huang <Anson.Huang@nxp.com> Reviewed-by: Leonard Crestez <leonard.crestez@nxp.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2019-08-03arm64: dts: imx8mm: Add "fsl,imx8mq-src" as src's fallback compatibleAnson Huang
i.MX8MM can reuse i.MX8MQ's src driver, add "fsl,imx8mq-src" as src's fallback compatible to enable it. Signed-off-by: Anson Huang <Anson.Huang@nxp.com> Reviewed-by: Philipp Zabel <p.zabel@pengutronix.de> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2019-08-03arm64: dts: imx8m: Add ddr-pmu nodesLeonard Crestez
The same ddr perfomance counter IP from 8qxp is also available on imx8m series so add it to dts. Tested with `perf stat` and `memtester` on imx8mm-evk and obtained plausible results. Signed-off-by: Leonard Crestez <leonard.crestez@nxp.com> Acked-by: Frank Li <frank.li@nxp.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2019-08-03arm64: dts: imx8mm-evk: enable usb1 and typec supportLi Jun
USB1 port has typec connector with power delivery support: - Dual data role: host and device. - Dual power role: source and sink, prefer power sink. Signed-off-by: Li Jun <jun.li@nxp.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2019-08-03arm64: dts: imx8mm: Remove setting for IMX8MM_CLK_USB_CORE_REFLi Jun
Since IMX8MM_CLK_USB_CORE_REF is not used at all, so remove the setting for it. Signed-off-by: Li Jun <jun.li@nxp.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2019-08-03arm64: dts: imx8mm: Add gpio-ranges propertyAnson Huang
Add "gpio-ranges" property to establish connections between GPIOs and PINs on i.MX8MM pinctrl driver. Signed-off-by: Anson Huang <Anson.Huang@nxp.com> Reviewed-by: Abel Vesa <abel.vesa@nxp.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2019-08-03arm64: dts: imx8mq: Add gpio-ranges propertyAnson Huang
Add "gpio-ranges" property to establish connections between GPIOs and PINs on i.MX8MQ pinctrl driver. Signed-off-by: Anson Huang <Anson.Huang@nxp.com> Reviewed-by: Abel Vesa <abel.vesa@nxp.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2019-08-03arm64: dts: imx8mm: Init rates and parents configs for clocksAbel Vesa
Add the initial configuration for clocks that need default parent and rate setting. This is based on the vendor tree clock provider parents and rates configuration except this is doing the setup in dts rather than using clock consumer API in a clock provider driver. Signed-off-by: Abel Vesa <abel.vesa@nxp.com> Acked-by: Daniel Baluta <daniel.baluta@nxp.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2019-08-03drm/modes: Fix unterminated strncpyChuhong Yuan
strncpy(dest, src, strlen(src)) leads to unterminated dest, which is dangerous. Fix it by using strscpy. Fixes: 3aeeb13d8996 ("drm/modes: Support modes names on the command line") Signed-off-by: Chuhong Yuan <hslester96@gmail.com> Signed-off-by: Maxime Ripard <maxime.ripard@bootlin.com> Link: https://patchwork.freedesktop.org/patch/msgid/20190731020140.3529-1-hslester96@gmail.com
2019-08-03ARM: dts: imx6qdl-wandboard: Add OV5645 camera supportEzequiel Garcia
imx6qdl-wandboard can be connected to a OV5645 camera via MIPI CSI port. Add support for it. PAD_GPIO_6 has been originally used for the Ethernet FEC ERR006687 workaround, but it needs to be used to provide the camera sensor clock, so adjust it accordingly. Signed-off-by: Ezequiel Garcia <ezequiel@collabora.com> Signed-off-by: Fabio Estevam <festevam@gmail.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2019-08-03dt-bindings: bus: imx-weim: document optional burst clock modeSven Van Asbroeck
An optional devicetree property was added to the imx-weim driver, which if present instructs it to operate in burst clock mode. Update the dt-bindings to reflect this. Signed-off-by: Sven Van Asbroeck <TheSven73@gmail.com> Reviewed-by: Rob Herring <robh@kernel.org> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2019-08-03clk: imx8: Add DSP related clocksDaniel Baluta
i.MX8QXP contains Hifi4 DSP. There are four clocks associated with DSP: * dsp_lpcg_core_clk * dsp_lpcg_ipg_clk * dsp_lpcg_adb_aclk * ocram_lpcg_ipg_clk Signed-off-by: Daniel Baluta <daniel.baluta@nxp.com> Reviewed-by: Dong Aisheng <aisheng.dong@nxp.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2019-08-03clk: imx: Add support for i.MX8MN clock driverAnson Huang
This patch adds i.MX8MN clock driver support. Signed-off-by: Anson Huang <Anson.Huang@nxp.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2019-08-03clk: imx: Add API for clk unregister when driver probe failAnson Huang
For i.MX clock drivers probe fail case, clks should be unregistered in the return path, this patch adds a common API for i.MX clock drivers to unregister clocks when fail. Signed-off-by: Anson Huang <Anson.Huang@nxp.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2019-08-03clk: imx8mm: Make 1416X/1443X PLL macro definitions common for usageAnson Huang
1416X/1443X PLL are used on i.MX8MM and i.MX8MN and maybe other i.MX8M series SoC later, the macro definitions of these PLLs' initialization should be common for usage. Signed-off-by: Anson Huang <Anson.Huang@nxp.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2019-08-03dt-bindings: imx: Add clock binding doc for i.MX8MNAnson Huang
Add the clock binding doc for i.MX8MN. Signed-off-by: Anson Huang <Anson.Huang@nxp.com> Reviewed-by: Maxime Ripard <maxime.ripard@bootlin.com> Reviewed-by: Rob Herring <robh@kernel.org> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2019-08-02drm/amd/powerplay: correct navi10 vcn powergateEvan Quan
vcn dpm on is a prerequisite for vcn power gate control. Signed-off-by: Evan Quan <evan.quan@amd.com> Reviewed-by: Kenneth Feng <kenneth.feng@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2019-08-02drm/amd/powerplay: honor hw limit on fetching metrics data for navi10Kevin Wang
too frequently to update mertrics table will cause smu internal error. Signed-off-by: Kevin Wang <kevin1.wang@amd.com> Reviewed-by: Evan Quan <evan.quan@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2019-08-02drm/amd/powerplay: Allow changing of fan_control in smu_v11_0Matt Coffin
[Why] Before this change, the fan control state on smu_v11 was not able to be changed because the capability check for checking if the fan control capability existed was inverted. [How] The capability check for fan control in smu_v11_0_auto_fan_control was inverted, to correctly check for the absence, instead of presence of fan control capabilities. Reviewed-by: Evan Quan <evan.quan@amd.com> Signed-off-by: Matt Coffin <mcoffin13@gmail.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2019-08-02Merge tag 'drm-fixes-2019-08-02-1' of git://anongit.freedesktop.org/drm/drmLinus Torvalds
Pull more drm fixes from Daniel Vetter: "Dave sends his pull, everyone realizes they've been asleep at the wheel and hits send on their own pulls :-/ Normally I'd just ignore these all because w/e for me and Dave. But this time around the latecomers also included drm-intel-fixes, which failed to send out a -fixes pull thus far for this release (screwed up vacation coverage, despite that 2/3 maintainers were around ... they all look appropriately guilty), and that really is overdue to get landed. And since I had to do a pull request anyway I pulled the other two late ones too. intel fixes (didn't have any ever since the main merge window pull): - gvt fixes (2 cc: stable) - fix gpu reset vs mm-shrinker vs wakeup fun (needed a few patches) - two gem locking fixes (one cc: stable) - pile of misc fixes all over with minor impact, 6 cc: stable, others from this window exynos: - misc minor fixes misc: - some build/Kconfig fixes - regression fix for vm scalability perf test which seems to mostly exercise dmesg/console logging ... - the vgem cache flush fix for arm64 broke the world on x86, so that's reverted again * tag 'drm-fixes-2019-08-02-1' of git://anongit.freedesktop.org/drm/drm: (42 commits) Revert "drm/vgem: fix cache synchronization on arm/arm64" drm/exynos: fix missing decrement of retry counter drm/exynos: add CONFIG_MMU dependency drm/exynos: remove redundant assignment to pointer 'node' drm/exynos: using dev_get_drvdata directly drm/bochs: Use shadow buffer for bochs framebuffer console drm/fb-helper: Instanciate shadow FB if configured in device's mode_config drm/fb-helper: Map DRM client buffer only when required drm/client: Support unmapping of DRM client buffers drm/i915: Only recover active engines drm/i915: Add a wakeref getter for iff the wakeref is already active drm/i915: Lift intel_engines_resume() to callers drm/vgem: fix cache synchronization on arm/arm64 drm/i810: Use CONFIG_PREEMPTION drm/bridge: tc358764: Fix build error drm/bridge: lvds-encoder: Fix build error while CONFIG_DRM_KMS_HELPER=m drm/i915/gvt: Adding ppgtt to GVT GEM context after shadow pdps settled. drm/i915/gvt: grab runtime pm first for forcewake use drm/i915/gvt: fix incorrect cache entry for guest page mapping drm/i915/gvt: Checking workload's gma earlier ...
2019-08-02Merge tag 'selinux-pr-20190801' of ↵Linus Torvalds
git://git.kernel.org/pub/scm/linux/kernel/git/pcmoore/selinux Pull selinux fix from Paul Moore: "One more small fix for a potential memory leak in an error path" * tag 'selinux-pr-20190801' of git://git.kernel.org/pub/scm/linux/kernel/git/pcmoore/selinux: selinux: fix memory leak in policydb_init()
2019-08-02r8152: fix typo in register nameKevin Lo
It is likely that PAL_BDC_CR should be PLA_BDC_CR. Signed-off-by: Kevin Lo <kevlo@kevlo.org> Acked-by: Hayes Wang <hayeswang@realtek.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2019-08-02net: phy: fix race in genphy_update_linkHeiner Kallweit
In phy_start_aneg() autoneg is started, and immediately after that link and autoneg status are read. As reported in [0] it can happen that at time of this read the PHY has reset the "aneg complete" bit but not yet the "link up" bit, what can result in a false link-up detection. To fix this don't report link as up if we're in aneg mode and PHY doesn't signal "aneg complete". [0] https://marc.info/?t=156413509900003&r=1&w=2 Fixes: 4950c2ba49cc ("net: phy: fix autoneg mismatch case in genphy_read_status") Reported-by: liuyonglong <liuyonglong@huawei.com> Tested-by: liuyonglong <liuyonglong@huawei.com> Signed-off-by: Heiner Kallweit <hkallweit1@gmail.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2019-08-02enetc: Select PHYLIB while CONFIG_FSL_ENETC_VF is setYueHaibing
Like FSL_ENETC, when CONFIG_FSL_ENETC_VF is set, we should select PHYLIB, otherwise building still fails: drivers/net/ethernet/freescale/enetc/enetc.o: In function `enetc_open': enetc.c:(.text+0x2744): undefined reference to `phy_start' enetc.c:(.text+0x282c): undefined reference to `phy_disconnect' drivers/net/ethernet/freescale/enetc/enetc.o: In function `enetc_close': enetc.c:(.text+0x28f8): undefined reference to `phy_stop' enetc.c:(.text+0x2904): undefined reference to `phy_disconnect' drivers/net/ethernet/freescale/enetc/enetc_ethtool.o:(.rodata+0x3f8): undefined reference to `phy_ethtool_get_link_ksettings' drivers/net/ethernet/freescale/enetc/enetc_ethtool.o:(.rodata+0x400): undefined reference to `phy_ethtool_set_link_ksettings' Reported-by: Hulk Robot <hulkci@huawei.com> Fixes: d4fd0404c1c9 ("enetc: Introduce basic PF and VF ENETC ethernet drivers") Signed-off-by: YueHaibing <yuehaibing@huawei.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2019-08-02net/ethernet/qlogic/qed: force the string buffer NULL-terminatedWang Xiayang
strncpy() does not ensure NULL-termination when the input string size equals to the destination buffer size 30. The output string is passed to qed_int_deassertion_aeu_bit() which calls DP_INFO() and relies NULL-termination. Use strlcpy instead. The other conditional branch above strncpy() needs no fix as snprintf() ensures NULL-termination. This issue is identified by a Coccinelle script. Signed-off-by: Wang Xiayang <xywang.sjtu@sjtu.edu.cn> Signed-off-by: David S. Miller <davem@davemloft.net>
2019-08-02atm: iphase: Fix Spectre v1 vulnerabilityGustavo A. R. Silva
board is controlled by user-space, hence leading to a potential exploitation of the Spectre variant 1 vulnerability. This issue was detected with the help of Smatch: drivers/atm/iphase.c:2765 ia_ioctl() warn: potential spectre issue 'ia_dev' [r] (local cap) drivers/atm/iphase.c:2774 ia_ioctl() warn: possible spectre second half. 'iadev' drivers/atm/iphase.c:2782 ia_ioctl() warn: possible spectre second half. 'iadev' drivers/atm/iphase.c:2816 ia_ioctl() warn: possible spectre second half. 'iadev' drivers/atm/iphase.c:2823 ia_ioctl() warn: possible spectre second half. 'iadev' drivers/atm/iphase.c:2830 ia_ioctl() warn: potential spectre issue '_ia_dev' [r] (local cap) drivers/atm/iphase.c:2845 ia_ioctl() warn: possible spectre second half. 'iadev' drivers/atm/iphase.c:2856 ia_ioctl() warn: possible spectre second half. 'iadev' Fix this by sanitizing board before using it to index ia_dev and _ia_dev Notice that given that speculation windows are large, the policy is to kill the speculation on the first load and not worry if it can be completed with a dependent load/store [1]. [1] https://lore.kernel.org/lkml/20180423164740.GY17484@dhcp22.suse.cz/ Signed-off-by: Gustavo A. R. Silva <gustavo@embeddedor.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2019-08-02hv_sock: Fix hang when a connection is closedDexuan Cui
There is a race condition for an established connection that is being closed by the guest: the refcnt is 4 at the end of hvs_release() (Note: here the 'remove_sock' is false): 1 for the initial value; 1 for the sk being in the bound list; 1 for the sk being in the connected list; 1 for the delayed close_work. After hvs_release() finishes, __vsock_release() -> sock_put(sk) *may* decrease the refcnt to 3. Concurrently, hvs_close_connection() runs in another thread: calls vsock_remove_sock() to decrease the refcnt by 2; call sock_put() to decrease the refcnt to 0, and free the sk; next, the "release_sock(sk)" may hang due to use-after-free. In the above, after hvs_release() finishes, if hvs_close_connection() runs faster than "__vsock_release() -> sock_put(sk)", then there is not any issue, because at the beginning of hvs_close_connection(), the refcnt is still 4. The issue can be resolved if an extra reference is taken when the connection is established. Fixes: a9eeb998c28d ("hv_sock: Add support for delayed close") Signed-off-by: Dexuan Cui <decui@microsoft.com> Reviewed-by: Sunil Muthuswamy <sunilmut@microsoft.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2019-08-03mtd: hyperbus: Add hardware dependency to AM654 driverJean Delvare
The hbmc-am654 driver is for the TI AM654, which is an ARM64 SoC, so don't propose this driver on other architectures unless build-testing. Fixes: b07079f1642c ("mtd: hyperbus: Add driver for TI's HyperBus memory controller") Signed-off-by: Jean Delvare <jdelvare@suse.de> Cc: Vignesh Raghavendra <vigneshr@ti.com> Cc: Miquel Raynal <miquel.raynal@bootlin.com> Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
2019-08-03mtd: hyperbus: Kconfig: Fix HBMC_AM654 dependenciesVignesh Raghavendra
On x86_64, when CONFIG_OF is not disabled: WARNING: unmet direct dependencies detected for MUX_MMIO Depends on [n]: MULTIPLEXER [=y] && (OF [=n] || COMPILE_TEST [=n]) Selected by [y]: - HBMC_AM654 [=y] && MTD [=y] && MTD_HYPERBUS [=y] due to config HBMC_AM654 tristate "HyperBus controller driver for AM65x SoC" select MULTIPLEXER select MUX_MMIO Fix this by making HBMC_AM654 imply MUX_MMIO instead of select so that dependencies are taken care of. MUX_MMIO is optional for functioning of driver. Fixes: b07079f1642c ("mtd: hyperbus: Add driver for TI's HyperBus memory controller") Reported-by: Randy Dunlap <rdunlap@infradead.org> Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com> Acked-by: Randy Dunlap <rdunlap@infradead.org> # build-tested Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
2019-08-03mtd: rawnand: micron: handle on-die "ECC-off" devices correctlyMarco Felsch
Some devices are not supposed to support on-die ECC but experience shows that internal ECC machinery can actually be enabled through the "SET FEATURE (EFh)" command, even if a read of the "READ ID Parameter Tables" returns that it is not. Currently, the driver checks the "READ ID Parameter" field directly after having enabled the feature. If the check fails it returns immediately but leaves the ECC on. When using buggy chips like MT29F2G08ABAGA and MT29F2G08ABBGA, all future read/program cycles will go through the on-die ECC, confusing the host controller which is supposed to be the one handling correction. To address this in a common way we need to turn off the on-die ECC directly after reading the "READ ID Parameter" and before checking the "ECC status". Cc: stable@vger.kernel.org Fixes: dbc44edbf833 ("mtd: rawnand: micron: Fix on-die ECC detection logic") Signed-off-by: Marco Felsch <m.felsch@pengutronix.de> Reviewed-by: Boris Brezillon <boris.brezillon@collabora.com> Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
2019-08-03ARM: dts: rockchip: Add pin names for rk3288-veyron fievelMatthias Kaehlcke
This is like commit 0ca87bd5baa6 ("ARM: dts: rockchip: Add pin names for rk3288-veyron-jerry") and other similar commits, but for the veyron fievel board (and tiger, which includes the fievel .dtsi). Signed-off-by: Matthias Kaehlcke <mka@chromium.org> Signed-off-by: Heiko Stuebner <heiko@sntech.de>
2019-08-03ARM: dts: rockchip: A few fixes for veyron-{fievel,tiger}Matthias Kaehlcke
Fix/improve a few things for veyron fievel/tiger: - move 'vccsys' regulator from tiger to fievel, both boards have it (and tiger includes the fievel .dtsi) - move 'ext_gmac' node below regulators - fix GPIO ids of vcc5_host1 and vcc5_host2 regulators - remove reset configuration from 'gmac' node, this is already done in rk3288.dtsi - fixed style issues of some multi-line comments - switch 'vcc18_lcdt', 'vdd10_lcd' and 'vcc33_ccd' regulators off during suspend - no pull-up on the Bluetooth wake-up pin, there is an external pull-up. The signal is active low, add the 'bt_host_wake_l' pinctrl config - move BC 1.2 pins up in the pinctrl config to keep 'wake only' pins separate - add BC 1.2 pins to sleep config Fixes: 0067692b662e ("ARM: dts: rockchip: add veyron-fievel board") Reviewed-by: Douglas Anderson <dianders@chromium.org> Signed-off-by: Matthias Kaehlcke <mka@chromium.org> Signed-off-by: Heiko Stuebner <heiko@sntech.de>
2019-08-02Merge tag 'for-linus-5.3a-rc3-tag' of ↵Linus Torvalds
git://git.kernel.org/pub/scm/linux/kernel/git/xen/tip Pull xen fixes from Juergen Gross: - a small cleanup - a fix for a build error on ARM with some configs - a fix of a patch for the Xen gntdev driver - three patches for fixing a potential problem in the swiotlb-xen driver which Konrad was fine with me carrying them through the Xen tree * tag 'for-linus-5.3a-rc3-tag' of git://git.kernel.org/pub/scm/linux/kernel/git/xen/tip: xen/swiotlb: remember having called xen_create_contiguous_region() xen/swiotlb: simplify range_straddles_page_boundary() xen/swiotlb: fix condition for calling xen_destroy_contiguous_region() xen: avoid link error on ARM xen/gntdev.c: Replace vm_map_pages() with vm_map_pages_zero() xen/pciback: remove set but not used variable 'old_state'
2019-08-02Merge tag 'arm64-fixes' of ↵Linus Torvalds
git://git.kernel.org/pub/scm/linux/kernel/git/arm64/linux Pull arm64 fixes from Catalin Marinas: - Update the compat layer to allow single-byte watchpoints on all addresses (similar to the native support) - arm_pmu: fix the restoration of the counters on the CPU_PM_ENTER_FAILED path - Fix build regression with vDSO and Makefile not stripping CROSS_COMPILE_COMPAT - Fix the CTR_EL0 (cache type register) sanitisation on heterogeneous machines (e.g. big.LITTLE) - Fix the interrupt controller priority mask value when pseudo-NMIs are enabled - arm64 kprobes fixes: recovering of the PSTATE.D flag in the single-step exception handler, NOKPROBE annotations for unwind_frame() and walk_stackframe(), remove unneeded rcu_read_lock/unlock from debug handlers - Several gcc fall-through warnings - Unused variable warnings * tag 'arm64-fixes' of git://git.kernel.org/pub/scm/linux/kernel/git/arm64/linux: arm64: Make debug exception handlers visible from RCU arm64: kprobes: Recover pstate.D in single-step exception handler arm64/mm: fix variable 'tag' set but not used arm64/mm: fix variable 'pud' set but not used arm64: Remove unneeded rcu_read_lock from debug handlers arm64: unwind: Prohibit probing on return_address() arm64: Lower priority mask for GIC_PRIO_IRQON arm64/efi: fix variable 'si' set but not used arm64: cpufeature: Fix feature comparison for CTR_EL0.{CWG,ERG} arm64: vdso: Fix Makefile regression arm64: module: Mark expected switch fall-through arm64: smp: Mark expected switch fall-through arm64: hw_breakpoint: Fix warnings about implicit fallthrough drivers/perf: arm_pmu: Fix failure path in PM notifier arm64: compat: Allow single-byte watchpoints on all addresses