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2021-02-09net: hns3: add a check for index in hclge_get_rss_key()Yufeng Mo
The index is received from vf, if use it directly, an out-of-bound issue may be caused, so add a check for this index before using it in hclge_get_rss_key(). Fixes: a638b1d8cc87 ("net: hns3: fix get VF RSS issue") Signed-off-by: Yufeng Mo <moyufeng@huawei.com> Signed-off-by: Huazhong Tan <tanhuazhong@huawei.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2021-02-09net: hns3: add a check for tqp_index in hclge_get_ring_chain_from_mbx()Yufeng Mo
The tqp_index is received from vf, if use it directly, an out-of-bound issue may be caused, so add a check for this tqp_index before using it in hclge_get_ring_chain_from_mbx(). Fixes: 84e095d64ed9 ("net: hns3: Change PF to add ring-vect binding & resetQ to mailbox") Signed-off-by: Yufeng Mo <moyufeng@huawei.com> Signed-off-by: Huazhong Tan <tanhuazhong@huawei.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2021-02-09net: hns3: add a check for queue_id in hclge_reset_vf_queue()Yufeng Mo
The queue_id is received from vf, if use it directly, an out-of-bound issue may be caused, so add a check for this queue_id before using it in hclge_reset_vf_queue(). Fixes: 1a426f8b40fc ("net: hns3: fix the VF queue reset flow error") Signed-off-by: Yufeng Mo <moyufeng@huawei.com> Signed-off-by: Huazhong Tan <tanhuazhong@huawei.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2021-02-10Merge tag 'imx-drivers-5.12' of ↵Arnd Bergmann
git://git.kernel.org/pub/scm/linux/kernel/git/shawnguo/linux into arm/drivers i.MX drivers change for 5.12: - Change soc-imx8m to use platform driver, so that defer probe can be used to resolve dependency on OCOTP clock. * tag 'imx-drivers-5.12' of git://git.kernel.org/pub/scm/linux/kernel/git/shawnguo/linux: soc: imx8m: change to use platform driver Link: https://lore.kernel.org/r/20210204120150.26186-1-shawnguo@kernel.org Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2021-02-10Merge tag 'qcom-drivers-for-5.12' of ↵Arnd Bergmann
git://git.kernel.org/pub/scm/linux/kernel/git/qcom/linux into arm/drivers Qualcomm driver updates for 5.12 The socinfo driver gains support for dumping information about the platform's PMICs, as well as new definitions for a number of platforms. The LLCC driver gains SM8250 support, AOSS QMP gains SM8350 support and the RPMPD driver gains support for MSM8994 power domains. In addition to this it contains a few minor fixes in the ocmem, rpmh and llcc drivers. * tag 'qcom-drivers-for-5.12' of git://git.kernel.org/pub/scm/linux/kernel/git/qcom/linux: soc: qcom: ocmem: don't return NULL in of_get_ocmem soc: qcom: socinfo: Remove unwanted le32_to_cpu() soc: qcom: aoss: Add SM8350 compatible drivers: soc: qcom: rpmpd: Add msm8994 RPM Power Domains soc: qcom: socinfo: Fix an off by one in qcom_show_pmic_model() soc: qcom: socinfo: Fix off-by-one array index bounds check soc: qcom: socinfo: Add MDM9607 IDs soc: qcom: socinfo: Add SoC IDs for APQ/MSM8998 soc: qcom: socinfo: Add SoC IDs for 630 family soc: qcom: socinfo: Open read access to all for debugfs soc: qcom: socinfo: add info from PMIC models array soc: qcom: socinfo: add several PMIC IDs soc: qcom: socinfo: add qrb5165 SoC ID soc: qcom: rpmh: Remove serialization of TCS commands soc: qcom: smem: use %*ph to print small buffer dt-bindings: soc: qcom: convert qcom,smem bindings to yaml drivers: qcom: rpmh-rsc: Do not read back the register write on trigger soc: qcom: llcc-qcom: Add support for SM8250 SoC soc: qcom: llcc-qcom: Extract major hardware version dt-bindings: msm: Add LLCC for SM8250 Link: https://lore.kernel.org/r/20210204052258.388890-1-bjorn.andersson@linaro.org Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2021-02-10Merge tag 'zynqmp-soc-for-v5.12' of https://github.com/Xilinx/linux-xlnx ↵Arnd Bergmann
into arm/defconfig arm64: soc: ZynqMP SoC changes for v5.12 - Enable clock driver for ZynqMP in defconfig * tag 'zynqmp-soc-for-v5.12' of https://github.com/Xilinx/linux-xlnx: arm64: defconfig: enable clock driver for ZynqMP platforms Link: https://lore.kernel.org/r/2b0f6314-13ba-375a-9231-925b0a07be82@monstr.eu Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2021-02-10Merge tag 'imx-soc-5.12' of ↵Arnd Bergmann
git://git.kernel.org/pub/scm/linux/kernel/git/shawnguo/linux into arm/soc i.MX SoC update for 5.12: - Drop unused IMX_GPIO_NR() macro. - Remove KSZ8081 PHY fixup from i.MX6UL machine code, because it only applies for KSZ8081RNA with 50MHz clock source, but breaks other KSZ8081 PHY configurations. - Add a print of CPU type and SOC revision for i.MX6UL during boot. * tag 'imx-soc-5.12' of git://git.kernel.org/pub/scm/linux/kernel/git/shawnguo/linux: ARM: imx: Remove unused IMX_GPIO_NR() macro ARM: mach-imx: imx6ul: Print SOC revision on boot ARM: imx: mach-imx6ul: remove 14x14 EVK specific PHY fixup Link: https://lore.kernel.org/r/20210204120150.26186-2-shawnguo@kernel.org Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2021-02-10MAINTAINERS: Add linux-actions ML for Actions Semi ArchCristian Ciocaltea
Add the linux-actions mailing list for the Actions Semi architecture. Signed-off-by: Cristian Ciocaltea <cristian.ciocaltea@gmail.com> Signed-off-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org> Reviewed-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org> Link: https://lore.kernel.org/r/20210205050722.8313-1-manivannan.sadhasivam@linaro.org' Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2021-02-09Merge tag 'socfpga_dts_fix_for_v5.12' of ↵Arnd Bergmann
git://git.kernel.org/pub/scm/linux/kernel/git/dinguyen/linux into arm/fixes SoCFPGA Agilex fix for v5.12 - Fix PHY interface register offset for GMACs * tag 'socfpga_dts_fix_for_v5.12' of git://git.kernel.org/pub/scm/linux/kernel/git/dinguyen/linux: arm64: dts: agilex: fix phy interface bit shift for gmac1 and gmac2 Link: https://lore.kernel.org/r/20210208203703.36109-1-dinguyen@kernel.org Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2021-02-09Merge tag 'v5.12-rockchip-dts64-1' of ↵Arnd Bergmann
git://git.kernel.org/pub/scm/linux/kernel/git/mmind/linux-rockchip into arm/dt New boards: Radxa Rock Pi E, NanoPi M4B More fixed indices for mmc nodes; removal of obsolete amba bus nodes; nand-flash-controller nodes for px30 and rk3308; rk3399 pcie ranges fix; board-level fixes for Helios64, NanoPi and Rock960; more sound support for rock64 and rockpro64 and cleanups to make dt-bindings happier. * tag 'v5.12-rockchip-dts64-1' of git://git.kernel.org/pub/scm/linux/kernel/git/mmind/linux-rockchip: (24 commits) arm64: dts: rockchip: more user friendly name of sound nodes arm64: dts: rockchip: rename pinctrl nodename to gmac2io for nanopi-r2s board arm64: dts: rockchip: assign a fixed index to mmc devices on rk3368 boards arm64: dts: rockchip: assign a fixed index to mmc devices on rk3308 boards arm64: dts: rockchip: assign a fixed index to mmc devices on px30 boards arm64: dts: rockchip: cleanup cpu_thermal node of rk3399-rock960.dts arm64: dts: rockchip: Remove bogus "amba" bus nodes arm64: dts: rockchip: Light "sys" LED on NanoPi R2S arm64: dts: rockchip: fix ranges property format for rk3399 pcie node arm64: dts: rockchip: Rely on SoC external pull up on pmic-int-l on Helios64 arm64: dts: rockchip: Add NanoPi M4B board arm64: dts: rockchip: Move ep-gpios property to nanopc-t4 from nanopi4 arm64: dts: rockchip: Add NFC node for PX30 SoC arm64: dts: rockchip: Add NFC node for RK3308 SoC arm64: dts: rockchip: rk3328: Add Radxa ROCK Pi E dt-bindings: arm: rockchip: Add Radxa ROCK Pi E arm64: dts: rockchip: rk3328: Add clock_in_out property to gmac2phy node arm64: dts: rockchip: rename thermal subnodes for rk3399 arm64: dts: rockchip: rename thermal subnodes for rk3368 arm64: dts: rockchip: add SPDIF node for rk3399-rockpro64 ... Link: https://lore.kernel.org/r/12699743.uLZWGnKmhe@phil Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2021-02-09Merge tag 'v5.12-rockchip-dts32-1' of ↵Arnd Bergmann
git://git.kernel.org/pub/scm/linux/kernel/git/mmind/linux-rockchip into arm/dt Fixed indices for mmc nodes; removal of obsolete amba bus nodes; addition of nand flash controller odes to rk3036, rk2928, rv1108; gpu node for rk3288-miqi and some cleanups to make dtbscheck happier. * tag 'v5.12-rockchip-dts32-1' of git://git.kernel.org/pub/scm/linux/kernel/git/mmind/linux-rockchip: ARM: dts: rockchip: assign a fixed index to mmc devices on rv1108 boards ARM: dts: rockchip: assign a fixed index to mmc devices on rk322x boards ARM: dts: rockchip: Remove bogus "amba" bus nodes ARM: dts: rockchip: Add NFC node for RK3036 SoC ARM: dts: rockchip: Add NFC node for RK2928 and other SoCs ARM: dts: rockchip: Add NFC node for RV1108 SoC ARM: dts: rockchip: rename thermal subnodes for rk3288 ARM: dts: rockchip: add QoS register compatibles for rk3288 ARM: dts: rockchip: add QoS register compatibles for rk3066/rk3188 ARM: dts: rockchip: add gpu node to rk3288-miqi Link: https://lore.kernel.org/r/2184150.ElGaqSPkdT@phil Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2021-02-09drm/radeon: Simplify bool comparisonJiapeng Chong
Fix the following coccicheck warning: ./drivers/gpu/drm/radeon/rs690.c:190:6-35: WARNING: Comparison to bool. Reported-by: Abaci Robot <abaci@linux.alibaba.com> Signed-off-by: Jiapeng Chong <jiapeng.chong@linux.alibaba.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2021-02-09drm/amd/display: Simplify bool comparisonJiapeng Chong
Fix the following coccicheck warning: ./drivers/gpu/drm/amd/display/dc/inc/hw/clk_mgr_internal.h:319:11-23: WARNING: Comparison to bool. Reported-by: Abaci Robot <abaci@linux.alibaba.com> Signed-off-by: Jiapeng Chong <jiapeng.chong@linux.alibaba.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2021-02-09Revert "drm/amd/display: Update NV1x SR latency values"Alex Deucher
This reverts commit 4a3dea8932d3b1199680d2056dd91d31d94d70b7. This causes blank screens for some users. Bug: https://gitlab.freedesktop.org/drm/amd/-/issues/1388 Cc: Alvin Lee <alvin.lee2@amd.com> Cc: Jun Lei <Jun.Lei@amd.com> Cc: Rodrigo Siqueira <Rodrigo.Siqueira@amd.com> Reviewed-by: Rodrigo Siqueira <Rodrigo.Siqueira@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com> Cc: stable@vger.kernel.org
2021-02-09drm/amdgpu: fix unnecessary NULL check warningsTian Tao
Remove NULL checks before vfree() to fix these warnings: drivers/gpu/drm/amd/amdgpu/amdgpu_cs.c:102:2-8: WARNING: NULL check before some freeing functions is not needed. Signed-off-by: Tian Tao <tiantao6@hisilicon.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2021-02-09drm/amd/pm: make the error log more clear for fine grain tuning functionXiaojian Du
This patch is to make the error log more clear for fine grain tuning function, it covers Raven/Raven2/Picasso/Renoir/Vangogh. The fine grain tuning function uses the sysfs file -- pp_od_clk_voltage, but only when another sysfs file -- power_dpm_force_performance_level is switched to "manual" mode, it is allowed to access "pp_od_clk_voltage". Signed-off-by: Xiaojian Du <Xiaojian.Du@amd.com> Acked-by: Huang Rui <ray.huang@amd.com> Acked-by: Kevin Wang <kevin1.wang@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2021-02-09drm/amdgpu: extend MAX_KIQ_REG_TRY to 1000Jiawei Gu
Extend retry times of KIQ to avoid starvation situation caused by long time full access of GPU by other VFs. Signed-off-by: Jiawei Gu <Jiawei.Gu@amd.com> Reviewed-by: Emily.Deng <Emily.Deng@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2021-02-09drm/amd/display: 3.2.122Aric Cyr
This version brings along following fixes: - Fix error handling in dc/dcn10/dcn10_hw_sequencer_debug.c - DIO Supported for virtual displays - memset dmub_rb_cmd to 0 which fixes issues talking with firmware - fix 64bit division issue on 32bit OS - move edp sink present detection to hw init to fix hang - reverts a patch that caused 3x4K60 displays over MST with DSC enabled to not light up Signed-off-by: Aric Cyr <aric.cyr@amd.com> Acked-by: Anson Jacob <Anson.Jacob@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2021-02-09drm/amd/display: [FW Promotion] Release 0.0.51Anthony Koo
Add new definition and union for dmub_rb_cmd_dig1_transmitter_control Signed-off-by: Anthony Koo <Anthony.Koo@amd.com> Acked-by: Anson Jacob <Anson.Jacob@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2021-02-09drm/amd/display: fix type mismatch error for return variableDale Zhao
It is possible for ret_vsnprintf to be assigned negative value in error cases. As an unsigned variable, negative values which are stored in their 2's complement form gets treated as a positive number. This will led to treating bad cases as good ones. eg: -1 gets stored as 0xFFFFFFFF on a 32 bit system Signed-off-by: Dale Zhao <dale.zhao@amd.com> Reviewed-by: Yongqiang Sun <yongqiang.sun@amd.com> Acked-by: Anson Jacob <Anson.Jacob@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2021-02-09drm/amd/display: DIO Supported for virtual displaysWesley Chalmers
[WHY] Virtual displays do not use the backend of the pipe, and so have infinite backend bandwidth. [HOW] Add a skip_dio_check bool to the VBA struct, which is used to override the DIOSupport calculations. Signed-off-by: Wesley Chalmers <Wesley.Chalmers@amd.com> Reviewed-by: Jun Lei <Jun.Lei@amd.com> Acked-by: Anson Jacob <Anson.Jacob@amd.com> Acked-by: Chris Park <Chris.Park@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2021-02-09drm/amd/display: Initialize dmub_rb_cmd unions to 0Wyatt Wood
[Why] Since dmub_rb_cmds are not initialized to 0, the header is filled with invalid data. This is causing issues on the fw side. [How] Initialize dmub_rb_cmd unions to 0. Signed-off-by: Wyatt Wood <wyatt.wood@amd.com> Reviewed-by: Josip Pavic <Josip.Pavic@amd.com> Acked-by: Anson Jacob <Anson.Jacob@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2021-02-09drm/amd/display: fix 64bit division issue on 32bit OSLang Yu
Replace "/" with div_u64 for 64bit division on 32bit OS. Signed-off-by: Lang Yu <Lang.Yu@amd.com> Reviewed-by: Nicholas Kazlauskas <Nicholas.Kazlauskas@amd.com> Acked-by: Anson Jacob <Anson.Jacob@amd.com> Acked-by: Huang Rui <ray.huang@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2021-02-09drm/amd/display: move edp sink present detection to hw initEric Yang
[Why] At SW init, we may not be ready to do detect eDP sink. Signed-off-by: Eric Yang <Eric.Yang2@amd.com> Reviewed-by: Jun Lei <Jun.Lei@amd.com> Acked-by: Anson Jacob <Anson.Jacob@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2021-02-09drm/amd/display: revert support for DID2.0 dsc passthroughJun Lei
3x4K60 displays over MST with DSC enabled was not able to light up due to this patch. Signed-off-by: Jun Lei <jun.lei@amd.com> Reviewed-by: Anthony Koo <Anthony.Koo@amd.com> Acked-by: Anson Jacob <Anson.Jacob@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2021-02-09drm/amd/display: DP HDCP Compliance 1A-08/09 tests failQingqing Zhuo
[Why] Current implementation of mod_hdcp_hdcp2_validate_ake_cert() does not process HDCP status message TA_HDCP2_MSG_AUTHENTICATION_STATUS__SIGNATURE_CERTIFICAT_ERROR. As a result, when there is a signature certificate error, mod_hdcp_hdcp2_validate_ake_cert would return the default status, which is success. [How] For all messages other than TA_HDCP2_MSG_AUTHENTICATION_STATUS__SUCCESS and TA_HDCP2_MSG_AUTHENTICATION_STATUS__RECEIVERID_REVOKED, return status as failure. Signed-off-by: Qingqing Zhuo <qingqing.zhuo@amd.com> Reviewed-by: Bhawanpreet Lakha <Bhawanpreet.Lakha@amd.com> Acked-by: Anson Jacob <Anson.Jacob@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2021-02-09drm/amd/display: Add DIG_CLOCK_PATTERN in the transmitter controlDerek Lai
[Why and How] VBIOS program DIG_CLK_PATTERN using engine ID instead of PHY ID. Workaround by writing value for 0x1f (for HDMI) after calling vbios. Signed-off-by: Derek Lai <Derek.Lai@amd.com> Reviewed-by: Tony Cheng <Tony.Cheng@amd.com> Acked-by: Anson Jacob <Anson.Jacob@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2021-02-09drm/amd/display: Add return code instead of boolean for future useFangzhi Zuo
Signed-off-by: Fangzhi Zuo <Jerry.Zuo@amd.com> Reviewed-by: Mikita Lipski <Mikita.Lipski@amd.com> Acked-by: Anson Jacob <Anson.Jacob@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2021-02-09drm/amdgpu: enable gpu recovery for dimgrey_cavefishTao Zhou
As dimgrey_cavefish driver is stable enough, set gpu recovery as default in HW hang for dimgrey_cavefish. Signed-off-by: Tao Zhou <tao.zhou1@amd.com> Reviewed-by: Jiansong Chen <Jiansong.Chen@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2021-02-09drm/amd/pm: enable LCLK DSKenneth Feng
Enable LCLK deep sleep and it works if we enable ASPM: modprobe amdgpu aspm=1 Signed-off-by: Kenneth Feng <kenneth.feng@amd.com> Reviewed-by: Evan Quan <evan.quan@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2021-02-09drm/amdgpu: reset runpm flag if device suspend failsAlex Deucher
If device suspend fails when we attempt to runtime suspend, reset the runpm flag. Acked-by: Evan Quan <evan.quan@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2021-02-09drm/amdgpu: use runpm flag rather than fbcon for kfd runtime suspend (v2)Alex Deucher
the flag used by kfd is not actually related to fbcon, it just happens to align. Use the runpm flag instead so that we can decouple it from the fbcon flag. v2: fix resume as well Reviewed-by: Felix Kuehling <Felix.Kuehling@amd.com> Reviewed-by: Rajneesh Bhardwaj <rajneesh.bhardwaj@amd.com> Acked-by: Evan Quan <evan.quan@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2021-02-09drm/amdgpu: drop extra drm_kms_helper_poll_enable/disable callsAlex Deucher
These are already called in amdgpu_device_suspend/resume which are already called in the same functions. Acked-by: Evan Quan <evan.quan@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2021-02-09drm/amdgpu/nv: add PCI reset supportAlex Deucher
Use generic PCI reset for GPU reset if the user specifies PCI reset as the reset mechanism. This should in general only be used for validation. Acked-by: Evan Quan <evan.quan@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2021-02-09drm/amdgpu/soc15: add PCI reset supportAlex Deucher
Use generic PCI reset for GPU reset if the user specifies PCI reset as the reset mechanism. This should in general only be used for validation. Acked-by: Evan Quan <evan.quan@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2021-02-09drm/amdgpu/si: add PCI reset supportAlex Deucher
Use generic PCI reset for GPU reset if the user specifies PCI reset as the reset mechanism. This should in general only be used for validation. Acked-by: Evan Quan <evan.quan@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2021-02-09drm/amdgpu: add generic pci reset as an optionAlex Deucher
This allows us to use generic PCI reset mechanisms (FLR, SBR) as a reset mechanism to verify that the generic PCI reset mechanisms are working properly. Acked-by: Evan Quan <evan.quan@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2021-02-09drm/amdgpu/vi: minor clean up of reset codeAlex Deucher
Drop duplicate reset method logging, whitespace changes. Acked-by: Evan Quan <evan.quan@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2021-02-09drm/amdgpu/cik: minor clean up of reset codeAlex Deucher
Drop duplicate reset method logging, whitespace changes. Acked-by: Evan Quan <evan.quan@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2021-02-09drm/amdgpu/si: minor clean up of reset codeAlex Deucher
Drop duplicate reset method logging, whitespace changes. Acked-by: Evan Quan <evan.quan@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2021-02-09drm/amd/pm: add support for hwmon control of slow and fast PPT limit on vangoghXiaomeng Hou
Implement hwmon API for reading/setting slow and fast PPT limit. APU power is managed to system-level requirements through the PPT (package power tracking) feature. PPT is intended to limit power to the requirements of the power source and could be dynamically updated to maximize APU performance within the system power budget. Here FAST_PPT_LIMIT manages the ~10 ms moving average of APU power, while SLOW_PPT_LIMIT manages the configurable, thermally significant moving average of APU power (default ~5000 ms). User could read slow/fast ppt limit using command "cat power*_cap" or "sensors" in the hwmon device directory. User could adjust values of slow/fast ppt limit as needed depending on workloads through command "echo ## > power*_cap". Example: $ echo 15000000 > power1_cap $ echo 18000000 > power2_cap $ sensors amdgpu-pci-0300 Adapter: PCI adapter slowPPT: 9.04W (cap = 15.00 W) fastPPT: 9.04W (cap = 18.00 W) v2: align with existing interfaces for the getting/setting of PPT limits. Encode the upper 8 bits of limit value to distinguish slow and fast power limit type. Signed-off-by: Xiaomeng Hou <Xiaomeng.Hou@amd.com> Reviewed-by: Lijo Lazar <lijo.lazar@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2021-02-09drm/amd/pm: modify the power limit level parameter from bool to enum typeXiaomeng Hou
The original smu_get_power_limit callback accepts the power limit level parameter as bool which limits to max and current. For possible needs to retrieve other level like min, extend the parameter type using enum. Signed-off-by: Xiaomeng Hou <Xiaomeng.Hou@amd.com> Reviewed-by: Lijo Lazar <lijo.lazar@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2021-02-09drm/amd/pm: update the smu v11.5 smc header for vangoghXiaomeng Hou
Add PP messages for reading/setting Fast PPT and Slow PPT limit. Signed-off-by: Xiaomeng Hou <Xiaomeng.Hou@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2021-02-09drm/amdgpu: enable wave limit on non high prio cs pipesNirmoy Das
To achieve the best QoS for high priority compute jobs it is required to limit waves on other compute pipes as well. This patch will set min value in non high priority mmSPI_WCL_PIPE_PERCENT_CS[0-3] registers to minimize the impact of normal/low priority compute jobs over high priority compute jobs. Signed-off-by: Nirmoy Das <nirmoy.das@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2021-02-09drm/amd/display: Add otg vertical interrupt0 support in DCN1.0Wayne Lin
[Why & How] On DCN1.0, need otg vertical line interrupt to get appropriate timing to achieve specific feature request. Add otg vertical interrupt0 support for registers which operation is vertical sensitive. Signed-off-by: Wayne Lin <Wayne.Lin@amd.com> Acked-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2021-02-09drm/amdgpu: Add otg vertical IRQ SourceWayne Lin
[Why & How] In order to get appropriate timing for registers which read/write is vertical line sensitive, add new IRQ source variable. This interrupt is triggered by specific vertical line, Signed-off-by: Wayne Lin <Wayne.Lin@amd.com> Acked-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2021-02-09drm/amdgpu: optimize list operation in amdgpu_xgmiKevin Wang
simplify the list operation. Signed-off-by: Kevin Wang <kevin1.wang@amd.com> Reviewed-by: Felix Kuehling <Felix.Kuehling@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2021-02-09drm/amd/pm/swsmu: unify the init soft gpu metrics functionKevin Wang
the soft gpu metrics is not asic related data structure. unify them to reduce duplicate code. Signed-off-by: Kevin Wang <kevin1.wang@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2021-02-09drm/amdgpu: support rom clockgating related function for NV familyLikun Gao
Add functions to support enable/disable rom clock gating and get rom clock gating status. Signed-off-by: Likun Gao <Likun.Gao@amd.com> Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2021-02-09drm/amdgpu: switch to use smuio callbacks for NV familyLikun Gao
Switch to smuio callbacks: use smuio v11_0_6 callbacks for Sienna_cichlid and forward ASIC, use smuio v11_0 callbacks for the other NV family ASIC. Signed-off-by: Likun Gao <Likun.Gao@amd.com> Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
generated by cgit (git 2.34.1) at 2025-09-16 12:48:37 +0000