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2023-03-27arm64: dts: colibri-imx8x: Add SPIPhilippe Schenker
Add Colibri SPI to the board. lpspi2 is being exposed on the SoM edge. Add settings to the module-level but finally enable it on the eval-board dtsi. Signed-off-by: Philippe Schenker <philippe.schenker@toradex.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2023-03-27arm64: dts: colibri-imx8x: Add pinctrl group for hdmi hpdPhilippe Schenker
The colibri imx8x contains a dedicated gpio meant for HDMI hot-plug-detect. Add a pinctrl group to make this usable. Signed-off-by: Philippe Schenker <philippe.schenker@toradex.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2023-03-27arm64: dts: colibri-imx8x: Add separate pinctrl group for cs2Philippe Schenker
Add a separate pinctrl group for chip-select 2 for Colibri SPI. That way one is able to use it separately. Signed-off-by: Philippe Schenker <philippe.schenker@toradex.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2023-03-27arm64: dts: colibri-imx8x: Correct pull on lcdifPhilippe Schenker
The pads USDHC1_RESET_B and MCLK_IN1 need a pull-down instead of pull-disabled. Correct this. Signed-off-by: Philippe Schenker <philippe.schenker@toradex.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2023-03-27arm64: dts: colibri-imx8x: Split pinctrl_hog1Philippe Schenker
Split pinctrl_hog1 into a second group so CSI_MCLK can be muxed to a gpio on its own. Signed-off-by: Philippe Schenker <philippe.schenker@toradex.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2023-03-27arm64: dts: colibri-imx8x: Add pinctrl group for csi_mclkPhilippe Schenker
Add missing pinctrl groups that can be used to enable the correct muxing if csi_mclk is needed on SODIMM 75. Signed-off-by: Philippe Schenker <philippe.schenker@toradex.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2023-03-27arm64: dts: colibri-imx8x: Add atmel pinctrl groupsPhilippe Schenker
Add pinctrl groups for enabling atmel touchscreen support. Remove the pads out of pinctrl_hog0 as they now can be enabled more specific using pinctrl_atmel_conn label. Signed-off-by: Philippe Schenker <philippe.schenker@toradex.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2023-03-27arm64: dts: colibri-imx8x: Use new bracket formatPhilippe Schenker
Use the new bracket format as described by Rob since this seems the format that we're heading in the future. https://lore.kernel.org/all/CAL_JsqKqQdRZC08-BGJqTjzJZ8aWA41LHMbv0QyyVePVm0co7A@mail.gmail.com/ Signed-off-by: Philippe Schenker <philippe.schenker@toradex.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2023-03-27arm64: dts: colibri-imx8x: Update spdx licensePhilippe Schenker
GPL-2.0+ is deprecated, update it to GPL-2.0-or-later. Signed-off-by: Philippe Schenker <philippe.schenker@toradex.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2023-03-27arm64: dts: colibri-imx8x: Prepare for qxp and dx variantsPhilippe Schenker
Toradex sells the Colibri iMX8X module in variants with the i.MX 8QXP and i.MX8DX SoC. Prepare for this by moving majority of stuff from imx8qxp-colibri.dtsi into imx8x-colibri.dtsi. Remove DX from the model string. This commit intends no functional change. Signed-off-by: Philippe Schenker <philippe.schenker@toradex.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2023-03-27dt-bindings: arm: fsl: Add colibri-imx8x carrier boardsPhilippe Schenker
Prepare the dt-bindings for the new colibri-imx8x carrier-boards Aster and Iris. The Toradex SoM standard is called Colibri, fix the typo. Signed-off-by: Philippe Schenker <philippe.schenker@toradex.com> Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2023-03-27arm64: dts: imx8mq-librem5: Add 166MHz to DDRC OPP tableSebastian Krzyszkowiak
This is the lowest frequency supported by older iMX8MQ SoC revisions. Signed-off-by: Sebastian Krzyszkowiak <sebastian.krzyszkowiak@puri.sm> Signed-off-by: Martin Kepplinger <martin.kepplinger@puri.sm> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2023-03-27arm64: dts: imx8mq-librem5: Reduce I2C frequency to 384kHzSebastian Krzyszkowiak
According to imx8mq errata (ERR007805): > To meet the clock low period requirement in fast speed mode, > SCL must be configured to 384KHz or less. Note that the imx i2c driver already implements this erratum and works around it. This is only for the description to reflect reality. Signed-off-by: Sebastian Krzyszkowiak <sebastian.krzyszkowiak@puri.sm> Signed-off-by: Martin Kepplinger <martin.kepplinger@puri.sm> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2023-03-27arm64: dts: imx8mq-librem5: Bump BUCK1 suspend voltage to 0.81VSebastian Krzyszkowiak
0.8V is outside of the operating voltage specified for imx8mq, see chapter 3.1.4 "Operating ranges" of the IMX8MDQLQCEC document. Signed-off-by: Sebastian Krzyszkowiak <sebastian.krzyszkowiak@puri.sm> Signed-off-by: Martin Kepplinger <martin.kepplinger@puri.sm> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2023-03-27arm64: dts: imx8mq-librem5: Remove dis_u3_susphy_quirk from usb_dwc3_0Sebastian Krzyszkowiak
This reduces power consumption in system suspend by about 10%. Signed-off-by: Sebastian Krzyszkowiak <sebastian.krzyszkowiak@puri.sm> Signed-off-by: Martin Kepplinger <martin.kepplinger@puri.sm> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2023-03-27arm64: dts: imx8mq-librem5: Adjust proximity sensor's near levelsSebastian Krzyszkowiak
Based on tests with my left ear (which appears to require lower levels than the right one), one Birch, one Dogwood and three Evergreens. It seems that the sensor reacts very weakly to hair, so let's make the thresholds rather generous to compensate. Signed-off-by: Sebastian Krzyszkowiak <sebastian.krzyszkowiak@puri.sm> Signed-off-by: Martin Kepplinger <martin.kepplinger@puri.sm> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2023-03-27arm64: dts: imx8mq-librem5: Bump usdhc2 frequency to 100MHzSebastian Krzyszkowiak
RS9116 card already limits itself to 50MHz by being a high-speed card, while AP6275S can work at 100MHz just fine (technically it should work at 200MHz as well since it's a SDR104 card, but it doesn't appear to be the case in practice and further research will be needed to find out why). Signed-off-by: Sebastian Krzyszkowiak <sebastian.krzyszkowiak@puri.sm> Signed-off-by: Martin Kepplinger <martin.kepplinger@puri.sm> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2023-03-27arm64: dts: imx8mq-librem5: add the magnetometer mount matrixAngus Ainslie
Userland needs the mount matrix to know the correct orientation of the part. Signed-off-by: Angus Ainslie <angus@akkea.ca> Signed-off-by: Martin Kepplinger <martin.kepplinger@puri.sm> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2023-03-27arm64: dts: imx8mq-librem5: Set the DVS voltages lowerSebastian Krzyszkowiak
They're still in the operating range according to i.MX 8M Quad datasheet. There's some headroom added over minimal values to account for voltage drop. Operational ranges (min - typ - max [selected]): - VDD_SOC (BUCK1): 0.81 - 0.9 - 0.99 [0.88] - VDD_ARM (BUCK2): 0.81 - 0.9 - 1.05 [0.84] (1000MHz) 0.90 - 1.0 - 1.05 [0.93] (1500MHz) - VDD_GPU (BUCK3): 0.81 - 0.9 - 1.05 [0.85] (800MHz) 0.90 - 1.0 - 1.05 [ -- ] (1000MHz) - VDD_VPU (BUCK4): 0.81 - 0.9 - 1.05 [ -- ] (550/500/588MHz) 0.90 - 1.0 - 1.05 [0.93] (660/600/800MHz) Idle power consumption doesn't appear to be influenced much, but a simple load test (`cat /dev/urandom | pigz - > /dev/null` combined with running Animatch) seems to show about 0.3W of difference. Care is advised, as there may be differences between each units in how low can they be undervolted - in my experience, reaching that point usually makes the phone fail to boot. In my case, it appears that my Birch phone can go down the most. This is a somewhat conservative set of values that I've seen working well on all my devices; I haven't tried very hard to optimize it, so more experiments are welcome. Signed-off-by: Sebastian Krzyszkowiak <sebastian.krzyszkowiak@puri.sm> Signed-off-by: Martin Kepplinger <martin.kepplinger@puri.sm> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2023-03-27arm64: dts: imx8mq-librem5: Set charger parameters for each batchSebastian Krzyszkowiak
Correctly set regulation-voltage, termination-current and charge-current for the different librem 5 board revisions. Signed-off-by: Sebastian Krzyszkowiak <sebastian.krzyszkowiak@puri.sm> Signed-off-by: Martin Kepplinger <martin.kepplinger@puri.sm> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2023-03-27arm64: dts: imx8mq-librem5: add brightness levels to led-backlightMartin Kepplinger
Add brightness-levels and default-brightness-level properties to the librem5 board description that have been used for a long time. Signed-off-by: Martin Kepplinger <martin.kepplinger@puri.sm> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2023-03-27arm64: dts: imx8mq-librem5: Describe MIC_2V4 regulatorSebastian Krzyszkowiak
No functional change, but it describes the hardware better. Signed-off-by: Sebastian Krzyszkowiak <sebastian.krzyszkowiak@puri.sm> Signed-off-by: Martin Kepplinger <martin.kepplinger@puri.sm> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2023-03-27arm64: dts: imx8mq-librem5: fix audio-1v8 regulator nameMartin Kepplinger
Fix the regulator name for the audio-1v8 regulator. Signed-off-by: Martin Kepplinger <martin.kepplinger@puri.sm> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2023-03-27arm64: dts: imx8mq-librem5: describe the clock for the csi sensorsMartin Kepplinger
The CLKO2 clock is used for both camera CSI interfaces as the driving clock for the connected sensors. In order for it to be available, use this hog. We can't simply add it to 2 different sensor descriptions. Signed-off-by: Martin Kepplinger <martin.kepplinger@puri.sm> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2023-03-27arm64: dts: imx8mq-librem5: lower the mipi csi 1 frequenciesMartin Kepplinger
No frames are streamed when using the default frequencies. I'm not yet sure why the fastest ones don't work here but we've been using these frequencies successfully for a long time now. Signed-off-by: Martin Kepplinger <martin.kepplinger@puri.sm> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2023-03-24Merge branch '20230307062232.4889-1-quic_kathirav@quicinc.com' into ↵Bjorn Andersson
arm64-for-6.4 Merge in the topic branch with IPQ5332 GCC DT-binding, to ensure that the header file with GCC clock defines are available.
2023-03-24arm64: dts: qcom: sdm630: move DSI opp-table into DSI nodeKrzysztof Kozlowski
The soc node is supposed to have only device nodes with MMIO addresses, so move the DSI OPP into the DSI controller node to fix: sda660-inforce-ifc6560.dtb: soc: opp-table-dsi: {'compatible': ['operating-points-v2'], ... should not be valid under {'type': 'object'} From schema: dtschema/schemas/simple-bus.yaml Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Signed-off-by: Bjorn Andersson <andersson@kernel.org> Link: https://lore.kernel.org/r/20230324202244.744271-5-krzysztof.kozlowski@linaro.org
2023-03-24arm64: dts: qcom: msm8996-xiaomi: drop simple-bus from clocksKrzysztof Kozlowski
'clocks' node is not a bus, but just a placeholder for clocks: msm8996-xiaomi-gemini.dtb: clocks: $nodename:0: 'clocks' does not match '^([a-z][a-z0-9\\-]+-bus|bus|localbus|soc|axi|ahb|apb)(@.+)?$' From schema: dtschema/schemas/simple-bus.yaml msm8996-xiaomi-gemini.dtb: clocks: xo-board: {'compatible': ['fixed-clock'], '#clock-cells': [[0]], ... From schema: dtschema/schemas/simple-bus.yaml Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Signed-off-by: Bjorn Andersson <andersson@kernel.org> Link: https://lore.kernel.org/r/20230324202244.744271-4-krzysztof.kozlowski@linaro.org
2023-03-24arm64: dts: qcom: msm8994-msft-lumia: drop simple-bus from clocksKrzysztof Kozlowski
'clocks' node is not a bus, but just a placeholder for clocks: msm8992-msft-lumia-octagon-talkman.dtb: clocks: $nodename:0: 'clocks' does not match '^([a-z][a-z0-9\\-]+-bus|bus|localbus|soc|axi|ahb|apb)(@.+)?$' From schema: dtschema/schemas/simple-bus.yaml msm8992-msft-lumia-octagon-talkman.dtb: clocks: xo-board: {'compatible': ['fixed-clock'], '#clock-cells': [[0]], ... From schema: dtschema/schemas/simple-bus.yaml Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Signed-off-by: Bjorn Andersson <andersson@kernel.org> Link: https://lore.kernel.org/r/20230324202244.744271-3-krzysztof.kozlowski@linaro.org
2023-03-24arm64: dts: qcom: apq8096-db820c: drop simple-bus from clocksKrzysztof Kozlowski
'clocks' node is not a bus, but just a placeholder for clocks: apq8096-db820c.dtb: clocks: $nodename:0: 'clocks' does not match '^([a-z][a-z0-9\\-]+-bus|bus|localbus|soc|axi|ahb|apb)(@.+)?$' From schema: dtschema/schemas/simple-bus.yaml apq8096-db820c.dtb: clocks: xo-board: {'compatible': ['fixed-clock'], '#clock-cells': [[0]], ... From schema: dtschema/schemas/simple-bus.yaml Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Signed-off-by: Bjorn Andersson <andersson@kernel.org> Link: https://lore.kernel.org/r/20230324202244.744271-2-krzysztof.kozlowski@linaro.org
2023-03-24Merge tag 'dt-cleanup-6.4' of ↵Arnd Bergmann
https://git.kernel.org/pub/scm/linux/kernel/git/krzk/linux-dt into soc/dt Minor improvements in ARM DTS for v6.4 1. TI, Marvell, HiSilicon: "okay" over "ok" is preferred for status property. 2. OMAP: align UART node name with bindings. * tag 'dt-cleanup-6.4' of https://git.kernel.org/pub/scm/linux/kernel/git/krzk/linux-dt: ARM: dts: hisilicon: use "okay" for status ARM: dts: ti: use "okay" for status ARM: dts: marvell: use "okay" for status ARM: dts: omap: align UART node name with bindings Link: https://lore.kernel.org/r/20230319152740.34551-2-krzysztof.kozlowski@linaro.org Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2023-03-24Merge tag 'dt64-cleanup-6.4' of ↵Arnd Bergmann
https://git.kernel.org/pub/scm/linux/kernel/git/krzk/linux-dt into soc/dt Minor improvements in ARM64 DTS for v6.4 1. Toshiba: white-space fixes. 2. Cavium, Marvell: fix GICv3 ITS node name. * tag 'dt64-cleanup-6.4' of https://git.kernel.org/pub/scm/linux/kernel/git/krzk/linux-dt: arm64: dts: cavium: Fix GICv3 ITS nodes arm64: dts: marvell: armada-ap810: Fix GICv3 ITS node name arm64: dts: toshiba: adjust whitespace around '=' Link: https://lore.kernel.org/r/20230319152740.34551-1-krzysztof.kozlowski@linaro.org Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2023-03-24arm64: dts: qcom: sm8450: fix pcie1 gpios properties nameNeil Armstrong
Add the final "s" to the pgio properties and fix the invalid "enable" name to the correct "wake", checked against the HDK8450 schematics. Fixes: bc6588bc25fb ("arm64: dts: qcom: sm8450: add PCIe1 root device") Signed-off-by: Neil Armstrong <neil.armstrong@linaro.org> Signed-off-by: Bjorn Andersson <andersson@kernel.org> Link: https://lore.kernel.org/r/20230323-topic-sm8450-upstream-dt-bindings-fixes-v2-4-0ca1bea1a843@linaro.org
2023-03-24arm64: dts: qcom: sm8450: remove invalid power-domain-names in pcie nodesNeil Armstrong
Fixes the following DT bindings check error: pci@1c00000: Unevaluated properties are not allowed ('power-domain-names' were unexpected) Signed-off-by: Neil Armstrong <neil.armstrong@linaro.org> Signed-off-by: Bjorn Andersson <andersson@kernel.org> Link: https://lore.kernel.org/r/20230323-topic-sm8450-upstream-dt-bindings-fixes-v2-3-0ca1bea1a843@linaro.org
2023-03-24arm64: dts: qcom: ipq8074-hk10: enable QMP device, not the PHY nodeDmitry Baryshkov
Correct PCIe PHY enablement to refer the QMP device nodes rather than PHY device nodes. QMP nodes have 'status = "disabled"' property in the ipq8074.dtsi, while PHY nodes do not correspond to the actual device and do not have the status property. Fixes: 1ed34da63a37 ("arm64: dts: qcom: Add board support for HK10") Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> Signed-off-by: Bjorn Andersson <andersson@kernel.org> Link: https://lore.kernel.org/r/20230324021651.1799969-2-dmitry.baryshkov@linaro.org
2023-03-24arm64: dts: qcom: ipq8074-hk01: enable QMP device, not the PHY nodeDmitry Baryshkov
Correct PCIe PHY enablement to refer the QMP device nodes rather than PHY device nodes. QMP nodes have 'status = "disabled"' property in the ipq8074.dtsi, while PHY nodes do not correspond to the actual device and do not have the status property. Fixes: e8a7fdc505bb ("arm64: dts: ipq8074: qcom: Re-arrange dts nodes based on address") Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> Signed-off-by: Bjorn Andersson <andersson@kernel.org> Link: https://lore.kernel.org/r/20230324021651.1799969-1-dmitry.baryshkov@linaro.org
2023-03-24arm64: dts: qcom: sc8280xp-x13s: enable alternate touchpadJohan Hovold
Enable both touchpad nodes in the devictree and let the HID driver determine which one is actually populated (by attempting to read from each i2c address). Ideally this would not be needed and the boot firmware should instead enable only the node for the populated touchpad, but this is unlikely to ever be realised for the X13s. Note that the pin configuration must currently be moved to the parent i2c-bus node even though only one of these nodes will ever be successfully probed on a specific device (e.g. to allow them to be probed in parallel). Signed-off-by: Johan Hovold <johan+linaro@kernel.org> Signed-off-by: Bjorn Andersson <andersson@kernel.org> Link: https://lore.kernel.org/r/20230324094744.20448-1-johan+linaro@kernel.org
2023-03-23ARM: dts: suniv: Add Lctech Pi F1C200s devicetreeAndre Przywara
The Lctech Pi F1C200s (also previously known under the Cherry Pi brand) is a small development board with the Allwinner F1C200s SoC. This is the same as the F1C100s, but with 64MB instead of 32MB co-packaged DRAM. Alongside the obligatory micro-SD card slot, the board features a SPI-NAND flash chip, LCD and touch connectors, and unpopulated expansion header pins. There are two USB Type-C ports on the board: One supplies the power, also connects to the USB MUSB OTG controller port. The other one is connected to an CH340 USB serial chip, which in turn is connected to UART1. Add a devicetree file, so that the board can be used easily. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Acked-by: Jernej Skrabec <jernej.skrabec@gmail.com> Link: https://lore.kernel.org/r/20230319212936.26649-7-andre.przywara@arm.com Signed-off-by: Jernej Skrabec <jernej.skrabec@gmail.com>
2023-03-23ARM: dts: suniv: add device tree for PopStick v1.1Icenowy Zheng
PopStick is a minimal Allwinner F1C200s dongle, with its USB controller wired to a USB Type-A plug, a SD slot and a SPI NAND flash on board, and an on-board CH340 USB-UART converted connected to F1C200s's UART0. Add a device tree for it. As F1C200s is just F1C100s with a different DRAM chip co-packaged, directly use F1C100s DTSI here. This commit covers the v1.1 version of this board, which is now shipped. v1.0 is some internal sample that have not been shipped at all. Signed-off-by: Icenowy Zheng <uwu@icenowy.me> Signed-off-by: Andre Przywara <andre.przywara@arm.com> Acked-by: Jernej Skrabec <jernej.skrabec@gmail.com> Link: https://lore.kernel.org/r/20230319212936.26649-6-andre.przywara@arm.com Signed-off-by: Jernej Skrabec <jernej.skrabec@gmail.com>
2023-03-23dt-binding: arm: sunxi: add two board compatible stringsIcenowy Zheng
The SourceParts PopStick is a F1C200s-based stick-shaped SBC. The publicly released version is actually v1.1. The Lctech Pi F1C200s is a small development board using the Allwinner F1C200s SoC. Add the compatible string lists to the bindings documentation. Signed-off-by: Icenowy Zheng <uwu@icenowy.me> Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Signed-off-by: Andre Przywara <andre.przywara@arm.com> Link: https://lore.kernel.org/r/20230319212936.26649-5-andre.przywara@arm.com Signed-off-by: Jernej Skrabec <jernej.skrabec@gmail.com>
2023-03-23dt-bindings: vendor-prefixes: add Source Parts and Lctech namesIcenowy Zheng
Source Parts Inc. [1] is a company that makes a series of SBCs, SoMs, etc under a brand called Popcorn Computer [2]. Shenzen LC Technology [3] makes various boards and related products around IoT and AI technology. They used the "Cherry Pi" brand name before. Add both companies' names to the vendor prefixes list. [1] https://source.parts/ [2] https://popcorncomputer.com/ [3] http://www.chinalctech.com Signed-off-by: Icenowy Zheng <uwu@icenowy.me> Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Acked-by: Jernej Skrabec <jernej.skrabec@gmail.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com> Link: https://lore.kernel.org/r/20230319212936.26649-4-andre.przywara@arm.com Signed-off-by: Jernej Skrabec <jernej.skrabec@gmail.com>
2023-03-23ARM: dts: suniv: licheepi-nano: enable USBIcenowy Zheng
Lichee Pi Nano has a Micro-USB connector, with its D+, D- pins connected to the USB pins of the SoC and ID pin connected to PE2 GPIO. Enable the USB functionality. Signed-off-by: Icenowy Zheng <uwu@icenowy.me> Acked-by: Jernej Skrabec <jernej.skrabec@gmail.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com> Link: https://lore.kernel.org/r/20230319212936.26649-3-andre.przywara@arm.com Signed-off-by: Jernej Skrabec <jernej.skrabec@gmail.com>
2023-03-23ARM: dts: suniv: add USB-related device nodesIcenowy Zheng
The suniv SoC has a USB OTG controller and a USB PHY like other Allwinner SoCs. Add their device tree node. Signed-off-by: Icenowy Zheng <uwu@icenowy.me> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Acked-by: Jernej Skrabec <jernej.skrabec@gmail.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com> Link: https://lore.kernel.org/r/20230319212936.26649-2-andre.przywara@arm.com Signed-off-by: Jernej Skrabec <jernej.skrabec@gmail.com>
2023-03-23arm64: dts: qcom: qrb5165-rb5: Use proper WSA881x shutdown GPIO polarityKrzysztof Kozlowski
The WSA881x shutdown GPIO is active low (SD_N), but Linux driver assumed DTS always comes with active high. Since Linux drivers were updated to handle proper flag, correct the DTS. The change is not backwards compatible with older Linux kernel. Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Signed-off-by: Bjorn Andersson <andersson@kernel.org> Link: https://lore.kernel.org/r/20230322193051.826167-5-krzysztof.kozlowski@linaro.org
2023-03-23arm64: dts: qcom: sm8250-mtp: Use proper WSA881x shutdown GPIO polarityKrzysztof Kozlowski
The WSA881x shutdown GPIO is active low (SD_N), but Linux driver assumed DTS always comes with active high. Since Linux drivers were updated to handle proper flag, correct the DTS. The change is not backwards compatible with older Linux kernel. Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Signed-off-by: Bjorn Andersson <andersson@kernel.org> Link: https://lore.kernel.org/r/20230322193051.826167-4-krzysztof.kozlowski@linaro.org
2023-03-23arm64: dts: qcom: sdm850-samsung-w737: Use proper WSA881x shutdown GPIO polarityKrzysztof Kozlowski
The WSA881x shutdown GPIO is active low (SD_N), but Linux driver assumed DTS always comes with active high. Since Linux drivers were updated to handle proper flag, correct the DTS. The change is not backwards compatible with older Linux kernel. Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Signed-off-by: Bjorn Andersson <andersson@kernel.org> Link: https://lore.kernel.org/r/20230322193051.826167-3-krzysztof.kozlowski@linaro.org
2023-03-23arm64: dts: qcom: sdm850-lenovo-yoga-c630: Use proper WSA881x shutdown GPIO ↵Krzysztof Kozlowski
polarity The WSA881x shutdown GPIO is active low (SD_N), but Linux driver assumed DTS always comes with active high. Since Linux drivers were updated to handle proper flag, correct the DTS. The change is not backwards compatible with older Linux kernel. Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Signed-off-by: Bjorn Andersson <andersson@kernel.org> Link: https://lore.kernel.org/r/20230322193051.826167-2-krzysztof.kozlowski@linaro.org
2023-03-23arm64: dts: qcom: sc8280xp-pmics: fix sdam 'reg' propertyJohan Hovold
The SPMI PMIC register region width is fixed and should not be encoded in the devicetree. Fixes: d6dbbda37ab5 ("arm64: dts: qcom: sc8280xp-pmics: add pmk8280 sdam nvram") Signed-off-by: Johan Hovold <johan+linaro@kernel.org> Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org> Signed-off-by: Bjorn Andersson <andersson@kernel.org> Link: https://lore.kernel.org/r/20230320135710.1989-3-johan+linaro@kernel.org
2023-03-23arm64: dts: qcom: sm8450: add dp controllerNeil Armstrong
Add the Display Port controller subnode to the MDSS node. Signed-off-by: Neil Armstrong <neil.armstrong@linaro.org> Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org> Signed-off-by: Bjorn Andersson <andersson@kernel.org> Link: https://lore.kernel.org/r/20230206-topic-sm8450-upstream-dp-controller-v6-5-d78313cbc41d@linaro.org
2023-03-23arm64: dts: qcom: sm8450: switch to usb3/dp combo phyNeil Armstrong
The QMP PHY is a USB3/DP combo phy, switch to the newly documented bindings and register the clocks to the GCC and DISPCC controllers. Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org> Signed-off-by: Neil Armstrong <neil.armstrong@linaro.org> Signed-off-by: Bjorn Andersson <andersson@kernel.org> Link: https://lore.kernel.org/r/20230206-topic-sm8450-upstream-dp-controller-v6-4-d78313cbc41d@linaro.org
generated by cgit (git 2.34.1) at 2025-09-12 17:42:43 +0000