summaryrefslogtreecommitdiff
AgeCommit message (Collapse)Author
2023-12-07pinctrl: core: Make pins const unsigned int pointer in struct group_descAndy Shevchenko
It's unclear why it's not a const unsigned int pointer from day 1. Make the pins member const unsigned int pointer in struct group_desc. Update necessary APIs. Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be> Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Link: https://lore.kernel.org/r/20231204160033.1872569-3-andriy.shevchenko@linux.intel.com Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2023-12-07pinctrl: renesas: Mark local variable with const in ->set_mux()Andy Shevchenko
We are not going to change pins in the ->set_mux() callback. Mark the local variable with a const qualifier. While at it, make it also unsigned. Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be> Acked-by: Geert Uytterhoeven <geert+renesas@glider.be> Link: https://lore.kernel.org/r/20231204160033.1872569-2-andriy.shevchenko@linux.intel.com Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2023-12-04dt-bindings: pinctrl: qcom,sm8550-lpass-lpi: add X1E80100 LPASS LPIKrzysztof Kozlowski
Document the Qualcomm X1E80100 SoC Low Power Audio SubSystem Low Power Island (LPASS LPI) pin controller, compatible with earlier SM8550 model. Cc: Abel Vesa <abel.vesa@linaro.org> Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Acked-by: Conor Dooley <conor.dooley@microchip.com> Reviewed-by: Abel Vesa <abel.vesa@linaro.org> Link: https://lore.kernel.org/r/20231129155738.167030-1-krzysztof.kozlowski@linaro.org Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2023-12-04pinctrl: pinctrl-single: add ti,j7200-padconf compatibleThomas Richard
On j7200, during suspend to ram pinctrl contexts are lost. To save and restore contexts during suspend/resume, the flag PCS_CONTEXT_LOSS_OFF shall be set. Signed-off-by: Thomas Richard <thomas.richard@bootlin.com> Reviewed-by: Tony Lindgren <tony@atomide.com> Link: https://lore.kernel.org/r/20231128-j7200-pinctrl-s2r-v1-2-704e7dc24460@bootlin.com Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2023-12-04dt-bindings: pinctrl: pinctrl-single: add ti,j7200-padconf compatibleThomas Richard
Add the "ti,j7200-padconf" compatible to support suspend to ram on j7200. Signed-off-by: Thomas Richard <thomas.richard@bootlin.com> Reviewed-by: Tony Lindgren <tony@atomide.com> Acked-by: Conor Dooley <conor.dooley@microchip.com> Link: https://lore.kernel.org/r/20231128-j7200-pinctrl-s2r-v1-1-704e7dc24460@bootlin.com Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2023-12-04pinctrl: qcom: fail to retrieve configuration from invalid pin groupsRichard Acayan
The pinconf-groups debugfs file dumps each valid configuration item of all pin groups. Some platforms and devices may have pin groups which cannot be accessed, according to commit 691bf5d5a7bf ("pinctrl: qcom: Don't allow protected pins to be requested"). Fail for each configuration item of an invalid pin group by checking the GPIO chip's valid mask. The validity of the pin group cannot be checked in the generic pinconf dump (function "pinconf_generic_dump_one"), as it does not directly interact with the gpiochip or the pinmux callbacks (which would give it access to the request callback). Instead, an entry contains the ID and name of the pingroup with no properties when all items fail. Signed-off-by: Richard Acayan <mailingradian@gmail.com> Link: https://lore.kernel.org/r/20231128020202.728156-3-mailingradian@gmail.com Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2023-12-04pinctrl: mediatek: Switch to use no-IRQ PM helpersAndy Shevchenko
Since pm.h provides a helper for system no-IRQ PM callbacks, switch the driver to use it instead of open coded variant. Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Link: https://lore.kernel.org/r/20231122144744.2222207-1-andriy.shevchenko@linux.intel.com Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2023-12-04pinctrl: Convert unsigned to unsigned intAndy Shevchenko
Simple type conversion with no functional change implied. While at it, adjust indentation where it makes sense. Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Link: https://lore.kernel.org/r/20231129161459.1002323-24-andriy.shevchenko@linux.intel.com Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2023-12-01pinctrl: imx: Use temporary variable to hold pinsAndy Shevchenko
The pins are allocated from the heap, but in order to pass them as constant object, we need to use non-constant pointer. Achieve this by using a temporary variable. Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Link: https://lore.kernel.org/r/20231129161459.1002323-6-andriy.shevchenko@linux.intel.com Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2023-12-01pinctrl: equilibrium: Use temporary variable to hold pinsAndy Shevchenko
The pins are allocated from the heap, but in order to pass them as constant object, we need to use non-constant pointer. Achieve this by using a temporary variable. Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Link: https://lore.kernel.org/r/20231129161459.1002323-5-andriy.shevchenko@linux.intel.com Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2023-12-01pinctrl: equilibrium: Unshadow error code of of_property_count_u32_elems()Andy Shevchenko
of_property_count_u32_elems() might return an error code in some cases. It's naturally better to assign what it's returned to the err variable and supply the real code to the upper layer(s). Besides that, it's a common practice to avoid assignments for the data in cases when we know that the error condition happened. Refactor the code accordingly. Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Link: https://lore.kernel.org/r/20231129161459.1002323-4-andriy.shevchenko@linux.intel.com Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2023-12-01pinctrl: qcom: lpass-lpi: Remove unused member in struct lpi_pingroupAndy Shevchenko
The group is not used anywhere, remove it. And if needed, it should be struct pingroup anyway. Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Link: https://lore.kernel.org/r/20231129161459.1002323-3-andriy.shevchenko@linux.intel.com Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2023-12-01pinctrl: qcom: lpass-lpi: Replace kernel.h with what is being usedAndy Shevchenko
Replace kernel.h with what exactly is being used, i.e. array_size.h. Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Link: https://lore.kernel.org/r/20231129161459.1002323-2-andriy.shevchenko@linux.intel.com Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2023-12-01Merge tag 'renesas-pinctrl-for-v6.8-tag1' of ↵Linus Walleij
git://git.kernel.org/pub/scm/linux/kernel/git/geert/renesas-drivers into devel pinctrl: renesas: Updates for v6.8 - Add support for interrupt affinity to the RZ/G2L GPIO driver, - Drop unneeded quotes in the RZ/A2 Pin controller DT bindings. Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2023-11-30pinctrl: samsung: add irq_set_affinity() for non wake up external gpio interruptYoungmin Nam
To support affinity setting for non wake up external gpio interrupt, add irq_set_affinity callback using irq number from pinctrl driver data. Before this patch, changing the irq affinity of gpio interrupt is not possible: # cat /proc/irq/418/smp_affinity 3ff # echo 00f > /proc/irq/418/smp_affinity # cat /proc/irq/418/smp_affinity 3ff # cat /proc/interrupts CPU0 CPU1 CPU2 CPU3 ... 418: 3631 0 0 0 ... With this patch applied, it's possible to change irq affinity of gpio interrupt: # cat /proc/irq/418/smp_affinity 3ff # echo 00f > /proc/irq/418/smp_affinity # cat /proc/irq/418/smp_affinity 00f # cat /proc/interrupts CPU0 CPU1 CPU2 CPU3 ... 418: 3893 201 181 188 ... Signed-off-by: Youngmin Nam <youngmin.nam@samsung.com> Reviewed-by: Sam Protsenko <semen.protsenko@linaro.org> Tested-by: Sam Protsenko <semen.protsenko@linaro.org> Link: https://lore.kernel.org/r/20231126094618.2545116-1-youngmin.nam@samsung.com Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
2023-11-27dt-bindings: pinctrl: renesas: Drop unneeded quotesRob Herring
Drop unneeded quotes over simple string values to fix a soon to be enabled yamllint warning: [error] string value is redundantly quoted with any quotes (quoted-strings) Signed-off-by: Rob Herring <robh@kernel.org> Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be> Link: https://lore.kernel.org/r/20231122224409.2808999-1-robh@kernel.org Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
2023-11-27pinctrl: renesas: rzg2l: Enhance driver to support interrupt affinity settingLad Prabhakar
Implement irq_set_affinity callback so that we can set affinity for GPIO IRQs. Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com> Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be> Link: https://lore.kernel.org/r/20231011195923.67404-1-prabhakar.mahadev-lad.rj@bp.renesas.com Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
2023-11-25pinctrl: don't include GPIOLIB private headerBartosz Golaszewski
gpio_to_desc() is declared in linux/gpio.h so there's no need to include gpiolib.h directly. Signed-off-by: Bartosz Golaszewski <bartosz.golaszewski@linaro.org> Acked-by: Linus Walleij <linus.walleij@linaro.org> Link: https://lore.kernel.org/r/20231115165001.2932350-4-brgl@bgdev.pl Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2023-11-25pinctrl: stop using gpiod_to_chip()Bartosz Golaszewski
Don't dereference struct gpio_chip directly, use dedicated gpio_device getters instead. Signed-off-by: Bartosz Golaszewski <bartosz.golaszewski@linaro.org> Acked-by: Linus Walleij <linus.walleij@linaro.org> Link: https://lore.kernel.org/r/20231115165001.2932350-3-brgl@bgdev.pl Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2023-11-25Merge tag 'gpio-device-get-label-for-v6.8-rc1' of ↵Linus Walleij
git://git.kernel.org/pub/scm/linux/kernel/git/brgl/linux into devel gpiolib: provide gpio_device_get_label() Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2023-11-24gpiolib: provide gpio_device_get_label()Bartosz Golaszewski
Provide a getter for the GPIO device label string so that users don't have to dereference struct gpio_chip directly. Signed-off-by: Bartosz Golaszewski <bartosz.golaszewski@linaro.org>
2023-11-24pinctrl: baytrail: Simplify code with cleanup helpersAndy Shevchenko
Use macros defined in linux/cleanup.h to automate resource lifetime control in the driver. Reviewed-by: Linus Walleij <linus.walleij@linaro.org> Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Acked-by: Mika Westerberg <mika.westerberg@linux.intel.com>
2023-11-24pinctrl: baytrail: Move default strength assignment to a switch-caseAndy Shevchenko
When ->pin_config_set() is called from the GPIO library (assumed GpioIo() ACPI resource), the argument can be 1, when, for example, PullDefault is provided. In such case we supply sane default in the driver. Move that default assingment to a switch-case, so it will be consolidated in one place. Reviewed-by: Linus Walleij <linus.walleij@linaro.org> Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Acked-by: Mika Westerberg <mika.westerberg@linux.intel.com>
2023-11-24pinctrl: baytrail: Factor out byt_gpio_force_input_mode()Andy Shevchenko
There is a piece of code that it being used at least twice. Factor it out. Reviewed-by: Linus Walleij <linus.walleij@linaro.org> Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Acked-by: Mika Westerberg <mika.westerberg@linux.intel.com>
2023-11-24pinctrl: baytrail: Fix types of config value in byt_pin_config_set()Andy Shevchenko
When unpacked, the config value is split to two of different types. Fix the types accordingly. Acked-by: Mika Westerberg <mika.westerberg@linux.intel.com> Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
2023-11-24pinctrl: lynxpoint: Simplify code with cleanup helpersAndy Shevchenko
Use macros defined in linux/cleanup.h to automate resource lifetime control in the driver. Acked-by: Mika Westerberg <mika.westerberg@linux.intel.com> Reviewed-by: Linus Walleij <linus.walleij@linaro.org> Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
2023-11-24pinctrl: tangier: simplify locking using cleanup helpersRaag Jadav
Use lock guards from cleanup.h to simplify locking. Signed-off-by: Raag Jadav <raag.jadav@intel.com> Acked-by: Mika Westerberg <mika.westerberg@linux.intel.com> Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
2023-11-24pinctrl: as3722: Use devm_gpiochip_add_data() to simplify remove pathAndrew Davis
Use devm version of gpiochip add function to handle removal for us. Signed-off-by: Andrew Davis <afd@ti.com> Reviewed-by: Andy Shevchenko <andy@kernel.org> Reviewed-by: Andy Shevchenko <andy.shevchenko@gmail.com> Link: https://lore.kernel.org/r/20231116223045.274211-1-afd@ti.com Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2023-11-24pinctrl: qcom: Add X1E80100 pinctrl driverRajendra Nayak
Add initial pinctrl driver to support pin configuration with pinctrl framework for X1E80100 SoC. Co-developed-by: Abel Vesa <abel.vesa@linaro.org> Signed-off-by: Abel Vesa <abel.vesa@linaro.org> Signed-off-by: Rajendra Nayak <quic_rjendra@quicinc.com> Co-developed-by: Sibi Sankar <quic_sibis@quicinc.com> Signed-off-by: Sibi Sankar <quic_sibis@quicinc.com> Reviewed-by: Bjorn Andersson <andersson@kernel.org> Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Link: https://lore.kernel.org/r/20231117093921.31968-3-quic_sibis@quicinc.com Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2023-11-24dt-bindings: pinctrl: qcom: Add X1E80100 pinctrlRajendra Nayak
Add device tree binding Documentation details for Qualcomm X1E80100 TLMM device. Signed-off-by: Rajendra Nayak <quic_rjendra@quicinc.com> Co-developed-by: Sibi Sankar <quic_sibis@quicinc.com> Signed-off-by: Sibi Sankar <quic_sibis@quicinc.com> Reviewed-by: Bjorn Andersson <andersson@kernel.org> Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Link: https://lore.kernel.org/r/20231117093921.31968-2-quic_sibis@quicinc.com Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2023-11-24pinctrl: npcm7xx: prevent glitch when setting the GPIO to output highTomer Maimon
Enable GPIO output after setting the output value to prevent a glitch when pinctrl driver sets gpio pin to output high and the pin is in the default state (high->low->high). Signed-off-by: Tomer Maimon <tmaimon77@gmail.com> Signed-off-by: William A. Kennington III <william@wkennington.com> Link: https://lore.kernel.org/r/20231115211209.1683449-1-william@wkennington.com Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2023-11-24pinctrl: stm32: return errors from stm32_gpio_direction_output()Sergey Shtylyov
In the STMicroelectronics STM32 driver, stm32_gpio_direction_output() ignores the result of pinctrl_gpio_direction_output() for no good reason. Let's propagate errors from pinctrl_gpio_direction_output() upstream... Found by Linux Verification Center (linuxtesting.org) with the Svace static analysis tool. Signed-off-by: Sergey Shtylyov <s.shtylyov@omp.ru> Link: https://lore.kernel.org/r/5ce023a8-db0c-13a9-be42-09e3348ca44d@omp.ru Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2023-11-24dt-bindings: pinctrl: samsung: use Exynos7 fallbacks for newer wake-up ↵Krzysztof Kozlowski
controllers Older ARM8 SoCs like Exynos5433, Exynos7 and Exynos7885 have the pin controller with wake-up interrupts muxed, thus the wake-up interrupt controller device node has interrupts property, while its pin banks might not (because they are muxed by the wake-up controller). Newer SoCs like Exynos850 and ExynosAutov9 do not used muxed wake-up interrupts: 1. Wake-up interrupt controller device node has no interrupts, 2. Its pin banks have interrupts (since there is no muxing). Their programming interface is however still compatible with Exynos7, thus change the bindings to express this: retain compatibility with Exynos7 and add new compatibility fallback of Exynos850 in newer designs. No driver changes are needed. This is necessary only to properly describe DTS. Acked-by: Conor Dooley <conor.dooley@microchip.com> Acked-by: Jaewon Kim <jaewon02.kim@samsung.com> Link: https://lore.kernel.org/r/20231122200407.423264-1-krzysztof.kozlowski@linaro.org Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
2023-11-22pinctrl: intel: use the correct _PM_OPS() export macroRaag Jadav
Since we don't have runtime PM handles here, we should be using EXPORT_NS_GPL_DEV_SLEEP_PM_OPS() macro, so that the compiler can discard it in case CONFIG_PM_SLEEP=n. Fixes: b10a74b5c0c1 ("pinctrl: intel: Provide Intel pin control wide PM ops structure") Signed-off-by: Raag Jadav <raag.jadav@intel.com> Acked-by: Mika Westerberg <mika.westerberg@linux.intel.com> Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
2023-11-16MAINTAINERS: Remove snawrocki's git treePetr Vorel
There is already krzk/linux.git listed, which is currently used. Signed-off-by: Petr Vorel <pvorel@suse.cz> Acked-by: Sylwester Nawrocki <s.nawrocki@samsung.com> Link: https://lore.kernel.org/r/20231108085630.7767-1-pvorel@suse.cz Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
2023-11-15dt-bindings: pinctrl: samsung: add exynosautov920Jaewon Kim
Add compatible string for exynosautov920 pin controller. Signed-off-by: Jaewon Kim <jaewon02.kim@samsung.com> Link: https://lore.kernel.org/r/20231115095609.39883-7-jaewon02.kim@samsung.com Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
2023-11-15dt-bindings: pinctrl: samsung: add specific compatibles for existing SoCKrzysztof Kozlowski
Samsung Exynos SoC reuses several devices from older designs, thus historically we kept the old (block's) compatible only. This works fine and there is no bug here, however guidelines expressed in Documentation/devicetree/bindings/writing-bindings.rst state that: 1. Compatibles should be specific. 2. We should add new compatibles in case of bugs or features. Add compatibles specific to each SoC in front of all old-SoC-like compatibles. Reviewed-by: Alim Akhtar <alim.akhtar@samsung.com> Acked-by: Rob Herring <robh@kernel.org> Reviewed-by: Linus Walleij <linus.walleij@linaro.org> Link: https://lore.kernel.org/r/20231108104343.24192-6-krzysztof.kozlowski@linaro.org Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
2023-11-14pinctrl: tps6594: Add driver for TPS6594 pinctrl and GPIOsEsteban Blanc
TI TPS6594 PMIC has 11 GPIOs which can be used for different functions. This patch adds a pinctrl and GPIO drivers in order to use those functions. Signed-off-by: Esteban Blanc <eblanc@baylibre.com> Reviewed-by: Linus Walleij <linus.walleij@linaro.org> Reviewed-by: Andy Shevchenko <andy.shevchenko@gmail.com> Link: https://lore.kernel.org/r/20231108104124.2818275-1-eblanc@baylibre.com Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2023-11-14pinctrl: intel: Add a generic Intel pin control platform driverAndy Shevchenko
New generations of Intel platforms will provide better description of the pin control devices in the ACPI tables. Hence, we may provide a generic pin control platform driver to cover all of them. Currently the following Intel SoCs / platforms require this to be functional: - Lunar Lake Acked-by: Mika Westerberg <mika.westerberg@linux.intel.com> Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
2023-11-14pinctrl: intel: Revert "Unexport intel_pinctrl_probe()"Andy Shevchenko
In order to prepare for a new coming driver export the original intel_pinctrl_probe() again. This reverts commit 0dd519e3784b13befa1cdfeff847a0885b06650f. Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
2023-11-14pinctrl: qcom: lpass-lpi: allow slew rate bit in main pin config registerKrzysztof Kozlowski
Existing Qualcomm SoCs have the LPASS pin controller slew rate control in separate register, however this will change with upcoming Qualcomm SoCs. The slew rate will be part of the main register for pin configuration, thus second device IO address space is not needed. Prepare for supporting new SoCs by adding flag customizing the driver behavior for slew rate. Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org> Link: https://lore.kernel.org/r/20231013145935.220945-3-krzysztof.kozlowski@linaro.org Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2023-11-14pinctrl: qcom: lpass-lpi: split slew rate set to separate functionKrzysztof Kozlowski
Setting slew rate for each pin will grow with upcoming Qualcomm SoCs, so split the code responsible for this into separate function for easier readability and maintenance. Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org> Link: https://lore.kernel.org/r/20231013145935.220945-2-krzysztof.kozlowski@linaro.org Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2023-11-13pinctrl: intel: allow independent COMPILE_TESTRaag Jadav
Now that we have completed the transition to standard ACPI helpers for the entire Intel pinctrl tree, we can detach COMPILE_TEST from ACPI dependency. Signed-off-by: Raag Jadav <raag.jadav@intel.com> Acked-by: Mika Westerberg <mika.westerberg@linux.intel.com> Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
2023-11-13pinctrl: qcom: Introduce the SM8650 Top Level Mode Multiplexer driverNeil Armstrong
Add Top Level Mode Multiplexer (pinctrl) support for the SM8650 platform. Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Signed-off-by: Neil Armstrong <neil.armstrong@linaro.org> Link: https://lore.kernel.org/r/20231106-topic-sm8650-upstream-tlmm-v3-3-0e179c368933@linaro.org Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2023-11-13pinctrl: qcom: handle intr_target_reg wakeup_present/enable bitsNeil Armstrong
New platforms uses a new set of bits to control the wakeirq delivery to the PDC block. The intr_wakeup_present_bit indicates if the GPIO supports wakeirq and intr_wakeup_enable_bit enables wakeirq delivery to the PDC block. While the name seems to imply this only enables wakeup events, it is required to allow interrupts events to the PDC block. Enable this bit in the irq resource request/free if: - gpio is in wakeirq map - has the intr_wakeup_present_bit - the intr_wakeup_enable_bit is set Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Signed-off-by: Neil Armstrong <neil.armstrong@linaro.org> Link: https://lore.kernel.org/r/20231106-topic-sm8650-upstream-tlmm-v3-2-0e179c368933@linaro.org Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2023-11-13dt-bindings: pinctrl: document the SM8650 Top Level Mode MultiplexerNeil Armstrong
Document the Top Level Mode Multiplexer on the SM8650 Platform. Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Signed-off-by: Neil Armstrong <neil.armstrong@linaro.org> Link: https://lore.kernel.org/r/20231106-topic-sm8650-upstream-tlmm-v3-1-0e179c368933@linaro.org Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2023-11-13pinctrl: qcom: sm8650-lpass-lpi: add SM8650 LPASSKrzysztof Kozlowski
Add driver for the pin controller in Low Power Audio SubSystem (LPASS) of Qualcomm SM8650 SoC. Notable differences against SM8550 LPASS pin controller: 1. Additional address space for slew rate thus driver uses LPI_FLAG_SLEW_RATE_SAME_REG and sets slew rate via different register. 2. Two new pin mux functions: qca_swr_clk and qca_swr_data Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org> Link: https://lore.kernel.org/r/20231027093615.140656-3-krzysztof.kozlowski@linaro.org Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2023-11-13dt-bindings: pinctrl: qcom,sm8650-lpass-lpi-pinctrl: add SM8650 LPASSKrzysztof Kozlowski
Add bindings for the pin controller in Low Power Audio SubSystem (LPASS) of Qualcomm SM8650 SoC. Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Reviewed-by: Rob Herring <robh@kernel.org> Link: https://lore.kernel.org/r/20231027093615.140656-2-krzysztof.kozlowski@linaro.org Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2023-11-13pinctrl: tegra: Display pin function in pinconf-groupsThierry Reding
The function that a pin is muxed to can be read from the top-level pinctrl-maps debugfs file. However, this only reflects the values that were specified in device tree, so they will only show deviations from the hardware default setting. Display the current pinmux setting in the per-controller pinconf-groups debugfs file along with the rest of the per-pin configuration settings. Signed-off-by: Thierry Reding <treding@nvidia.com> Tested-by: Luca Ceresoli <luca.ceresoli@bootlin.com> Link: https://lore.kernel.org/r/20230929122101.466266-1-thierry.reding@gmail.com Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2023-11-13pinctrl: intel: Refactor intel_pinctrl_get_soc_data()Andy Shevchenko
Refactor intel_pinctrl_get_soc_data() to drop initial assignment of the data variable. It's only used in ACPI case and instead we may always assign it there as the ACPI ID table has the terminator entry that has driver data set to NULL. Acked-by: Mika Westerberg <mika.westerberg@linux.intel.com> Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
generated by cgit (git 2.34.1) at 2025-09-12 23:12:43 +0000