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2020-07-21Revert "drm/amdgpu/vcn: add shared memory restore after wake up from sleep."James Zhu
This reverts commit 21b704d78352c289d31697824ceea7ad0ff4ce59. To merge vcn firmware shared memory bo into vcn vcpu bo. Signed-off-by: James Zhu <James.Zhu@amd.com> Reviewed-by: Leo Liu <leo.liu@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2020-07-21drm/amd/display: 3.2.95Aric Cyr
Signed-off-by: Aric Cyr <aric.cyr@amd.com> Acked-by: Qingqing Zhuo <qingqing.zhuo@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2020-07-21drm/amd/display: interface to obtain minimum plane size capsIgor Kravchenko
[Why] Implement an interface to obtain plane size caps [How] Add min_width, min_height fields to dc_plane_cap structure. Set values to 16x16 for discrete ASICs, and 64x64 for others. Signed-off-by: Igor Kravchenko <Igor.Kravchenko@amd.com> Reviewed-by: Aric Cyr <Aric.Cyr@amd.com> Acked-by: Qingqing Zhuo <qingqing.zhuo@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2020-07-21drm/amd/display: Add additional config guards for DCNAurabindo Pillai
[Why&How] Fix build error by protecting code with config guard to enable building amdgpu without CONFIG_DRM_AMD_DC_DCN enabled. This option is disabled by default for allmodconfig. Signed-off-by: Aurabindo Pillai <aurabindo.pillai@amd.com> Reviewed-by: Nicholas Kazlauskas <Nicholas.Kazlauskas@amd.com> Acked-by: Qingqing Zhuo <qingqing.zhuo@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2020-07-21drm/amd/display: Call dsc related functions indirectly via dc interfaceAurabindo Pillai
[Why&How] Accessing dcn20_add_dsc_to_stream_resource directly causes build failure for configuration which has CONFIG_DRM_AMD_DC_DCN disabled. Fix this by calling the corresponding function exposed via dc resource functions. Signed-off-by: Aurabindo Pillai <aurabindo.pillai@amd.com> Reviewed-by: Nicholas Kazlauskas <Nicholas.Kazlauskas@amd.com> Acked-by: Qingqing Zhuo <qingqing.zhuo@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2020-07-21drm/amd/display: Improve compatibility by re-ordering info-packetsNaveed Ashfaq
[why] On DCN20, Some features would not be activated when ALLM was turned on. TV seemed to activate only the latest info packet sent, and the ALLM info packet was sent after the VSIF info packet. The packet indices was also inconsistent between DCN10 and DCN20. [how] Change the packet indices of DCN20 to match those of DCN10. This makes them consistent and also makes the vendor info packet be sent after the hfvsif info packet. Signed-off-by: Naveed Ashfaq <Naveed.Ashfaq@amd.com> Reviewed-by: Anthony Koo <Anthony.Koo@amd.com> Acked-by: Qingqing Zhuo <qingqing.zhuo@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2020-07-21drm/amd/display: [FW Promotion] Release 0.0.25Anthony Koo
Signed-off-by: Anthony Koo <Anthony.Koo@amd.com> Acked-by: Qingqing Zhuo <qingqing.zhuo@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2020-07-21drm/amd/display: Make new dc interface for adding dsc resourceAurabindo Pillai
[Why] dcn20_add_dsc_to_stream_resource is accessed in amdgpu_dm directly. This creates build error for configuration with DCN disabled. [How] Make the function available through a resource pool function so that dcn20 function need not be called directly. Signed-off-by: Aurabindo Pillai <aurabindo.pillai@amd.com> Reviewed-by: Nicholas Kazlauskas <Nicholas.Kazlauskas@amd.com> Acked-by: Qingqing Zhuo <qingqing.zhuo@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2020-07-21drm/amd/display: rename dsc extended caps as dsc branch decoder capsWenjing Liu
[why] The capability fields are reserved for DSC branch only to report the capability related to the branch's DSC decoder. Signed-off-by: Wenjing Liu <wenjing.liu@amd.com> Reviewed-by: Tony Cheng <Tony.Cheng@amd.com> Acked-by: Qingqing Zhuo <qingqing.zhuo@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2020-07-21drm/amd/display: Decouple ABM init from dmcuRoman Li
[Why] With ABM implemented on DMUB the ABM enablement shoudn't be solely rely on dmcu. Otherwise it won't work if dmcu is disabled. [How] 1. Decouple dmcub config copy from dmcu iram copy. 2. Set abm connector property if either dmcu or dmub enabled. Signed-off-by: Roman Li <roman.li@amd.com> Reviewed-by: Nicholas Kazlauskas <Nicholas.Kazlauskas@amd.com> Acked-by: Qingqing Zhuo <qingqing.zhuo@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2020-07-21drm/amd/display: Implement AMD VSIF V3Reza Amini
[Why] To support V3 [How] Generate new VSIF for V3 Signed-off-by: Reza Amini <Reza.Amini@amd.com> Reviewed-by: Anthony Koo <Anthony.Koo@amd.com> Acked-by: Qingqing Zhuo <qingqing.zhuo@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2020-07-21drm/amd/display: Add DSC parameters logging to debugfsEryk Brol
[why] Need to add new parameters to debugfs logging so we will know what parameters DSC is using for debug purposes. So we are adding a read function in debugfs to read DSC status registers Signed-off-by: Eryk Brol <eryk.brol@amd.com> Reviewed-by: Mikita Lipski <Mikita.Lipski@amd.com> Acked-by: Qingqing Zhuo <qingqing.zhuo@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2020-07-21drm/amd/display: remove unhelpful 5ms delayAric Cyr
[Why] Scaler vendor confirmed the 5ms was not helpful so no point in keeping it. [How] Revert 5ms delay after setting training pattern. Signed-off-by: Aric Cyr <aric.cyr@amd.com> Reviewed-by: Ashley Thomas <Ashley.Thomas2@amd.com> Acked-by: Qingqing Zhuo <qingqing.zhuo@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2020-07-21drm/amdgpu: do not disable SMU on vm rebootNirmoy Das
For passthrough device, we do baco reset after 1st vm boot so if we disable SMU on 1st VM shutdown baco reset will fail for 2nd vm boot. Signed-off-by: Nirmoy Das <nirmoy.das@amd.com> Acked-by: Evan Quan <evan.quan@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2020-07-21drm/amdgpu: add timeout flush mechanism to update wptr for self interrupt (v2)Chengming Gui
outstanding log reaches threshold will trigger IH ring1/2's wptr reported, that will avoid generating interrupts to ring0 too frequent. But if ring1/2's wptr hasn't been increased for a long time, the outstanding log can't reach threshold so that driver can't get latest wptr info and miss some interrupts. v2: squash in warning fix Signed-off-by: Chengming Gui <Jack.Gui@amd.com> Reviewed-by: Feifei Xu <Feifei.Xu@amd.com> Acked-by: Felix Kuehling <Felix.Kuehling@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2020-07-21drm/amdgpu: enable xgmi support for sienna cichlidJohn Clements
set xgmi support flag suring nv ip init sequence Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com> Signed-off-by: John Clements <john.clements@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2020-07-21drm/amdgpu: load asd for sienna cichlidJohn Clements
do not abort psp asd load sequence for sienna cichlid Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com> Signed-off-by: John Clements <john.clements@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2020-07-21drm/amd/powerplay: tag swSMU code layersEvan Quan
Per designs, the swSMU code is separated into four layers. And the typical calling flow should be like: amdgpu_smu.c -> ${asic}_ppt.c -> smu_v11/12_0.c -> smu_cmn.c. Compile errors will come out for any violations. This can help to prevent cross callings(e.g. amdgpu_smu.c -> ${asic}_ppt.c -> amdgpu_smu.c -> ${asic}_ppt.c) which were common in our code. Signed-off-by: Evan Quan <evan.quan@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2020-07-21drm/amd/powerplay: revise the calling flow on OD table updateEvan Quan
This can eliminate the cross callings and maintain clear code layer. Signed-off-by: Evan Quan <evan.quan@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2020-07-21drm/amd/powerplay: drop unnecessary message support checkEvan Quan
These messages are known to be supported by all ASICs. Signed-off-by: Evan Quan <evan.quan@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2020-07-21drm/amd/powerplay: move SMC message issuing APIs to smu_cmn.cEvan Quan
Considering they can be shared by all ASICs. Signed-off-by: Evan Quan <evan.quan@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2020-07-21drm/amd/powerplay: update the tables init relatedEvan Quan
To avoid cross calling and maintain clear code layer. Signed-off-by: Evan Quan <evan.quan@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2020-07-21drm/amd/powerplay: move table setting common code to smu_cmn.cEvan Quan
As they are shared by all ASICs. Signed-off-by: Evan Quan <evan.quan@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2020-07-21drm/amd/powerplay: maximum code sharing around watermarks settingEvan Quan
Maximum code sharing. Signed-off-by: Evan Quan <evan.quan@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2020-07-21drm/amd/powerplay: move more APIs to smu_cmn.cEvan Quan
Considering they are shared by all ASICs. Signed-off-by: Evan Quan <evan.quan@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2020-07-21drm/amd/powerplay: common API for disabling all features with exceptionEvan Quan
We are moving to centralize all feature enablement/support checking and setting APIs in smu_cmn.c. Signed-off-by: Evan Quan <evan.quan@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2020-07-21drm/amd/powerplay: move ppfeature mask setting to smu_cmn.cEvan Quan
Considering they are shared by all ASICs. And we are moving to centralize all feature enablement/support checking and setting APIs in smu_cmn.c. Signed-off-by: Evan Quan <evan.quan@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2020-07-21drm/amd/powerplay: implement smu_cmn_get_enabled_mask() for all ASICsEvan Quan
Instead of having each for smu v11 and v12. Signed-off-by: Evan Quan <evan.quan@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2020-07-21drm/amd/powerplay: move dpm feature enablement checking to smu_cmn.cEvan Quan
Considering it is shared by all ASICs and smu_cmn.c should be the right place. Signed-off-by: Evan Quan <evan.quan@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2020-07-21drm/amd/powerplay: move dpm feature support checking to smu_cmn.cEvan Quan
Considering it is shared by all ASICs and smu_cmn.c should be the right place. Signed-off-by: Evan Quan <evan.quan@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2020-07-21drm/amd/powerplay: move clock dpm enablement check to smu_v11/v12Evan Quan
As those APIs of smu_v11/v12 are more widely called. And they need this check also. Signed-off-by: Evan Quan <evan.quan@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2020-07-21drm/amd/powerplay: drop unused codeEvan Quan
Those code were obsoleted by new common API smu_cmn_to_asic_specific_index(). Signed-off-by: Evan Quan <evan.quan@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2020-07-21drm/amd/powerplay: unify swSMU index to asic specific index mappingEvan Quan
By this we can drop redundant code. Signed-off-by: Evan Quan <evan.quan@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2020-07-21drm/amd/powerplay: widely share the API for data table retrievingEvan Quan
Considering the data table retrieving can be more widely shared, amdgpu_atombios.c is the right place. Signed-off-by: Evan Quan <evan.quan@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2020-07-21drm/amdgpu: add read amdgpu_gfxoff status in debugfsJinzhou.Su
Add interface for SMU12 device, used by UMR. v2: fix code style Signed-off-by: Jinzhou.Su <Jinzhou.Su@amd.com> Reviewed-by: Evan Quan <evan.quan@amd.com> Reviewed-by: Huang Rui <ray.huang@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2020-07-21drm/amdgpu: load ta firmware for sienna cichlidBhawanpreet Lakha
call psp_int_ta_microcode() to parse the ta firmware. Signed-off-by: Bhawanpreet Lakha <Bhawanpreet.Lakha@amd.com> Reviewed-by: John Clements <John.Clements@amd.com> Acked-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2020-07-21drm/amd/powerplay: suppress compile error around BUG_ONEvan Quan
To suppress the compile error below for "ARCH=arc". drivers/gpu/drm/amd/amdgpu/../powerplay/arcturus_ppt.c: In function 'arcturus_fill_eeprom_i2c_req': >> arch/arc/include/asm/bug.h:22:2: error: implicit declaration of function 'pr_warn'; did you mean 'pci_warn'? [-Werror=implicit-function-declaration] 22 | pr_warn("BUG: failure at %s:%d/%s()!\n", __FILE__, __LINE__, __func__); \ | ^~~~~~~ include/asm-generic/bug.h:62:57: note: in expansion of macro 'BUG' 62 | #define BUG_ON(condition) do { if (unlikely(condition)) BUG(); } while (0) | ^~~ drivers/gpu/drm/amd/amdgpu/../powerplay/arcturus_ppt.c:2157:2: note: in expansion of macro 'BUG_ON' 2157 | BUG_ON(numbytes > MAX_SW_I2C_COMMANDS); Signed-off-by: Evan Quan <evan.quan@amd.com> Acked-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2020-07-21drm/amdgpu/smu11: drop code chuck that got accidently re-addedAlex Deucher
Seems to be due to a bad merge. Code was originally added in commit 5aaa8fff3aa950 ("drm/amd/powerplay: unload mp1 for Arcturus RAS baco reset") but later removed in commit 7f70443fd83407 ("drm/amdgpu: set mp1 state before reload"). but is back again. Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2020-07-21dt-binding: display: Allow a single port node on rocktech, jh057n00900Ondrej Jirman
The display has one port. Allow it in the binding. Reviewed-by: Rob Herring <robh@kernel.org> Reviewed-by: Guido Günther <agx@sigxcpu.org> Signed-off-by: Ondrej Jirman <megous@megous.com> Signed-off-by: Rob Herring <robh@kernel.org> Link: https://patchwork.freedesktop.org/patch/msgid/20200703114717.2140832-3-megous@megous.com
2020-07-21dt-bindings: display: Fix example in nwl-dsi.yamlOndrej Jirman
The example is now validated against rocktech,jh057n00900 schema that was ported to yaml, and didn't validate with: - '#address-cells', '#size-cells', 'port@0' do not match any of the regexes: 'pinctrl-[0-9]+' - 'vcc-supply' is a required property - 'iovcc-supply' is a required property - 'reset-gpios' is a required property Fix it. Reviewed-by: Rob Herring <robh@kernel.org> Reviewed-by: Guido Günther <agx@sigxcpu.org> Signed-off-by: Ondrej Jirman <megous@megous.com> Signed-off-by: Rob Herring <robh@kernel.org> Link: https://patchwork.freedesktop.org/patch/msgid/20200703114717.2140832-2-megous@megous.com
2020-07-21drm/vblank: Use spin_(un)lock_irq() in drm_crtc_queue_sequence_ioctl()Lyude Paul
This is an ioctl callback, so we're guaranteed to have IRQs enabled when calling this function. Use the plain _irq() variants of spin_(un)lock() to make this more obvious. Signed-off-by: Lyude Paul <lyude@redhat.com> Cc: Daniel Vetter <daniel@ffwll.ch> Link: https://patchwork.freedesktop.org/patch/msgid/20200720190736.180297-6-lyude@redhat.com Reviewed-by: Daniel Vetter <daniel.vetter@ffwll.ch>
2020-07-21drm/vblank: Use spin_(un)lock_irq() in drm_queue_vblank_event()Lyude Paul
This one's easy - we're already calling kzalloc(GFP_KERNEL) in this function, so we must already be guaranteed to have IRQs enabled when calling this. So, use the plain _irq() variants of spin_(un)lock() to make this more obvious. Signed-off-by: Lyude Paul <lyude@redhat.com> Cc: Daniel Vetter <daniel@ffwll.ch> Reviewed-by: Daniel Vetter <daniel.vetter@ffwll.ch> Link: https://patchwork.freedesktop.org/patch/msgid/20200720190736.180297-5-lyude@redhat.com
2020-07-21drm/vblank: Use spin_(un)lock_irq() in drm_legacy_vblank_post_modeset()Lyude Paul
This function is only ever called from ioctl context, so we're guaranteed to have interrupts enabled. Stop using the irqsave/irqrestore variants of spin_(un)lock_irq() to make this more obvious. Signed-off-by: Lyude Paul <lyude@redhat.com> Cc: Daniel Vetter <daniel@ffwll.ch> Link: https://patchwork.freedesktop.org/patch/msgid/20200720190736.180297-4-lyude@redhat.com Reviewed-by: Daniel Vetter <daniel.vetter@ffwll.ch>
2020-07-21drm/vblank: Use spin_(un)lock_irq() in drm_crtc_vblank_on()Lyude Paul
This is only called from: * Atomic modesetting hooks * Module probing routines * Legacy modesetting hooks All of which have IRQs enabled, so we can also get rid of irqsave/restore here to make the IRQ context of this function more obvious. Signed-off-by: Lyude Paul <lyude@redhat.com> Cc: Daniel Vetter <daniel@ffwll.ch> Link: https://patchwork.freedesktop.org/patch/msgid/20200720190736.180297-3-lyude@redhat.com Reviewed-by: Daniel Vetter <daniel.vetter@ffwll.ch>
2020-07-21drm/vblank: Use spin_(un)lock_irq() in drm_crtc_vblank_reset()Lyude Paul
All of the drivers in the kernel tree only call this from one of the following contexts: * drm_crtc_funcs->reset * During initial module load Since both of these contexts are guaranteed to have interrupts enabled beforehand, there's no need to use the irqsave/irqrestore variants of spin_(un)lock(). So, fix this to make the irq context of this function more obvious. Signed-off-by: Lyude Paul <lyude@redhat.com> Cc: Daniel Vetter <daniel@ffwll.ch> Link: https://patchwork.freedesktop.org/patch/msgid/20200720190736.180297-2-lyude@redhat.com Reviewed-by: Daniel Vetter <daniel.vetter@ffwll.ch>
2020-07-21drm/qxl: stop using TTM_MEMTYPE_FLAG_MAPPABLE v2Christian König
The driver doesn't expose any not-mapable memory resources. v2: remove unused man variable as well Signed-off-by: Christian König <christian.koenig@amd.com> Reviewed-by: Daniel Vetter <daniel.vetter@ffwll.ch> Link: https://patchwork.freedesktop.org/patch/378246/
2020-07-21drm/nouveau: stop using TTM_MEMTYPE_FLAG_MAPPABLEChristian König
The driver doesn't expose any not-mapable memory resources. Signed-off-by: Christian König <christian.koenig@amd.com> Reviewed-by: Daniel Vetter <daniel.vetter@ffwll.ch> Link: https://patchwork.freedesktop.org/patch/378244/
2020-07-21drm/vmwgfx: stop using TTM_MEMTYPE_FLAG_MAPPABLEChristian König
The driver doesn't expose any not-mapable memory resources. Signed-off-by: Christian König <christian.koenig@amd.com> Reviewed-by: Thomas Zimmermann <tzimmermann@suse.de> Reviewed-by: Daniel Vetter <daniel.vetter@ffwll.ch> Link: https://patchwork.freedesktop.org/patch/378241/
2020-07-21drm/ttm: remove TTM_MEMTYPE_FLAG_CMAChristian König
The original intention was to avoid CPU page table unmaps when BOs move between the GTT and SYSTEM domain. The problem is that this never correctly handled changes in the caching attributes or backing pages. Just drop this for now and simply unmap the CPU page tables in all cases. Signed-off-by: Christian König <christian.koenig@amd.com> Reviewed-by: Daniel Vetter <daniel.vetter@ffwll.ch> Link: https://patchwork.freedesktop.org/patch/378240/
2020-07-21drm/ttm: cleanup coding style and implementation.Christian König
Only functional change is to always keep io_reserved_count up to date for debugging even when it is not used otherwise. Signed-off-by: Christian König <christian.koenig@amd.com> Reviewed-by: Daniel Vetter <daniel.vetter@ffwll.ch> Link: https://patchwork.freedesktop.org/patch/378242/
generated by cgit (git 2.34.1) at 2025-09-15 19:16:06 +0000