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2020-03-27iwlwifi: add HW step to new cfg device tableLuca Coelho
We need to use different firmware versions for different HW steps with certain devices. Prepare for this differentiation by adding HW step to the new device table. Change-Id: Ib1afb7b0c89e9dc2d26e6d32ea19e978c17ba1dd Signed-off-by: Luca Coelho <luciano.coelho@intel.com>
2020-03-27iwlwifi: remove some unused extern declarations from iwl-config.hLuca Coelho
After the refactoring, a few extern declarations were accidentally left in the iwl-config.h file. Remove them Change-Id: I79745e440ed5a0a90db61b0daaae374ecef09e86 Signed-off-by: Luca Coelho <luciano.coelho@intel.com>
2020-03-27iwlwifi: move integrated, extra_phy and soc_latency to trans_cfgLuca Coelho
These values are selected based on the PCI device ID, so the decision to use them can be made early. By moving them to the trans_cfg, we avoid duplicating the large cfg structs for small pieces of data (sometimes a single boolean). This will also allow us to make more decisions based on, for instance, the SoC type in used. The trans_cfg concept changes a bit, because previously it was used only to boot the device before reading further characteristics and now it also contains more data that is associated with the device ID. Change-Id: Ib71b07ea9e322eb74571dc5e8aa58f17eece5c9c Signed-off-by: Luca Coelho <luciano.coelho@intel.com>
2020-03-27iwlwifi: mvm: enable SF also when we have HEJohannes Berg
We shouldn't do this just for HT/VHT, but be future-proof and also check for HE. Change-Id: Icaeff714c00a773681dbfee72558afd1c7121c5d Signed-off-by: Johannes Berg <johannes.berg@intel.com> Signed-off-by: Luca Coelho <luciano.coelho@intel.com>
2020-03-27iwlwifi: remove redundant iwl9560_2ac_cfg structLuca Coelho
The iwl9560_2ac_cfg struct is used for PNJ devices and the configuration is the same as iwl9260_2ac_cfg, so we can remove the former to avoid redundancy. Change-Id: I17ac1802f00bd80006930b922a9fc21df60e3c16 Signed-off-by: Luca Coelho <luciano.coelho@intel.com>
2020-03-27iwlwifi: mvm: rs-fw: fix some indentationJohannes Berg
That closing brace for the switch statement is misplaced, fix it. Change-Id: I39af135a9e3fc64337d2cced43a70cb48fe3b9c1 Signed-off-by: Johannes Berg <johannes.berg@intel.com> Signed-off-by: Luca Coelho <luciano.coelho@intel.com>
2020-03-27iwlwifi: scan: support scan req cmd ver 14Shahar S Matityahu
Modify adaptive dwell number of APs override API Instead of using channel to index mapping, add the adaptive dwell override parameters as part of the configuration per channel in the scan request command. Support 2 different override values and use them as follows: 1. 10 APs for friendly GO channels in p2p scan. 2. 2 APs for social channels in p2p scan. Change-Id: I3b461108abf2306c3d054099112f2c3afce1cc92 Signed-off-by: Shahar S Matityahu <shahar.s.matityahu@intel.com> Signed-off-by: Luca Coelho <luciano.coelho@intel.com>
2020-03-27iwlwifi: pass trans and NVM data to HE capability parsingJohannes Berg
We'll need this data in the future, pass the values. Change-Id: Iaeff50716e783f5c0bcea86ca1c93ada1560525e Signed-off-by: Johannes Berg <johannes.berg@intel.com> Signed-off-by: Luca Coelho <luciano.coelho@intel.com>
2020-03-27iwlwifi: pcie: implement read_config32Luca Coelho
Add the read_config32 op to allow dumping the config space when needed. Change-Id: Ib2d254a38a4bfb95dcc3d04eec91781827a0c623 Signed-off-by: Luca Coelho <luciano.coelho@intel.com>
2020-03-27iwlwifi: yoyo: add PCI config space region typeLuca Coelho
Add a new region type that allows us to dump the PCI config space. This is mostly the same as dumping a memory region, but reading from the device's config space instead. In order to make this generic and independent of the trans type, we make a function called iwl_dump_ini_config_iter() that calls a new op in the transport to read its config space. Change-Id: I15151bddf589f13b0e0a45c28b96bbcd73bcfdeb Signed-off-by: Luca Coelho <luciano.coelho@intel.com>
2020-03-27iwlwifi: mvm: add soc latency supportShahar S Matityahu
Some devices require longer time to stabilize the power and XTAL. This is especially true for devices integrated in the SoC. Add support for a new firmware API that allows the driver to set the latency value accordingly. Change-Id: I6829a46b89e4e701f80a0e4033f4dd41ee44ed12 Signed-off-by: Shahar S Matityahu <shahar.s.matityahu@intel.com> Signed-off-by: Luca Coelho <luciano.coelho@intel.com>
2020-03-26Merge branch 'for-linus' of ↵Linus Torvalds
git://git.kernel.org/pub/scm/linux/kernel/git/dtor/input Pull input fixes from Dmitry Torokhov: - a fix to generate proper timestamps on key autorepeat events that were broken recently - a fix for Synaptics driver to only activate reduced reporting mode when explicitly requested - a new keycode for "selective screenshot" function - other assorted fixes * 'for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/dtor/input: Input: fix stale timestamp on key autorepeat events Input: move the new KEY_SELECTIVE_SCREENSHOT keycode Input: avoid BIT() macro usage in the serio.h UAPI header Input: synaptics-rmi4 - set reduced reporting mode only when requested Input: synaptics - enable RMI on HP Envy 13-ad105ng Input: allocate keycode for "Selective Screenshot" key Input: tm2-touchkey - add support for Coreriver TC360 variant dt-bindings: input: add Coreriver TC360 binding dt-bindings: vendor-prefixes: Add Coreriver vendor prefix Input: raydium_i2c_ts - fix error codes in raydium_i2c_boot_trigger()
2020-03-26net: phy: don't touch suspended flag if there's no suspend/resume callbackHeiner Kallweit
So far we set phydev->suspended to true in phy_suspend() even if the PHY driver doesn't implement the suspend callback. This applies accordingly for the resume path. The current behavior doesn't cause any issue I'd be aware of, but it's not logical and misleading, especially considering the description of the flag: "suspended: Set to true if this phy has been suspended successfully" Signed-off-by: Heiner Kallweit <hkallweit1@gmail.com> Reviewed-by: Andrew Lunn <andrew@lunn.ch> Reviewed-by: Florian Fainelli <f.fainelli@gmail.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2020-03-26net: ks8851-ml: Fix IO operations, againMarek Vasut
This patch reverts 58292104832f ("net: ks8851-ml: Fix 16-bit IO operation") and edacb098ea9c ("net: ks8851-ml: Fix 16-bit data access"), because it turns out these were only necessary due to buggy hardware. This patch adds a check for such a buggy hardware to prevent any such mistakes again. While working further on the KS8851 driver, it came to light that the KS8851-16MLL is capable of switching bus endianness by a hardware strap, EESK pin. If this strap is incorrect, the IO accesses require such endian swapping as is being reverted by this patch. Such swapping also impacts the performance significantly. Hence, in addition to removing it, detect that the hardware is broken, report to user, and fail to bind with such hardware. Fixes: 58292104832f ("net: ks8851-ml: Fix 16-bit IO operation") Fixes: edacb098ea9c ("net: ks8851-ml: Fix 16-bit data access") Signed-off-by: Marek Vasut <marex@denx.de> Cc: David S. Miller <davem@davemloft.net> Cc: Lukas Wunner <lukas@wunner.de> Cc: Petr Stetiar <ynezz@true.cz> Cc: YueHaibing <yuehaibing@huawei.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2020-03-26Merge branch 'net-atlantic-MACSec-support-for-AQC-devices'David S. Miller
Igor Russkikh says: ==================== net: atlantic: MACSec support for AQC devices This patchset introduces MACSec HW offloading support in Marvell(Aquantia) AQC atlantic driver. This implementation is a joint effort of Marvell developers on top of the work started by Antoine Tenart. v2: * clean up the generated code (removed useless bit operations); * use WARN_ONCE to avoid log spam; * use put_unaligned_be64; * removed trailing \0 and length limit for format strings; v1: https://patchwork.ozlabs.org/cover/1259998/ RFC v2: https://patchwork.ozlabs.org/cover/1252204/ RFC v1: https://patchwork.ozlabs.org/cover/1238082/ Several patches introduce backward-incompatible changes and are subject for discussion/drop: 1) patch 0007: multicast/broadcast when offloading is needed to handle ARP requests, because they have broadcast destination address; With this patch we also match and encrypt/decrypt packets between macsec hw and realdev based on device's mac address. This can potentially be used to support multiple macsec offloaded interfaces on top of one realdev. However in some environments this could lead to problems, e.g. the 'bridge over macsec' configuration will expect the packets with unknown src MAC should come through macsec. The patch is questionable, we've used it because our current hw setup and requirements both assume that the decryption is done based on mac address match only. This could be changed by encrypting/decripting all the traffic (except control). 2) patch 0009: real_dev features are now propagated to macsec device (when HW offloading is enabled), otherwise feature set might lead to HW reconfiguration during MACSec configuration. Also, HW offloaded macsec should be able to keep LRO LSO features, since they are transparent for macsec engine (at least in our hardware). ==================== Signed-off-by: David S. Miller <davem@davemloft.net>
2020-03-26net: atlantic: add XPN handlingMark Starovoytov
This patch adds XPN handling. Our driver doesn't support XPN, but we should still update a couple of places in the code, because the size of 'next_pn' field has changed. Signed-off-by: Mark Starovoytov <mstarovoitov@marvell.com> Signed-off-by: Igor Russkikh <irusskikh@marvell.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2020-03-26net: atlantic: MACSec offload statistics implementationDmitry Bogdanov
This patch adds support for MACSec statistics on Atlantic network cards. Signed-off-by: Dmitry Bogdanov <dbogdanov@marvell.com> Signed-off-by: Mark Starovoytov <mstarovoitov@marvell.com> Signed-off-by: Igor Russkikh <irusskikh@marvell.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2020-03-26net: atlantic: MACSec offload statistics HW bindingsDmitry Bogdanov
This patch adds the Atlantic HW-specific bindings for MACSec statistics, e.g. register addresses / structs, helper function, etc, which will be used by actual callback implementations. Signed-off-by: Dmitry Bogdanov <dbogdanov@marvell.com> Signed-off-by: Mark Starovoytov <mstarovoitov@marvell.com> Signed-off-by: Igor Russkikh <irusskikh@marvell.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2020-03-26net: atlantic: MACSec ingress offload implementationMark Starovoytov
This patch adds support for MACSec ingress HW offloading on Atlantic network cards. Signed-off-by: Mark Starovoytov <mstarovoitov@marvell.com> Signed-off-by: Igor Russkikh <irusskikh@marvell.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2020-03-26net: atlantic: MACSec ingress offload HW bindingsMark Starovoytov
This patch adds the Atlantic HW-specific bindings for MACSec ingress, e.g. register addresses / structs, helper function, etc, which will be used by actual callback implementations. Signed-off-by: Mark Starovoytov <mstarovoitov@marvell.com> Signed-off-by: Igor Russkikh <irusskikh@marvell.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2020-03-26net: atlantic: MACSec egress offload implementationDmitry Bogdanov
This patch adds support for MACSec egress HW offloading on Atlantic network cards. Signed-off-by: Dmitry Bogdanov <dbogdanov@marvell.com> Signed-off-by: Mark Starovoytov <mstarovoitov@marvell.com> Signed-off-by: Igor Russkikh <irusskikh@marvell.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2020-03-26net: atlantic: MACSec egress offload HW bindingsDmitry Bogdanov
This patch adds the Atlantic HW-specific bindings for MACSec egress, e.g. register addresses / structs, helper function, etc, which will be used by actual callback implementations. Signed-off-by: Dmitry Bogdanov <dbogdanov@marvell.com> Signed-off-by: Mark Starovoytov <mstarovoitov@marvell.com> Signed-off-by: Igor Russkikh <irusskikh@marvell.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2020-03-26net: atlantic: MACSec offload skeletonDmitry Bogdanov
This patch adds basic functionality for MACSec offloading for Atlantic NICs. MACSec offloading functionality is enabled if network card has appropriate FW that has MACSec offloading enabled in config. Actual functionality (ingress, egress, etc) will be added in follow-up patches. Signed-off-by: Dmitry Bogdanov <dbogdanov@marvell.com> Signed-off-by: Mark Starovoytov <mstarovoitov@marvell.com> Signed-off-by: Igor Russkikh <irusskikh@marvell.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2020-03-26net: macsec: report real_dev features when HW offloading is enabledMark Starovoytov
This patch makes real_dev_feature propagation by MACSec offloaded device. Issue description: real_dev features are disabled upon macsec creation. Root cause: Features limitation (specific to SW MACSec limitation) is being applied to HW offloaded case as well. This causes 'set_features' request on the real_dev with reduced feature set due to chain propagation. Proposed solution: Report real_dev features when HW offloading is enabled. NB! MACSec offloaded device does not propagate VLAN offload features at the moment. This can potentially be added later on as a separate patch. Note: this patch requires HW offloading to be enabled by default in order to function properly. Signed-off-by: Mark Starovoytov <mstarovoitov@marvell.com> Signed-off-by: Igor Russkikh <irusskikh@marvell.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2020-03-26net: macsec: add support for getting offloaded statsDmitry Bogdanov
When HW offloading is enabled, offloaded stats should be used, because s/w stats are wrong and out of sync with the HW in this case. Signed-off-by: Dmitry Bogdanov <dbogdanov@marvell.com> Signed-off-by: Mark Starovoytov <mstarovoitov@marvell.com> Signed-off-by: Igor Russkikh <irusskikh@marvell.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2020-03-26net: macsec: support multicast/broadcast when offloadingMark Starovoytov
The idea is simple. If the frame is an exact match for the controlled port (based on DA comparison), then we simply divert this skb to matching port. Multicast/broadcast messages are delivered to all ports. Signed-off-by: Mark Starovoytov <mstarovoitov@marvell.com> Signed-off-by: Igor Russkikh <irusskikh@marvell.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2020-03-26net: macsec: allow multiple macsec devices with offloadDmitry Bogdanov
Offload engine can setup several SecY. Each macsec interface shall have its own mac address. It will filter a traffic by dest mac address. Signed-off-by: Dmitry Bogdanov <dbogdanov@marvell.com> Signed-off-by: Mark Starovoytov <mstarovoitov@marvell.com> Signed-off-by: Igor Russkikh <irusskikh@marvell.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2020-03-26net: macsec: init secy pointer in macsec_contextDmitry Bogdanov
This patch adds secy pointer initialization in the macsec_context. It will be used by MAC drivers in offloading operations. Signed-off-by: Dmitry Bogdanov <dbogdanov@marvell.com> Signed-off-by: Mark Starovoytov <mstarovoitov@marvell.com> Signed-off-by: Igor Russkikh <irusskikh@marvell.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2020-03-26net: macsec: add support for offloading to the MACAntoine Tenart
This patch adds a new MACsec offloading option, MACSEC_OFFLOAD_MAC, allowing a user to select a MAC as a provider for MACsec offloading operations. Signed-off-by: Antoine Tenart <antoine.tenart@bootlin.com> Signed-off-by: Mark Starovoytov <mstarovoitov@marvell.com> Signed-off-by: Igor Russkikh <irusskikh@marvell.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2020-03-26net: macsec: allow to reference a netdev from a MACsec contextAntoine Tenart
This patch allows to reference a net_device from a MACsec context. This is needed to allow implementing MACsec operations in net device drivers. Signed-off-by: Antoine Tenart <antoine.tenart@bootlin.com> Signed-off-by: Mark Starovoytov <mstarovoitov@marvell.com> Signed-off-by: Igor Russkikh <irusskikh@marvell.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2020-03-26net: add a reference to MACsec ops in net_deviceAntoine Tenart
This patch adds a reference to MACsec ops to the net_device structure, allowing net device drivers to implement offloading operations for MACsec. Signed-off-by: Antoine Tenart <antoine.tenart@bootlin.com> Signed-off-by: Mark Starovoytov <mstarovoitov@marvell.com> Signed-off-by: Igor Russkikh <irusskikh@marvell.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2020-03-26net: introduce the MACSEC netdev featureAntoine Tenart
This patch introduce a new netdev feature, which will be used by drivers to state they can perform MACsec transformations in hardware. The patchset was gathered by Mark, macsec functinality itself was implemented by Dmitry, Mark and Pavel Belous. Signed-off-by: Antoine Tenart <antoine.tenart@bootlin.com> Signed-off-by: Mark Starovoytov <mstarovoitov@marvell.com> Signed-off-by: Igor Russkikh <irusskikh@marvell.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2020-03-26taprio: do not use BIT() in TCA_TAPRIO_ATTR_FLAG_* definitionsEugene Syromiatnikov
BIT() macro definition is internal to the Linux kernel and is not to be used in UAPI headers; replace its usage with the _BITUL() macro that is already used elsewhere in the header. Fixes: 9c66d1564676 ("taprio: Add support for hardware offloading") Signed-off-by: Eugene Syromiatnikov <esyr@redhat.com> Acked-by: Vladimir Oltean <vladimir.oltean@nxp.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2020-03-26ipv6: ndisc: add support for 'PREF64' dns64 prefix identifierMaciej Żenczykowski
This is trivial since we already have support for the entirely identical (from the kernel's point of view) RDNSS, DNSSL, etc. that also contain opaque data that needs to be passed down to userspace for further processing. As specified in draft-ietf-6man-ra-pref64-09 (while it is still a draft, it is purely waiting on the RFC Editor for cleanups and publishing): PREF64 option contains lifetime and a (up to) 96-bit IPv6 prefix. The 8-bit identifier of the option type as assigned by the IANA is 38. Since we lack DNS64/NAT64/CLAT support in kernel at the moment, thus this option should also be passed on to userland. See: https://tools.ietf.org/html/draft-ietf-6man-ra-pref64-09 https://www.iana.org/assignments/icmpv6-parameters/icmpv6-parameters.xhtml#icmpv6-parameters-5 Cc: Erik Kline <ek@google.com> Cc: Jen Linkova <furry@google.com> Cc: Lorenzo Colitti <lorenzo@google.com> Cc: Michael Haro <mharo@google.com> Signed-off-by: Maciej Żenczykowski <maze@google.com> Acked-By: Lorenzo Colitti <lorenzo@google.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2020-03-27Merge tag 'amd-drm-fixes-5.6-2020-03-26' of ↵Dave Airlie
git://people.freedesktop.org/~agd5f/linux into drm-fixes amd-drm-fixes-5.6-2020-03-26: Scheduler: - Fix a race condition that could result in a segfault Signed-off-by: Dave Airlie <airlied@redhat.com> From: Alex Deucher <alexdeucher@gmail.com> Link: https://patchwork.freedesktop.org/patch/msgid/20200326144538.3937-1-alexander.deucher@amd.com
2020-03-26Merge branch 'net-ethernet-ti-add-networking-support-for-k3-am65x-j721e-soc'David S. Miller
Grygorii Strashko says: ==================== net: ethernet: ti: add networking support for k3 am65x/j721e soc This v6 series adds basic networking support support TI K3 AM654x/J721E SoC which have integrated Gigabit Ethernet MAC (Media Access Controller) into device MCU domain and named MCU_CPSW0 (CPSW2G NUSS). Formally TRMs refer CPSW2G NUSS as two-port Gigabit Ethernet Switch subsystem with port 0 being the CPPI DMA host port and port 1 being the external Ethernet port, but for 1 external port device it's just Port 0 <-> ALE <-> Port 1 and it's rather device with HW filtering capabilities then actually switching device. It's expected to have similar devices, but with more external ports. The new Host port 0 Communications Port Programming Interface (CPPI5) is operating by TI AM654x/J721E NAVSS Unified DMA Peripheral Root Complex (UDMA-P) controller [1]. The CPSW2G contains below modules for which existing code is re-used: - MAC SL: cpsw_sl.c - Address Lookup Engine (ALE): cpsw_ale.c, basically compatible with K2 66AK2E/G - Management Data Input/Output interface (MDIO): davinci_mdio.c, fully compatible with TI AM3/4/5 devices Basic features supported by CPSW2G NUSS driver: - VLAN support, 802.1Q compliant, Auto add port VLAN for untagged frames on ingress, Auto VLAN removal on egress and auto pad to minimum frame size. - multicast filtering - promisc mode - TX multiq support in Round Robin or Fixed priority modes - RX checksum offload for non-fragmented IPv4/IPv6 TCP/UDP packets - TX checksum offload support for IPv4/IPv6 TCP/UDP packets (J721E only). Features under development: - Support for IEEE 1588 Clock Synchronization. The CPSW2G NUSS includes new version of Common Platform Time Sync (CPTS) - tc-mqprio: priority level Quality Of Service (QOS) support (802.1p) - tc-cbs: Support for Audio/Video Bridging (P802.1Qav/D6.0) HW shapers - tc-taprio: IEEE 802.1Qbv/D2.2 Enhancements for Scheduled Traffic - frame preemption: IEEE P902.3br/D2.0 Interspersing Express Traffic, 802.1Qbu - extended ALE features: classifier/policers, auto-aging Patches 1-6 are intended for netdev, Patches 7-11 are intended for K3 Platform tree and provided here for testing purposes. Changes in v6: - fixed comments from Rob Herring <robh@kernel.org> and added his Reviewed-by. - added Tested-by: Peter Ujfalusi <peter.ujfalusi@ti.com> Changes in v5: - renamed files k3-udma-desc-pool.* k3-udma-desc-pool to k3-cppi-desc-pool.*, and API to k3_cppi_desc_pool_* as requested by Peter Ujfalusi <peter.ujfalusi@ti.com> - fixed copy-paste err in am65_cpsw_nuss_ndo_slave_set_rx_mode() which blocked recieving of mcast frames. - added Tested-by: Murali Karicheri <m-karicheri2@ti.com> Changes in v4: - fixed minor comments from Jakub Kicinski <kuba@kernel.org> - dependencies resolved: required phy-rmii-sel changes [2] queued for merge except one [3] which is included in this series with Kishon's ask. Changes in v3: - add ARM64 defconfig changes for testing purposes - fixed DT yaml definition - fixed comments from Jakub Kicinski <kuba@kernel.org> Changes in v2: - fixed DT yaml definition - fixed comments from David Miller v5: https://patchwork.ozlabs.org/cover/1258295/ v4: https://patchwork.ozlabs.org/cover/1256092/ v3: https://patchwork.ozlabs.org/cover/1254568/ v2: https://patchwork.ozlabs.org/cover/1250674/ v1: https://lwn.net/Articles/813087/ TRMs: AM654: http://www.ti.com/lit/ug/spruid7e/spruid7e.pdf J721E: http://www.ti.com/lit/ug/spruil1a/spruil1a.pdf Preliminary documentation can be found at: http://software-dl.ti.com/processor-sdk-linux/esd/docs/latest/linux/Foundational_Components/Kernel/Kernel_Drivers/Network/K3_CPSW2g.html [1] https://lwn.net/Articles/808030/ [2] https://lkml.org/lkml/2020/2/22/100 [3] https://lkml.org/lkml/2020/3/3/724 ==================== Signed-off-by: David S. Miller <davem@davemloft.net>
2020-03-26arm64: defconfig: ti: k3: enable dma and networkingGrygorii Strashko
Enable TI K3 AM654x/J721E DMA and networking options. Signed-off-by: Grygorii Strashko <grygorii.strashko@ti.com> Tested-by: Murali Karicheri <m-karicheri2@ti.com> Tested-by: Peter Ujfalusi <peter.ujfalusi@ti.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2020-03-26arm64: dts: ti: k3-j721e-common-proc-board: add mcu cpsw nuss pinmux and phy ↵Grygorii Strashko
defs The TI J721E EVM base board has TI DP83867 PHY connected to external CPSW NUSS Port 1 in rgmii-rxid mode. Hence, add pinmux and Ethernet PHY configuration for TI j721e SoC MCU Gigabit Ethernet two ports Switch subsystem (CPSW NUSS). Signed-off-by: Grygorii Strashko <grygorii.strashko@ti.com> Tested-by: Murali Karicheri <m-karicheri2@ti.com> Tested-by: Peter Ujfalusi <peter.ujfalusi@ti.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2020-03-26arm64: dts: ti: k3-j721e-mcu: add mcu cpsw nuss nodeGrygorii Strashko
Add DT node for The TI J721E MCU SoC Gigabit Ethernet subsystem (MCU CPSW NUSS). Signed-off-by: Grygorii Strashko <grygorii.strashko@ti.com> Tested-by: Murali Karicheri <m-karicheri2@ti.com> Tested-by: Peter Ujfalusi <peter.ujfalusi@ti.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2020-03-26arm64: dts: k3-am654-base-board: add mcu cpsw nuss pinmux and phy defsGrygorii Strashko
AM654 EVM base board has TI DP83867 PHY connected to external CPSW NUSS Port 1 in rgmii-rxid mode. Hence, add pinmux and Ethernet PHY configuration for TI am654 SoC Gigabit Ethernet two ports Switch subsystem (CPSW NUSS). Signed-off-by: Grygorii Strashko <grygorii.strashko@ti.com> Tested-by: Murali Karicheri <m-karicheri2@ti.com> Tested-by: Peter Ujfalusi <peter.ujfalusi@ti.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2020-03-26arm64: dts: ti: k3-am65-mcu: add cpsw nuss nodeGrygorii Strashko
Add DT node for the TI AM65x SoC Gigabit Ethernet two ports Switch subsystem (CPSW NUSS). Signed-off-by: Grygorii Strashko <grygorii.strashko@ti.com> Tested-by: Murali Karicheri <m-karicheri2@ti.com> Tested-by: Peter Ujfalusi <peter.ujfalusi@ti.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2020-03-26net: ethernet: ti: introduce am65x/j721e gigabit eth subsystem driverGrygorii Strashko
The TI AM65x/J721E SoCs Gigabit Ethernet Switch subsystem (CPSW2G NUSS) has two ports - One Ethernet port (port 1) with selectable RGMII and RMII interfaces and an internal Communications Port Programming Interface (CPPI) port (Host port 0) and with ALE in between. It also contains - Management Data Input/Output (MDIO) interface for physical layer device (PHY) management; - Updated Address Lookup Engine (ALE) module; - (TBD) New version of Common platform time sync (CPTS) module. On the TI am65x/J721E SoCs CPSW NUSS Ethernet subsystem into device MCU domain named MCU_CPSW0. Host Port 0 CPPI Packet Streaming Interface interface supports 8 TX channels and one RX channels operating by TI am654 NAVSS Unified DMA Peripheral Root Complex (UDMA-P) controller. Introduced driver provides standard Linux net_device to user space and supports: - ifconfig up/down - MAC address configuration - ethtool operation: --driver --change --register-dump --negotiate phy --statistics --set-eee phy --show-ring --show-channels --set-channels - net_device ioctl mii-control - promisc mode - rx checksum offload for non-fragmented IPv4/IPv6 TCP/UDP packets. The CPSW NUSS can verify IPv4/IPv6 TCP/UDP packets checksum and fills csum information for each packet in psdata[2] word: - BIT(16) CHECKSUM_ERROR - indicates csum error - BIT(17) FRAGMENT - indicates fragmented packet - BIT(18) TCP_UDP_N - Indicates TCP packet was detected - BIT(19) IPV6_VALID, BIT(20) IPV4_VALID - indicates IPv6/IPv4 packet - BIT(15, 0) CHECKSUM_ADD - This is the value that was summed during the checksum computation. This value is FFFFh for non fragmented IPV4/6 UDP/TCP packets with no checksum error. RX csum offload can be disabled: ethtool -K <dev> rx-checksum on|off - tx checksum offload support for IPv4/IPv6 TCP/UDP packets (J721E only). TX csum HW offload can be enabled/disabled: ethtool -K <dev> tx-checksum-ip-generic on|off - multiq and switch between round robin/prio modes for cppi tx queues by using Netdev private flag "p0-rx-ptype-rrobin" to switch between Round Robin and Fixed priority modes: # ethtool --show-priv-flags eth0 Private flags for eth0: p0-rx-ptype-rrobin: on # ethtool --set-priv-flags eth0 p0-rx-ptype-rrobin off Number of TX DMA channels can be changed using "ethtool -L eth0 tx <N>". - GRO support: the napi_gro_receive() and napi_complete_done() are used. Signed-off-by: Grygorii Strashko <grygorii.strashko@ti.com> Tested-by: Murali Karicheri <m-karicheri2@ti.com> Tested-by: Peter Ujfalusi <peter.ujfalusi@ti.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2020-03-26dt-binding: ti: am65x: document mcu cpsw nussGrygorii Strashko
Document device tree bindings for The TI AM654x/J721E SoC Gigabit Ethernet MAC (Media Access Controller - CPSW2G NUSS). The CPSW NUSS provides Ethernet packet communication for the device. Signed-off-by: Grygorii Strashko <grygorii.strashko@ti.com> Reviewed-by: Rob Herring <robh@kernel.org> Tested-by: Murali Karicheri <m-karicheri2@ti.com> Tested-by: Peter Ujfalusi <peter.ujfalusi@ti.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2020-03-26net: ethernet: ti: ale: am65: add support for default thread cfgGrygorii Strashko
Add support for default thread configuration for AM65x CPSW NUSS ALE to allow route all ingress packets to one default RX UDMA flow. Signed-off-by: Grygorii Strashko <grygorii.strashko@ti.com> Tested-by: Murali Karicheri <m-karicheri2@ti.com> Tested-by: Peter Ujfalusi <peter.ujfalusi@ti.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2020-03-26net: ethernet: ti: ale: add support for mac-only modeGrygorii Strashko
The new CPSW ALE version, available on TI K3 AM654/J721E SoCs family, allows to switch any external port to MAC only mode. When MAC only mode enabled this port be treated like a MAC port for the host. All traffic received is only sent to the host. The host must direct traffic to this port as the lookup engine will not send traffic to the ports with the p0_maconly bit set and the p0_no_learn also set. If p0_maconly bit is set and the p0_no_learn is not set, the host can send non-directed packets that can be sent to the destination of a MacOnly port. It is also possible that The host can broadcast to all ports including MacOnly ports in this mode. This patch add ALE supprt for MAC only mode. Signed-off-by: Grygorii Strashko <grygorii.strashko@ti.com> Tested-by: Murali Karicheri <m-karicheri2@ti.com> Tested-by: Peter Ujfalusi <peter.ujfalusi@ti.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2020-03-26net: ethernet: ti: ale: fix seeing unreg mcast packets with promisc and ↵Grygorii Strashko
allmulti disabled On AM65xx MCU CPSW2G NUSS and 66AK2E/L NUSS the unregistered multicast packets are still can be received with promisc and allmulti disabled. This happens, because ALE VLAN entries on these SoCs do not contain port masks for reg/unreg mcast packets, but instead store indexes of ALE_VLAN_MASK_MUXx_REG registers which intended for store port masks for reg/unreg mcast packets. ALE VLAN entry:UNREG_MCAST_FLOOD_INDEX -> ALE_VLAN_MASK_MUXx ALE VLAN entry:REG_MCAST_FLOOD_INDEX -> ALE_VLAN_MASK_MUXy The commit b361da837392 ("net: netcp: ale: add proper ale entry mask bits for netcp switch ALE") update ALE code to support such ALE entries, it is always used ALE_VLAN_MASK_MUX0_REG index in ALE VLAN entry for unreg mcast packets mask configuration, which is read-only, at least for AM65xx MCU CPSW2G NUSS and 66AK2E/L NUSS. As result unreg mcast packets are allowed always. Hence, update ALE code to use ALE_VLAN_MASK_MUX1_REG index for ALE VLAN entries to configure unreg mcast port mask. Fixes: b361da837392 ("net: netcp: ale: add proper ale entry mask bits for netcp switch ALE") Signed-off-by: Grygorii Strashko <grygorii.strashko@ti.com> Tested-by: Murali Karicheri <m-karicheri2@ti.com> Tested-by: Peter Ujfalusi <peter.ujfalusi@ti.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2020-03-26phy: ti: gmii-sel: simplify config dependencies between net drivers and gmii phyGrygorii Strashko
The phy-gmii-sel can be only auto selected in Kconfig and now the pretty complex Kconfig dependencies are defined for phy-gmii-sel driver, which also need to be updated every time phy-gmii-sel is re-used for any new networking driver. Simplify Kconfig definition for phy-gmii-sel PHY driver - drop all dependencies and from networking drivers and rely on using 'imply PHY_TI_GMII_SEL' in Kconfig definitions for networking drivers instead. Signed-off-by: Grygorii Strashko <grygorii.strashko@ti.com> Acked-by: Kishon Vijay Abraham I <kishon@ti.com> Tested-by: Murali Karicheri <m-karicheri2@ti.com> Tested-by: Peter Ujfalusi <peter.ujfalusi@ti.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2020-03-26Merge branch 'cls_flower-Use-extack-in-fl_set_key'David S. Miller
Guillaume Nault says: ==================== cls_flower: Use extack in fl_set_key() Add missing extack messages in fl_set_key(), so that users can get more meaningfull error messages when netlink attributes are rejected. Patch 1 also extends extack in tcf_change_indev() (in pkt_cls.h) since this function is used by fl_set_key(). ==================== Signed-off-by: David S. Miller <davem@davemloft.net>
2020-03-26cls_flower: Add extack support for flags keyGuillaume Nault
Pass extack down to fl_set_key_flags() and set message on error. Signed-off-by: Guillaume Nault <gnault@redhat.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2020-03-26cls_flower: Add extack support for src and dst port range optionsGuillaume Nault
Pass extack down to fl_set_key_port_range() and set message on error. Both the min and max ports would qualify as invalid attributes here. Report the min one as invalid, as it's probably what makes the most sense from a user point of view. Signed-off-by: Guillaume Nault <gnault@redhat.com> Signed-off-by: David S. Miller <davem@davemloft.net>
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