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2016-09-10ARM: dts: sun8i: Move A23/A33 usbphy and usb_otg nodes to common dtsiChen-Yu Tsai
The usbphy and usb_otg nodes in the A23 and A33 dts files only differ by compatible, and for the usbphy, the size of one of its register regions. Move all the common bits to the A23/A33 common dtsi file. Signed-off-by: Chen-Yu Tsai <wens@csie.org> Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
2016-09-10ARM: sun8i: a23/a33: Add RGB666 pinsMaxime Ripard
The LCD output needs to be muxed. Add the proper pinctrl node. Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com> Acked-by: Chen-Yu Tsai <wens@csie.org>
2016-09-10ARM: sun8i: a33: Add display pipelineMaxime Ripard
Add all the needed blocks to the A33 DTSI. Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com> Acked-by: Chen-Yu Tsai <wens@csie.org>
2016-09-10ARM: sun8i: Convert the A23 and A33 to the CCUMaxime Ripard
Now that we have support for the CCU driver in sunxi-ng, convert the A23 and A33 DTs to that driver. Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com> Acked-by: Chen-Yu Tsai <wens@csie.org>
2016-09-10ARM: dts: sun6i: switch A31/A31s to new CCU clock bindingsChen-Yu Tsai
Now that we have a different clock representation, switch to it. Signed-off-by: Chen-Yu Tsai <wens@csie.org> Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
2016-09-10Merge branch 'sunxi/clk-for-4.9' into sunxi/dt-for-4.9Maxime Ripard
2016-09-10clk: sunxi-ng: Add hardware dependencyJean Delvare
The sunxi-ng clock driver is useless for other architectures. Signed-off-by: Jean Delvare <jdelvare@suse.de> Acked-by: Stephen Boyd <sboyd@codeaurora.org> Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
2016-09-10clk: sunxi-ng: Add A23 CCUMaxime Ripard
Add support for the clock unit found in the A23. Due to the similarities with the A33, it also shares its clock IDs to allow sharing the DTSI. Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com> Acked-by: Chen-Yu Tsai <wens@csie.org>
2016-09-10clk: sunxi-ng: Add A33 CCU supportMaxime Ripard
This commit introduces the clocks found in the Allwinner A33 CCU. Since this SoC is very similar to the A23, and we share a significant share of the DTSI, the clock IDs that are going to be used will also be shared with the A23, hence the name of the various header files. Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com> Acked-by: Chen-Yu Tsai <wens@csie.org>
2016-09-10clk: sunxi-ng: Add N-class clocks supportMaxime Ripard
Add support for the class with a single factor, N, being a multiplier. Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com> Acked-by: Chen-Yu Tsai <wens@csie.org>
2016-09-10clk: sunxi-ng: mux: Add mux table macroMaxime Ripard
Add a new macro to declare muxes based on a table and a gate. Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com> Acked-by: Chen-Yu Tsai <wens@csie.org>
2016-09-10clk: sunxi-ng: div: Allow to set a maximumMaxime Ripard
Some dividers might have a maximum value that is lower than the width of the register. Add a field to _ccu_div to handle those case properly. If the field is set to 0, the code will assume that the maximum value is the maximum one that can be used with the field register width. Otherwise, we'll use whatever value has been set. Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com> Acked-by: Chen-Yu Tsai <wens@csie.org>
2016-09-10clk: sunxi-ng: div: Add kerneldoc for the _ccu_div structureMaxime Ripard
The internal _ccu_div structure is meant to be embedded into other structures to combine the various dividers and to form the clock classes support. Start to document those structures by using kerneldoc. Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
2016-09-10clk: sunxi-ng: div: Add mux table macrosMaxime Ripard
Add some macros to ease the declaration of clocks that are using them. Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com> Acked-by: Chen-Yu Tsai <wens@csie.org>
2016-09-08arm64: dts: r8a7796: Add GPIO device nodesTakeshi Kihara
Add GPIO device nodes to the DT of the r8a7796 SoC. Signed-off-by: Takeshi Kihara <takeshi.kihara.df@renesas.com> Signed-off-by: Simon Horman <horms+renesas@verge.net.au> Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be> Reviewed-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com> Tested-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
2016-09-08arm64: dts: r8a7796: salvator-x: add serial console pinsUlrich Hecht
Adds pin control for SCIF2. Signed-off-by: Ulrich Hecht <ulrich.hecht+renesas@gmail.com> Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2016-09-08arm64: dts: r8a7796: Add pinctrl device nodeTakeshi Kihara
This patch adds pinctrl device node for R8A7796 SoC. Signed-off-by: Takeshi Kihara <takeshi.kihara.df@renesas.com> Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2016-09-08arm64: dts: r8a7795: salvator-x: Configure pins for the DU RGB outputLaurent Pinchart
Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com> Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2016-09-08arm64: dts: h3ulcb: enable GPIO ledsVladimir Barinov
This supports GPIO leds on H3ULCB board Signed-off-by: Vladimir Barinov <vladimir.barinov@cogentembedded.com> Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2016-09-08arm64: dts: h3ulcb: Sound SSI supportVladimir Barinov
This supports SSI sound for H3ULCB board. SSI DMA mode used. CS2000 used as AUDIO_CLK_B. Signed-off-by: Vladimir Barinov <vladimir.barinov@cogentembedded.com> Acked-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2016-09-08arm64: dts: h3ulcb: enable SDHI0Vladimir Barinov
This supports SDHI0 on H3ULCB board SD card slot Signed-off-by: Vladimir Barinov <vladimir.barinov@cogentembedded.com> Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2016-09-08arm64: dts: h3ulcb: enable GPIO keysVladimir Barinov
This supports GPIO keys on H3ULCB board Signed-off-by: Vladimir Barinov <vladimir.barinov@cogentembedded.com> Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2016-09-08arm64: dts: r8a7795: remove unnecessary cap-mmc-highspeed propertySimon Horman
Remove cap-mmc-highspeed property from SDHI2 and SDHI3. This property is unnecessary as the driver automatically sets the highspeed capability. Furthermore its use is inconsistent with SDHI0 and SDHI1 which are also highspeed capable but do not have this property present. Found by inspection. Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2016-09-08arm64: dts: h3ulcb: enable USB2.0 Host channel 1Vladimir Barinov
This supports USB2.0 Host channel 1 on H3ULCB board Signed-off-by: Vladimir Barinov <vladimir.barinov@cogentembedded.com> Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2016-09-07net: stmmac: update the module description of the dwmac-meson driverMartin Blumenstingl
The dwmac-meson glue driver supports Meson6 and Meson8 SoCs. Newer SoCs are supported by the dwmac-meson8b driver. Signed-off-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com> Signed-off-by: Kevin Hilman <khilman@baylibre.com>
2016-09-07net: stmmac: add a glue driver for the Amlogic Meson 8b / GXBB DWMACMartin Blumenstingl
The Ethernet controller available in Meson8b and GXBB SoCs is a Synopsys DesignWare MAC IP core which is already supported by the stmmac driver. In addition to the standard stmmac driver some Meson8b / GXBB specific registers have to be configured for the PHY clocks. These SoC specific registers are called PRG_ETHERNET_ADDR0 and PRG_ETHERNET_ADDR1 in the datasheet. These registers are not backwards compatible with those on Meson 6b, which is why a new glue driver is introduced. This worked for many boards because the bootloader programs the PRG_ETHERNET registers correctly. Additionally the meson6-dwmac driver only sets bit 1 of PRG_ETHERNET_ADDR0 which (according to the datasheet) is only used during reset. Currently all configuration values can be determined automatically, based on the configured phy-mode (which is mandatory for the stmmac driver). If required the tx-delay and the mux clock (so it supports the MPLL2 clock as well) can be made configurable in the future. Signed-off-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com> Tested-by: Kevin Hilman <khilman@baylibre.com> Acked-by: David S. Miller <davem@davemloft.net> Signed-off-by: Kevin Hilman <khilman@baylibre.com>
2016-09-07stmmac: introduce get_stmmac_bsp_priv() helperJoachim Eastwood
Create a helper to retrieve dwmac private data from a dev pointer. This is useful in PM callbacks and driver remove. Signed-off-by: Joachim Eastwood <manabian@gmail.com> Tested-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com> Acked-by: David S. Miller <davem@davemloft.net> Signed-off-by: Kevin Hilman <khilman@baylibre.com>
2016-09-07net: dt-bindings: Document the new Meson8b and GXBB DWMAC bindingsMartin Blumenstingl
This patch adds the documentation for the DWMAC ethernet controller found in Amlogic Meson 8b (S805) and GXBB (S905) SoCs. The main difference between the Meson6 glue is that different registers (with different layout) are used. Signed-off-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com> Acked-by: Rob Herring <robh@kernel.org> Acked-by: David S. Miller <davem@davemloft.net> Signed-off-by: Kevin Hilman <khilman@baylibre.com>
2016-09-06arm64: dts: h3ulcb: enable USB2 PHY of channel 1Vladimir Barinov
This supports USB2 PHY channel #1 on H3ULCB board Signed-off-by: Vladimir Barinov <vladimir.barinov@cogentembedded.com> Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2016-09-06arm64: dts: h3ulcb: enable WDTVladimir Barinov
This supports watchdog timer for H3ULCB board Signed-off-by: Vladimir Barinov <vladimir.barinov@cogentembedded.com> Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2016-09-06arm64: dts: h3ulcb: enable EXTALR clkVladimir Barinov
This enables EXTALR clock that can be used for the watchdog. Signed-off-by: Vladimir Barinov <vladimir.barinov@cogentembedded.com> Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2016-09-06arm64: dts: h3ulcb: enable I2C2Vladimir Barinov
This supports I2C2 bus on H3ULCB board Signed-off-by: Vladimir Barinov <vladimir.barinov@cogentembedded.com> Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2016-09-06arm64: dts: h3ulcb: enable EthernetAVBVladimir Barinov
This supports Ethernet AVB on H3ULCB board Signed-off-by: Vladimir Barinov <vladimir.barinov@cogentembedded.com> Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2016-09-06arm64: dts: h3ulcb: enable SCIF clk and pinsVladimir Barinov
This enables the external crystal for the SCIF_CLK and its pinctrl, to be used by the Baud Rate Generator for External Clock (BRG) on (H)SCIF. Signed-off-by: Vladimir Barinov <vladimir.barinov@cogentembedded.com> Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2016-09-06arm64: dts: h3ulcb: initial device treeVladimir Barinov
Add the initial device tree for the R8A7795 SoC based H3ULCB low cost board. This commit supports the following peripherals: - SCIF (console) Signed-off-by: Vladimir Barinov <vladimir.barinov@cogentembedded.com> Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2016-09-06arm64: dts: h3ulcb: add H3ULCB board DT bindingsVladimir Barinov
Add H3ULCB Device tree bindings Documentation, listing it as a supported board. Signed-off-by: Vladimir Barinov <vladimir.barinov@cogentembedded.com> Acked-by: Rob Herring <robh@kernel.org> Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2016-09-06arm64: dts: r8a7795: Add SoC-specific compatible property to audio-dmac nodesGeert Uytterhoeven
The audio-dmac nodes used the generic compatible property only. Add the SoC-specific one, to make it future proof. Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2016-09-06arm64: dts: r8a7795: renesas: salvator-x: Enable DULaurent Pinchart
Only the VGA output is supported for now. Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com> Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2016-09-06arm64: dts: renesas: r8a7795: Add DU device to DTLaurent Pinchart
Add the DU device to r8a7795.dtsi in a disabled state. Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com> Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2016-09-06arm64: dts: renesas: r8a7795: Add VSP instancesLaurent Pinchart
The r8a7795 has 9 VSP instances. Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2016-09-06arm64: dts: renesas: r8a7795: Add FCPV nodesLaurent Pinchart
The FCPs handle the interface between various IP cores and memory. Add the instances related to the VSP2s. Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2016-09-06arm64: dts: r8a7795: salvator-x: enable HSUSBYoshihiro Shimoda
Signed-off-by: Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2016-09-06arm64: dts: r8a7795: salvator-x: enable USB 2.0 Host channel 0Yoshihiro Shimoda
We have to set SW15 to pin 2-3 side on the board before we use CN9 as USB host or peripheral. Signed-off-by: Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2016-09-06arm64: dts: r8a7795: salvator-x: enable usb2_phy of channel 0Yoshihiro Shimoda
This patch also adds a regulator node for USB2.0 to handle VBUS on/off by the phy-rcar-gen3-usb2 driver. Signed-off-by: Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2016-09-06arm64: dts: r8a7795: Add HSUSB device nodeYoshihiro Shimoda
Signed-off-by: Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2016-09-06arm64: dts: r8a7795: set maximum frequency for SDHI clocksWolfram Sang
Define the upper limit otherwise the driver cannot utilize max speeds. Signed-off-by: Wolfram Sang <wsa+renesas@sang-engineering.com> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2016-09-06arm64: dts: r8a7795: add FDP1 device nodesKieran Bingham
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be> Reviewed-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com> Signed-off-by: Kieran Bingham <kieran@bingham.xyz> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2016-09-06arm64: dts: r8a7795: add FCPF device nodesKieran Bingham
Provide nodes for the FCP devices dedicated to the FDP device channels. Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be> Signed-off-by: Kieran Bingham <kieran@bingham.xyz> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2016-09-06devicetree: Add vendor prefix for FriendlyARMJames Pettigrew
Guangzhou FriendlyARM Computer Tech Co., Ltd is a Chinese ARM board vendor. Signed-off-by: James Pettigrew <james@innovum.com.au> Reviewed-by: Rask Ingemann Lambertsen <ccc94453@vip.cybercity.dk> Acked-by: Chen-Yu Tsai <wens@csie.org> Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
2016-09-06ARM: dts: sun8i: Add dts file for the NanoPi NEO SBCJames Pettigrew
The NanoPi NEO is a minimal H3 based SBC. It comes with 256/512M RAM, a micro SD slot, 10/100Mbit ethernet and a single USB-A port. Signed-off-by: James Pettigrew <james@innovum.com.au> Reviewed-by: Rask Ingemann Lambertsen <ccc94453@vip.cybercity.dk> Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
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