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2017-08-29MIPS: generic: Include asm/time.h for get_c0_*_int()Paul Burton
arch/mips/generic/irq.c provides implementations of the get_c0_compare_int() & get_c0_perfcount_int() functions, but doesn't include the asm/time.h header which declares them. This leads to warnings from sparse: arch/mips/generic/irq.c:36:5: warning: symbol 'get_c0_perfcount_int' was not declared. Should it be static? arch/mips/generic/irq.c:52:14: warning: symbol 'get_c0_compare_int' was not declared. Should it be static? Fix this by including asm/time.h to get the declarations of get_c0_compare_int() & get_c0_perfcount_int(). Signed-off-by: Paul Burton <paul.burton@imgtec.com> Cc: linux-mips@linux-mips.org Cc: trivial@kernel.org Patchwork: https://patchwork.linux-mips.org/patch/17167/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2017-08-29MIPS: generic: Include asm/bootinfo.h for plat_fdt_relocated()Paul Burton
arch/mips/generic/init.c provides an implementation of the plat_fdt_relocated() function, but doesn't include the asm/bootinfo.h header which declares it. This leads to a warning from sparse: arch/mips/generic/init.c:94:13: warning: symbol 'plat_fdt_relocated' was not declared. Should it be static? Fix this by including asm/bootinfo.h to get the declaration of plat_fdt_relocated(). We also #ifdef our definition of plat_fdt_relocated() such that it is only provided when CONFIG_RELOCATABLE is set, matching the header & avoiding the redundant function for non-relocatable kernels. Signed-off-by: Paul Burton <paul.burton@imgtec.com> Cc: Matt Redfearn <matt.redfearn@imgtec.com> Cc: linux-mips@linux-mips.org Cc: trivial@kernel.org Patchwork: https://patchwork.linux-mips.org/patch/17166/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2017-08-29MIPS: Consolidate coherent and non-coherent dma_alloc codeChristoph Hellwig
Besides eliminating lots of duplication this also allows allocations with the DMA_ATTR_NON_CONSISTENT to use the CMA allocator. Signed-off-by: Christoph Hellwig <hch@lst.de> Cc: linux-mips@linux-mips.org Patchwork: https://patchwork.linux-mips.org/patch/17181/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2017-08-29MIPS: configs: Add Onion Omega2+ defconfigHarvey Hunt
Create a defconfig for the Omega2+ that reaches userspace and allows use of the USB port. Signed-off-by: Harvey Hunt <harvey.hunt@imgtec.com> Cc: robh+dt@kernel.org Cc: mark.rutland@arm.com Cc: john@phrozen.org Cc: linux-kernel@vger.kernel.org Cc: linux-mips@linux-mips.org Patchwork: https://patchwork.linux-mips.org/patch/17138/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2017-08-29MIPS: Add Onion Omega2+ boardHarvey Hunt
The Onion Omega2+ is an MT7688A based board that has 128MB RAM and multiple peripherals. The MT7688A is pin compatible with the MT7628A, although the former supports a 1T1R antenna whereas the MT7628A supports a 2R2T antenna. Signed-off-by: Harvey Hunt <harvey.hunt@imgtec.com> Cc: robh+dt@kernel.org Cc: mark.rutland@arm.com Cc: john@phrozen.org Cc: linux-kernel@vger.kernel.org Cc: devicetree@vger.kernel.org Cc: linux-mips@linux-mips.org Patchwork: https://patchwork.linux-mips.org/patch/17137/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2017-08-29MIPS: configs: Add VoCore2 defconfigHarvey Hunt
Enabled supported drivers, including: - USB PHY - EHCI - UART Signed-off-by: Harvey Hunt <harvey.hunt@imgtec.com> Cc: robh+dt@kernel.org Cc: mark.rutland@arm.com Cc: john@phrozen.org Cc: linux-kernel@vger.kernel.org Cc: linux-mips@linux-mips.org Patchwork: https://patchwork.linux-mips.org/patch/17135/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2017-08-29MIPS: dts: Add Vocore2 boardHarvey Hunt
The VoCore2 board is a low cost MT7628A based board with 128MB RAM, 16MB flash and multiple external peripherals. This initial DTS provides enough support to get to userland and use the USB port. Signed-off-by: Harvey Hunt <harvey.hunt@imgtec.com> Cc: robh+dt@kernel.org Cc: mark.rutland@arm.com Cc: john@phrozen.org Cc: linux-kernel@vger.kernel.org Cc: devicetree@vger.kernel.org Cc: linux-mips@linux-mips.org Patchwork: https://patchwork.linux-mips.org/patch/17134/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2017-08-29dt-bindings: vendors: Add VoCore as a vendorHarvey Hunt
VoCore are a manufacturer of devices such as the VoCore2. Signed-off-by: Harvey Hunt <harvey.hunt@imgtec.com> Acked-by: Rob Herring <robh@kernel.org> Cc: robh+dt@kernel.org Cc: mark.rutland@arm.com Cc: john@phrozen.org Cc: linux-kernel@vger.kernel.org Cc: devicetree@vger.kernel.org Cc: linux-mips@linux-mips.org Patchwork: https://patchwork.linux-mips.org/patch/17132/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2017-08-29MIPS: dts: ralink: Add Mediatek MT7628A SoCHarvey Hunt
The MT7628A is the successor to the MT7620 and pin compatible with the MT7688A, although the latter supports only a 1T1R antenna rather than a 2T2R antenna. This commit adds support for the following features: - UART - USB PHY - EHCI - Interrupt controller - System controller - Memory controller - Reset controller Signed-off-by: Harvey Hunt <harvey.hunt@imgtec.com> Cc: robh+dt@kernel.org Cc: mark.rutland@arm.com Cc: john@phrozen.org Cc: Harvey Hunt <harvey.hunt@imgtec.com> Cc: linux-mips@linux-mips.org Cc: devicetree@vger.kernel.org Cc: linux-kernel@vger.kernel.org Cc: linux-mediatek@lists.infradead.org Patchwork: https://patchwork.linux-mips.org/patch/17133/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2017-08-29MIPS: Alchemy: Threaded carddetect irqs for devboardsManuel Lauss
This introduces threaded carddetect irqs for the db1200/db1300 boards. Main benefit is that the broken insertion/ejection interrupt pairs can now be better supported and debounced in software. Signed-off-by: Manuel Lauss <manuel.lauss@gmail.com> Cc: James Hogan <james.hogan@imgtec.com> Cc: linux-mips@linux-mips.org Patchwork: https://patchwork.linux-mips.org/patch/15287/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2017-08-29MIPS: Alchemy: update cpu feature overridesManuel Lauss
No advanced MIPS features for Alchemy. This patch shaves additional 43kB off the DB1300 kernel (~0.5% size reduction). Signed-off-by: Manuel Lauss <manuel.lauss@gmail.com> Cc: James Hogan <james.hogan@imgtec.com> Cc: linux-mips@linux-mips.org Patchwork: https://patchwork.linux-mips.org/patch/15286/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2017-08-29MIPS: Alchemy: Add devboard machine type to cpuinfoManuel Lauss
Prints the devboard name in cpuinfo "machine" line. Signed-off-by: Manuel Lauss <manuel.lauss@gmail.com> Cc: James Hogan <james.hogan@imgtec.com> Cc: linux-mips@linux-mips.org Patchwork: https://patchwork.linux-mips.org/patch/15285/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2017-08-29MIPS: math-emu: do not use bools for arithmeticManuel Lauss
GCC-7 complains about a boolean value being used with an arithmetic AND: arch/mips/math-emu/cp1emu.c: In function 'cop1Emulate': arch/mips/math-emu/cp1emu.c:838:14: warning: '~' on a boolean expression [-Wbool-operation] fpr = (x) & ~(cop1_64bit(xcp) == 0); \ ^ arch/mips/math-emu/cp1emu.c:1068:3: note: in expansion of macro 'DITOREG' DITOREG(dval, MIPSInst_RT(ir)); ^~~~~~~ arch/mips/math-emu/cp1emu.c:838:14: note: did you mean to use logical not? fpr = (x) & ~(cop1_64bit(xcp) == 0); \ Since cop1_64bit() returns and int, just flip the LSB. Suggested-by: Maciej W. Rozycki <macro@imgtec.com> Signed-off-by: Manuel Lauss <manuel.lauss@gmail.com> Reviewed-by: Maciej W. Rozycki <macro@imgtec.com> Cc: linux-mips@linux-mips.org Patchwork: https://patchwork.linux-mips.org/patch/17058/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2017-08-29MIPS: dts: Ci20: Add ethernet and fixed-regulator nodesHarvey Hunt
Add devicetree nodes for the DM9000 and the ethernet power regulator. Additionally, add a new pinctrl node for the ethernet chip's pins. Signed-off-by: Harvey Hunt <harvey.hunt@imgtec.com> Cc: Zubair Lutfullah Kakakhel <Zubair.Kakakhel@imgtec.com> Cc: Paul Burton <paul.burton@imgtec.com> Cc: Rob Herring <robh+dt@kernel.org> Cc: Mark Rutland <mark.rutland@arm.com> Cc: Paul Cercueil <paul@crapouillou.net> Cc: Linus Walleij <linus.walleij@linaro.org> Cc: devicetree@vger.kernel.org Cc: linux-mips@linux-mips.org Cc: linux-kernel@vger.kernel.org Patchwork: https://patchwork.linux-mips.org/patch/16752/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2017-08-29MIPS: Ci20: Enable GPIO driverHarvey Hunt
Update the Ci20's defconfig to enable the JZ4780's GPIO driver. Signed-off-by: Harvey Hunt <harvey.hunt@imgtec.com> Cc: linux-mips@linux-mips.org Cc: linux-kernel@vger.kernel.org Patchwork: https://patchwork.linux-mips.org/patch/16751/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2017-08-29MIPS: generic: Move NI 169445 FIT image source to its own filePaul Burton
Move the NI 169445 board flattened image tree source into its own file which is concatenated into the final image tree source used to build the flattened image tree. Separating boards into different files will help us to avoid conflicts as boards are added. Signed-off-by: Paul Burton <paul.burton@imgtec.com> Cc: Nathan Sullivan <nathan.sullivan@ni.com> Cc: linux-mips@linux-mips.org Patchwork: https://patchwork.linux-mips.org/patch/16940/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2017-08-29MIPS: generic: Move Boston FIT image source to its own filePaul Burton
Move the Boston board flattened image tree source into its own file which is concatenated into the final image tree source used to build the flattened image tree. Separating boards into different files will help us to avoid conflicts as boards are added. Signed-off-by: Paul Burton <paul.burton@imgtec.com> Cc: linux-mips@linux-mips.org Patchwork: https://patchwork.linux-mips.org/patch/16939/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2017-08-29MIPS: Allow platform to specify multiple its.S filesPaul Burton
In preparation for splitting arch/mips/generic/vmlinux.its.S into multiple files such that it doesn't become a conflict magnet as boards are added, allow platforms to specify a list of image tree source files which will be concatenated to form the final source used to build the image tree. Signed-off-by: Paul Burton <paul.burton@imgtec.com> Cc: linux-mips@linux-mips.org Patchwork: https://patchwork.linux-mips.org/patch/16938/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2017-08-29MIPS: Octeon: Expose support for mips32r1, mips32r2 and mips64r1Petar Jovanovic
Define Cavium Octeon as a CPU that has support for mips32r1, mips32r2 and mips64r1. This will affect show_cpuinfo() that will now correctly expose mips32r1, mips32r2 and mips64r1 as supported ISAs. Signed-off-by: Petar Jovanovic <petar.jovanovic@rt-rk.com> Reviewed-by: Maciej W. Rozycki <macro@imgtec.com> Acked-by: David Daney <david.daney@cavium.com> Cc: petar.jovanovic@imgtec.com Cc: linux-mips@linux-mips.org Patchwork: https://patchwork.linux-mips.org/patch/15749/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2017-08-29MIPS: signal: Remove unreachable code from force_fcr31_sig().Ralf Baechle
Based on discussion with Linus remove the impossible to reach code rather than replacing it with a BUG(). Signed-off-by: Ralf Baechle <ralf@linux-mips.org> Link: http://lkml.kernel.org/r/20170718140651.15973-4-ebiederm@xmission.com
2017-08-29MIPS: NI 169445 board supportNathan Sullivan
Support the National Instruments 169445 board. Signed-off-by: Nathan Sullivan <nathan.sullivan@ni.com> Acked-by: Rob Herring <robh@kernel.org> Cc: devicetree@vger.kernel.org Cc: linux-mips@linux-mips.org Cc: linux-kernel@vger.kernel.org Patchwork: https://patchwork.linux-mips.org/patch/16782/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2017-08-29MIPS: pci-mt7620: explicitly request exclusive reset controlPhilipp Zabel
Commit a53e35db70d1 ("reset: Ensure drivers are explicit when requesting reset lines") started to transition the reset control request API calls to explicitly state whether the driver needs exclusive or shared reset control behavior. Convert all drivers requesting exclusive resets to the explicit API call so the temporary transition helpers can be removed. No functional changes. Signed-off-by: Philipp Zabel <p.zabel@pengutronix.de> Cc: linux-mips@linux-mips.org Cc: linux-kernel@vger.kernel.org Patchwork: https://patchwork.linux-mips.org/patch/16785/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2017-08-29MIPS: pistachio: Enable Root FS on NFS in defconfigMatt Redfearn
When the upstream kernel pistachio_defconfig is built & tested on the ci40 platform the current lack of these options leads to essentially false failures when the RFS fails to mount. Signed-off-by: Matt Redfearn <matt.redfearn@imgtec.com> Cc: James Hartley <james.hartley@sondrel.com> Cc: Ionela Voinescu <ionela.voinescu@imgtec.com> Cc: James Hartley <james.hartley@imgtec.com> Cc: linux-mips@linux-mips.org Cc: linux-kernel@vger.kernel.org Patchwork: https://patchwork.linux-mips.org/patch/16763/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2017-08-29MIPS: NUMA: Remove the unused parent_node() macroDou Liyang
Commit a7be6e5a7f8d ("mm: drop useless local parameters of __register_one_node()") removes the last user of parent_node(). The parent_node() macros in both IP27 and Loongson64 are unnecessary. Remove it for cleanup. Reported-by: Michael Ellerman <mpe@ellerman.id.au> Signed-off-by: Dou Liyang <douly.fnst@cn.fujitsu.com> Cc: James Hogan <james.hogan@imgtec.com> Cc: linux-mips@linux-mips.org Cc: linux-kernel@vger.kernel.org Patchwork: https://patchwork.linux-mips.org/patch/16873/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2017-08-29MIPS: Octeon: cavium_octeon_defconfig: Enable more driversSteven J. Hill
Compile USB driver statically, enable EDAC driver, and remove deprecated options. Signed-off-by: Steven J. Hill <steven.hill@cavium.com> Cc: linux-mips@linux-mips.org Patchwork: https://patchwork.linux-mips.org/patch/16795/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2017-08-29MIPS: Remove unused ST_OFF from r2300_switch.SPaul Burton
Commit 1a3d59579b9f ("MIPS: Tidy up FPU context switching") removed usage of ST_OFF, leaving it behind as dead code. Commit 828d1e4e9865 ("MIPS: Remove dead define of ST_OFF") then removed the definition of ST_OFF from r4k_switch.S as a cleanup. However the unused definition of ST_OFF has been left behind in r2300_switch.S. Remove it. Signed-off-by: Paul Burton <paul.burton@imgtec.com> Cc: linux-mips@linux-mips.org Patchwork: https://patchwork.linux-mips.org/patch/16239/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2017-08-29MIPS: Move r2300 FP code from r2300_switch.S to r2300_fpu.SPaul Burton
Move _save_fp(), _restore_fp() & _init_fpu() out of r2300_switch.S & into r2300_fpu.S. This logically places all FP-related asm code into r2300_fpu.S & provides consistency with R4K after the preceding commit. Besides cleaning up this will be useful for later patches which disable FP support. [ralf@linux-mips.org: Fixed build issues reported by Arnd Bergmann <arnd@arndb.de>] Signed-off-by: Paul Burton <paul.burton@imgtec.com> Cc: linux-mips@linux-mips.org Patchwork: https://patchwork.linux-mips.org/patch/16238/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2017-08-29MIPS: Move r4k FP code from r4k_switch.S to r4k_fpu.SPaul Burton
Move _save_fp(), _restore_fp(), _save_msa(), _restore_msa(), _init_msa_upper() & _init_fpu() out of r4k_switch.S & into r4k_fpu.S. This allows us to clean up the way in which Octeon includes the default r4k implementations of these FP functions despite replacing resume(), and makes CONFIG_R4K_FPU more straightforwardly represent all configurations that have an R4K-style FPU, including Octeon. Besides cleaning up this will be useful for later patches which disable FP support. [ralf@linux-mips.org: Fixed build issues reported by Arnd Bergmann <arnd@arndb.de>] Signed-off-by: Paul Burton <paul.burton@imgtec.com> Cc: linux-mips@linux-mips.org Patchwork: https://patchwork.linux-mips.org/patch/16237/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2017-08-29MIPS: Remove unused R6000 supportPaul Burton
The kernel contains a small amount of incomplete code aimed at supporting old R6000 CPUs. This is: - Unused, as no machine selects CONFIG_SYS_HAS_CPU_R6000. - Broken, since there are glaring errors such as r6000_fpu.S moving the FCSR register to t1, then ignoring it & instead saving t0 into struct sigcontext... - A maintenance headache, since it's code that nobody can test which nevertheless imposes constraints on code which it shares with other machines. Remove this incomplete & broken R6000 CPU support in order to clean up and in preparation for changes which will no longer need to consider dragging the pretense of R6000 support along with them. Signed-off-by: Paul Burton <paul.burton@imgtec.com> Cc: linux-mips@linux-mips.org Patchwork: https://patchwork.linux-mips.org/patch/16236/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2017-08-29MIPS: R6: Constify r2_decoder_tablesMatt Redfearn
The r2_decoder_tables are never modified. They are arrays of constant values and as such should be declared const. This change saves 256 bytes of kernel text, and 128 bytes of kernel data (384 bytes total) on a 32r6el_defconfig (with SMP disabled) Before: text data bss dec hex filename 5576221 1080804 267040 6924065 69a721 vmlinux After: text data bss dec hex filename 5575965 1080676 267040 6923681 69a5a1 vmlinux Signed-off-by: Matt Redfearn <matt.redfearn@imgtec.com> Cc: linux-mips@linux-mips.org Patchwork: https://patchwork.linux-mips.org/patch/15289/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2017-08-29MIPS: SMP: Constify smp opsMatt Redfearn
smp_ops providers do not modify their ops structures, so they should be made const for robustness. Since currently the MIPS kernel is not mapped with memory protection, this does not in itself provide any security benefit, but it still makes sense to make this change. There are also slight code size efficincies from the structure being made read-only, saving 128 bytes of kernel text on a pistachio_defconfig. Before: text data bss dec hex filename 7187239 1772752 470224 9430215 8fe4c7 vmlinux After: text data bss dec hex filename 7187111 1772752 470224 9430087 8fe447 vmlinux Signed-off-by: Matt Redfearn <matt.redfearn@imgtec.com> Cc: Sebastian Andrzej Siewior <bigeasy@linutronix.de> Cc: Arnd Bergmann <arnd@arndb.de> Cc: Marcin Nowakowski <marcin.nowakowski@imgtec.com> Cc: Bart Van Assche <bart.vanassche@sandisk.com> Cc: Masahiro Yamada <yamada.masahiro@socionext.com> Cc: Huacai Chen <chenhc@lemote.com> Cc: Paul Gortmaker <paul.gortmaker@windriver.com> Cc: Kevin Cernekee <cernekee@gmail.com> Cc: Thomas Gleixner <tglx@linutronix.de> Cc: Doug Ledford <dledford@redhat.com> Cc: James Hogan <james.hogan@imgtec.com> Cc: Joe Perches <joe@perches.com> Cc: Florian Fainelli <f.fainelli@gmail.com> Cc: Ingo Molnar <mingo@kernel.org> Cc: Paul Burton <paul.burton@imgtec.com> Cc: Andrew Morton <akpm@linux-foundation.org> Cc: Steven J. Hill <steven.hill@cavium.com> Cc: linux-mips@linux-mips.org Cc: linux-kernel@vger.kernel.org Patchwork: https://patchwork.linux-mips.org/patch/16784/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2017-08-29MIPS: defconfig: Cleanup from non-existing optionsKrzysztof Kozlowski
Remove options which do not exist anymore: - CPU_FREQ_DEBUG is gone since commit 2d06d8c49afd ("[CPUFREQ] use dynamic debug instead of custom infrastructure"). - ECONET is gone since commit 349f29d841db ("econet: remove ancient bug ridden protocol"); - IPDDP_DECAP is gone since commit 9b5645b51384 ("appletalk: remove "config IPDDP_DECAP""); Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org> Cc: Arnd Bergmann <arnd@arndb.de> Cc: linux-mips@linux-mips.org Cc: linux-kernel@vger.kernel.org Patchwork: https://patchwork.linux-mips.org/patch/16770/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2017-08-29MIPS: Convert to using %pOF instead of full_nameRob Herring
Now that we have a custom printf format specifier, convert users of full_name to use %pOF instead. This is preparation to remove storing of the full path string for each node. Signed-off-by: Rob Herring <robh@kernel.org> Cc: linux-mips@linux-mips.org Cc: linux-kernel@vger.kernel.org Cc: devicetree@vger.kernel.org Patchwork: https://patchwork.linux-mips.org/patch/16783/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2017-08-29KVM: s390: expose no-DAT to guest and migration supportClaudio Imbrenda
The STFLE bit 147 indicates whether the ESSA no-DAT operation code is valid, the bit is not normally provided to the host; the host is instead provided with an SCLP bit that indicates whether guests can support the feature. This patch: * enables the STFLE bit in the guest if the corresponding SCLP bit is present in the host. * adds support for migrating the no-DAT bit in the PGSTEs * fixes the software interpretation of the ESSA instruction that is used when migrating, both for the new operation code and for the old "set stable", as per specifications. Signed-off-by: Claudio Imbrenda <imbrenda@linux.vnet.ibm.com> Reviewed-by: Christian Borntraeger <borntraeger@de.ibm.com> Acked-by: Cornelia Huck <cohuck@redhat.com> Signed-off-by: Christian Borntraeger <borntraeger@de.ibm.com>
2017-08-29KVM: s390: sthyi: remove invalid guest write accessHeiko Carstens
handle_sthyi() always writes to guest memory if the sthyi function code is zero in order to fault in the page that later is written to. However a function code of zero does not necessarily mean that a write to guest memory happens: if the KVM host is running as a second level guest under z/VM 6.2 the sthyi instruction is indicated to be available to the KVM host, however if the instruction is executed it will always return with a return code that indicates "unsupported function code". In such a case handle_sthyi() must not write to guest memory. This means that the prior write access to fault in the guest page may result in invalid guest exceptions, and/or invalid data modification. In order to be architecture compliant simply remove the write_guest() call. Given that the guest assumed a write access anyway, this fix does not qualify for -stable. This just makes sure the sthyi handler is architecture compliant. Fixes: 95ca2cb57985 ("KVM: s390: Add sthyi emulation") Reviewed-by: Janosch Frank <frankja@linux.vnet.ibm.com> Signed-off-by: Heiko Carstens <heiko.carstens@de.ibm.com> Reviewed-by: Cornelia Huck <cohuck@redhat.com> Signed-off-by: Christian Borntraeger <borntraeger@de.ibm.com>
2017-08-29KVM: s390: Multiple Epoch Facility supportCollin L. Walling
Allow for the enablement of MEF and the support for the extended epoch in SIE and VSIE for the extended guest TOD-Clock. A new interface is used for getting/setting a guest's extended TOD-Clock that uses a single ioctl invocation, KVM_S390_VM_TOD_EXT. Since the host time is a moving target that might see an epoch switch or STP sync checks we need an atomic ioctl and cannot use the exisiting two interfaces. The old method of getting and setting the guest TOD-Clock is still retained and is used when the old ioctls are called. Signed-off-by: Collin L. Walling <walling@linux.vnet.ibm.com> Reviewed-by: Janosch Frank <frankja@linux.vnet.ibm.com> Reviewed-by: Claudio Imbrenda <imbrenda@linux.vnet.ibm.com> Reviewed-by: Jason J. Herne <jjherne@linux.vnet.ibm.com> Reviewed-by: Cornelia Huck <cohuck@redhat.com> Signed-off-by: Christian Borntraeger <borntraeger@de.ibm.com>
2017-08-29locking/lockdep/selftests: Fix mixed read-write ABBA testsPeter Zijlstra
Commit: e91498589746 ("locking/lockdep/selftests: Add mixed read-write ABBA tests") adds an explicit FAILURE to the locking selftest but overlooked the fact that this kills lockdep. Fudge the test to avoid this. Signed-off-by: Peter Zijlstra (Intel) <peterz@infradead.org> Cc: Linus Torvalds <torvalds@linux-foundation.org> Cc: Peter Zijlstra <peterz@infradead.org> Cc: Thomas Gleixner <tglx@linutronix.de> Cc: hpa@zytor.com Link: http://lkml.kernel.org/r/20170828124245.xlo2yshxq2btgmuf@hirez.programming.kicks-ass.net Signed-off-by: Ingo Molnar <mingo@kernel.org>
2017-08-29sched/completion: Avoid unnecessary stack allocation for ↵Boqun Feng
COMPLETION_INITIALIZER_ONSTACK() In theory, COMPLETION_INITIALIZER_ONSTACK() should never affect the stack allocation of the caller. However, on some compilers, a temporary structure was allocated for the return value of COMPLETION_INITIALIZER_ONSTACK(). For example in write_journal() with LOCKDEP_COMPLETIONS=y (GCC is 7.1.1): io_comp.comp = COMPLETION_INITIALIZER_ONSTACK(io_comp.comp); 2462: e8 00 00 00 00 callq 2467 <write_journal+0x47> 2467: 48 8d 85 80 fd ff ff lea -0x280(%rbp),%rax 246e: 48 c7 c6 00 00 00 00 mov $0x0,%rsi 2475: 48 c7 c2 00 00 00 00 mov $0x0,%rdx x->done = 0; 247c: c7 85 90 fd ff ff 00 movl $0x0,-0x270(%rbp) 2483: 00 00 00 init_waitqueue_head(&x->wait); 2486: 48 8d 78 18 lea 0x18(%rax),%rdi 248a: e8 00 00 00 00 callq 248f <write_journal+0x6f> if (commit_start + commit_sections <= ic->journal_sections) { 248f: 41 8b 87 a8 00 00 00 mov 0xa8(%r15),%eax io_comp.comp = COMPLETION_INITIALIZER_ONSTACK(io_comp.comp); 2496: 48 8d bd e8 f9 ff ff lea -0x618(%rbp),%rdi 249d: 48 8d b5 90 fd ff ff lea -0x270(%rbp),%rsi 24a4: b9 17 00 00 00 mov $0x17,%ecx 24a9: f3 48 a5 rep movsq %ds:(%rsi),%es:(%rdi) if (commit_start + commit_sections <= ic->journal_sections) { 24ac: 41 39 c6 cmp %eax,%r14d io_comp.comp = COMPLETION_INITIALIZER_ONSTACK(io_comp.comp); 24af: 48 8d bd 90 fd ff ff lea -0x270(%rbp),%rdi 24b6: 48 8d b5 e8 f9 ff ff lea -0x618(%rbp),%rsi 24bd: b9 17 00 00 00 mov $0x17,%ecx 24c2: f3 48 a5 rep movsq %ds:(%rsi),%es:(%rdi) We can obviously see the temporary structure allocated, and the compiler also does two meaningless memcpy with "rep movsq". And according to: https://gcc.gnu.org/onlinedocs/gcc/Statement-Exprs.html#Statement-Exprs The return value of a statement expression is returned by value, so the temporary variable is created in COMPLETION_INITIALIZER_ONSTACK(), and that's why the temporary structures are allocted. To fix this, make the brace block in COMPLETION_INITIALIZER_ONSTACK() return a pointer and dereference it outside the block rather than return the whole structure, in this way, we are able to teach the compiler not to do the unnecessary stack allocation. This could also reduce the stack size even if !LOCKDEP, for example in write_journal(), compiled with gcc 7.1.1, the result of command: objdump -d drivers/md/dm-integrity.o | ./scripts/checkstack.pl x86 before: 0x0000246a write_journal [dm-integrity.o]: 696 after: 0x00002b7a write_journal [dm-integrity.o]: 296 Reported-by: Arnd Bergmann <arnd@arndb.de> Signed-off-by: Boqun Feng <boqun.feng@gmail.com> Signed-off-by: Peter Zijlstra (Intel) <peterz@infradead.org> Acked-by: Arnd Bergmann <arnd@arndb.de> Cc: Andrew Morton <akpm@linux-foundation.org> Cc: Byungchul Park <byungchul.park@lge.com> Cc: Linus Torvalds <torvalds@linux-foundation.org> Cc: Nicholas Piggin <npiggin@gmail.com> Cc: Peter Zijlstra <peterz@infradead.org> Cc: Thomas Gleixner <tglx@linutronix.de> Cc: walken@google.com Cc: willy@infradead.org Link: http://lkml.kernel.org/r/20170823152542.5150-3-boqun.feng@gmail.com Signed-off-by: Ingo Molnar <mingo@kernel.org>
2017-08-29acpi/nfit: Fix COMPLETION_INITIALIZER_ONSTACK() abuseBoqun Feng
COMPLETION_INITIALIZER_ONSTACK() is supposed to be used as an initializer, in other words, it should only be used in assignment expressions or compound literals. So the usage in drivers/acpi/nfit/core.c: COMPLETION_INITIALIZER_ONSTACK(flush.cmp); ... is inappropriate. Besides, this usage could also break the build for another fix that reduces stack sizes caused by COMPLETION_INITIALIZER_ONSTACK(), because that fix changes COMPLETION_INITIALIZER_ONSTACK() from rvalue to lvalue, and usage as above will report the following error: drivers/acpi/nfit/core.c: In function 'acpi_nfit_flush_probe': include/linux/completion.h:77:3: error: value computed is not used [-Werror=unused-value] (*({ init_completion(&work); &work; })) This patch fixes this by replacing COMPLETION_INITIALIZER_ONSTACK() with init_completion() in acpi_nfit_flush_probe(), which does the same initialization without any other problems. Signed-off-by: Boqun Feng <boqun.feng@gmail.com> Signed-off-by: Peter Zijlstra (Intel) <peterz@infradead.org> Acked-by: Dan Williams <dan.j.williams@intel.com> Acked-by: Arnd Bergmann <arnd@arndb.de> Cc: Andrew Morton <akpm@linux-foundation.org> Cc: Byungchul Park <byungchul.park@lge.com> Cc: Len Brown <lenb@kernel.org> Cc: Linus Torvalds <torvalds@linux-foundation.org> Cc: Nicholas Piggin <npiggin@gmail.com> Cc: Peter Zijlstra <peterz@infradead.org> Cc: Rafael J. Wysocki <rjw@rjwysocki.net> Cc: Thomas Gleixner <tglx@linutronix.de> Cc: walken@google.com Cc: willy@infradead.org Link: http://lkml.kernel.org/r/20170824142239.15178-1-boqun.feng@gmail.com Signed-off-by: Ingo Molnar <mingo@kernel.org>
2017-08-29locking/pvqspinlock: Relax cmpxchg's to improve performance on some ↵Waiman Long
architectures All the locking related cmpxchg's in the following functions are replaced with the _acquire variants: - pv_queued_spin_steal_lock() - trylock_clear_pending() This change should help performance on architectures that use LL/SC. The cmpxchg in pv_kick_node() is replaced with a relaxed version with explicit memory barrier to make sure that it is fully ordered in the writing of next->lock and the reading of pn->state whether the cmpxchg is a success or failure without affecting performance in non-LL/SC architectures. On a 2-socket 12-core 96-thread Power8 system with pvqspinlock explicitly enabled, the performance of a locking microbenchmark with and without this patch on a 4.13-rc4 kernel with Xinhui's PPC qspinlock patch were as follows: # of thread w/o patch with patch % Change ----------- --------- ---------- -------- 8 5054.8 Mop/s 5209.4 Mop/s +3.1% 16 3985.0 Mop/s 4015.0 Mop/s +0.8% 32 2378.2 Mop/s 2396.0 Mop/s +0.7% Suggested-by: Peter Zijlstra <peterz@infradead.org> Signed-off-by: Waiman Long <longman@redhat.com> Signed-off-by: Peter Zijlstra (Intel) <peterz@infradead.org> Cc: Andrea Parri <parri.andrea@gmail.com> Cc: Boqun Feng <boqun.feng@gmail.com> Cc: Linus Torvalds <torvalds@linux-foundation.org> Cc: Pan Xinhui <xinhui@linux.vnet.ibm.com> Cc: Thomas Gleixner <tglx@linutronix.de> Cc: Will Deacon <will.deacon@arm.com> Link: http://lkml.kernel.org/r/1502741222-24360-1-git-send-email-longman@redhat.com Signed-off-by: Ingo Molnar <mingo@kernel.org>
2017-08-29smp: Avoid using two cache lines for struct call_single_dataYing Huang
struct call_single_data is used in IPIs to transfer information between CPUs. Its size is bigger than sizeof(unsigned long) and less than cache line size. Currently it is not allocated with any explicit alignment requirements. This makes it possible for allocated call_single_data to cross two cache lines, which results in double the number of the cache lines that need to be transferred among CPUs. This can be fixed by requiring call_single_data to be aligned with the size of call_single_data. Currently the size of call_single_data is the power of 2. If we add new fields to call_single_data, we may need to add padding to make sure the size of new definition is the power of 2 as well. Fortunately, this is enforced by GCC, which will report bad sizes. To set alignment requirements of call_single_data to the size of call_single_data, a struct definition and a typedef is used. To test the effect of the patch, I used the vm-scalability multiple thread swap test case (swap-w-seq-mt). The test will create multiple threads and each thread will eat memory until all RAM and part of swap is used, so that huge number of IPIs are triggered when unmapping memory. In the test, the throughput of memory writing improves ~5% compared with misaligned call_single_data, because of faster IPIs. Suggested-by: Peter Zijlstra <peterz@infradead.org> Signed-off-by: Huang, Ying <ying.huang@intel.com> [ Add call_single_data_t and align with size of call_single_data. ] Signed-off-by: Peter Zijlstra (Intel) <peterz@infradead.org> Cc: Aaron Lu <aaron.lu@intel.com> Cc: Borislav Petkov <bp@suse.de> Cc: Eric Dumazet <eric.dumazet@gmail.com> Cc: Juergen Gross <jgross@suse.com> Cc: Linus Torvalds <torvalds@linux-foundation.org> Cc: Michael Ellerman <mpe@ellerman.id.au> Cc: Thomas Gleixner <tglx@linutronix.de> Link: http://lkml.kernel.org/r/87bmnqd6lz.fsf@yhuang-mobile.sh.intel.com Signed-off-by: Ingo Molnar <mingo@kernel.org>
2017-08-29locking/lockdep: Untangle xhlock history save/restore from task independencePeter Zijlstra
Where XHLOCK_{SOFT,HARD} are save/restore points in the xhlocks[] to ensure the temporal IRQ events don't interact with task state, the XHLOCK_PROC is a fundament different beast that just happens to share the interface. The purpose of XHLOCK_PROC is to annotate independent execution inside one task. For example workqueues, each work should appear to run in its own 'pristine' 'task'. Remove XHLOCK_PROC in favour of its own interface to avoid confusion. Signed-off-by: Peter Zijlstra (Intel) <peterz@infradead.org> Cc: Byungchul Park <byungchul.park@lge.com> Cc: Linus Torvalds <torvalds@linux-foundation.org> Cc: Peter Zijlstra <peterz@infradead.org> Cc: Thomas Gleixner <tglx@linutronix.de> Cc: boqun.feng@gmail.com Cc: david@fromorbit.com Cc: johannes@sipsolutions.net Cc: kernel-team@lge.com Cc: oleg@redhat.com Cc: tj@kernel.org Link: http://lkml.kernel.org/r/20170829085939.ggmb6xiohw67micb@hirez.programming.kicks-ass.net Signed-off-by: Ingo Molnar <mingo@kernel.org>
2017-08-29perf/x86: Fix caps/ for !IntelPeter Zijlstra
Move the 'max_precise' capability into generic x86 code where it belongs. This fixes a sysfs splat on !Intel systems where we fail to set x86_pmu_caps_group.atts. Reported-and-tested-by: Borislav Petkov <bp@suse.de> Signed-off-by: Peter Zijlstra (Intel) <peterz@infradead.org> Reviewed-by: Andi Kleen <ak@linux.intel.com> Cc: Linus Torvalds <torvalds@linux-foundation.org> Cc: Peter Zijlstra <peterz@infradead.org> Cc: Thomas Gleixner <tglx@linutronix.de> Cc: hpa@zytor.com Fixes: 22688d1c20f5 ("x86/perf: Export some PMU attributes in caps/ directory") Link: http://lkml.kernel.org/r/20170828104650.2u3rsim4jafyjzv2@hirez.programming.kicks-ass.net Signed-off-by: Ingo Molnar <mingo@kernel.org>
2017-08-29perf/core, x86: Add PERF_SAMPLE_PHYS_ADDRKan Liang
For understanding how the workload maps to memory channels and hardware behavior, it's very important to collect address maps with physical addresses. For example, 3D XPoint access can only be found by filtering the physical address. Add a new sample type for physical address. perf already has a facility to collect data virtual address. This patch introduces a function to convert the virtual address to physical address. The function is quite generic and can be extended to any architecture as long as a virtual address is provided. - For kernel direct mapping addresses, virt_to_phys is used to convert the virtual addresses to physical address. - For user virtual addresses, __get_user_pages_fast is used to walk the pages tables for user physical address. - This does not work for vmalloc addresses right now. These are not resolved, but code to do that could be added. The new sample type requires collecting the virtual address. The virtual address will not be output unless SAMPLE_ADDR is applied. For security, the physical address can only be exposed to root or privileged user. Tested-by: Madhavan Srinivasan <maddy@linux.vnet.ibm.com> Signed-off-by: Kan Liang <kan.liang@intel.com> Signed-off-by: Peter Zijlstra (Intel) <peterz@infradead.org> Cc: Alexander Shishkin <alexander.shishkin@linux.intel.com> Cc: Arnaldo Carvalho de Melo <acme@redhat.com> Cc: Jiri Olsa <jolsa@redhat.com> Cc: Linus Torvalds <torvalds@linux-foundation.org> Cc: Peter Zijlstra <peterz@infradead.org> Cc: Stephane Eranian <eranian@google.com> Cc: Thomas Gleixner <tglx@linutronix.de> Cc: Vince Weaver <vincent.weaver@maine.edu> Cc: acme@kernel.org Cc: mpe@ellerman.id.au Link: http://lkml.kernel.org/r/1503967969-48278-1-git-send-email-kan.liang@intel.com Signed-off-by: Ingo Molnar <mingo@kernel.org>
2017-08-29perf/core, pt, bts: Get rid of itrace_startedAlexander Shishkin
I just noticed that hw.itrace_started and hw.config are aliased to the same location. Now, the PT driver happens to use both, which works out fine by sheer luck: - STORE(hw.itrace_start) is ordered before STORE(hw.config), in the program order, although there are no compiler barriers to ensure that, - to the perf_log_itrace_start() hw.itrace_start looks set at the same time as when it is intended to be set because both stores happen in the same path, - hw.config is never reset to zero in the PT driver. Now, the use of hw.config by the PT driver makes more sense (it being a HW PMU) than messing around with itrace_started, which is an awkward API to begin with. This patch replaces hw.itrace_started with an attach_state bit and an API call for the PMU drivers to use to communicate the condition. Signed-off-by: Alexander Shishkin <alexander.shishkin@linux.intel.com> Signed-off-by: Peter Zijlstra (Intel) <peterz@infradead.org> Cc: Arnaldo Carvalho de Melo <acme@infradead.org> Cc: Arnaldo Carvalho de Melo <acme@redhat.com> Cc: Jiri Olsa <jolsa@redhat.com> Cc: Linus Torvalds <torvalds@linux-foundation.org> Cc: Peter Zijlstra <peterz@infradead.org> Cc: Stephane Eranian <eranian@google.com> Cc: Thomas Gleixner <tglx@linutronix.de> Cc: Vince Weaver <vincent.weaver@maine.edu> Cc: vince@deater.net Link: http://lkml.kernel.org/r/20170330153956.25994-1-alexander.shishkin@linux.intel.com Signed-off-by: Ingo Molnar <mingo@kernel.org>
2017-08-29Merge branch 'perf/urgent' into perf/core, to pick up fixesIngo Molnar
Signed-off-by: Ingo Molnar <mingo@kernel.org>
2017-08-29ALSA: aoa: Convert to using %pOF instead of full_nameRob Herring
Now that we have a custom printf format specifier, convert users of full_name to use %pOF instead. This is preparation to remove storing of the full path string for each node. Signed-off-by: Rob Herring <robh@kernel.org> Signed-off-by: Takashi Iwai <tiwai@suse.de>
2017-08-29Documentation: Hardware tag matchingArtemy Kovalyov
Add document providing definitions of terms and core explanations for tag matching (TM) protocols, eager and rendezvous, TM application header, tag list manipulations and matching process. Signed-off-by: Artemy Kovalyov <artemyko@mellanox.com> Signed-off-by: Leon Romanovsky <leon@kernel.org> Signed-off-by: Doug Ledford <dledford@redhat.com>
2017-08-29IB/mlx5: Support IB_SRQT_TMArtemy Kovalyov
Pass to mlx5_core flag to enable rendezvous offload, list_size and CQ when SRQ created with IB_SRQT_TM. Signed-off-by: Artemy Kovalyov <artemyko@mellanox.com> Reviewed-by: Yossi Itigin <yosefe@mellanox.com> Signed-off-by: Leon Romanovsky <leon@kernel.org> Signed-off-by: Doug Ledford <dledford@redhat.com>
2017-08-29net/mlx5: Add XRQ supportArtemy Kovalyov
Add support to new XRQ(eXtended shared Receive Queue) hardware object. It supports SRQ semantics with addition of extended receive buffers topologies and offloads. Currently supports tag matching topology and rendezvouz offload. Signed-off-by: Artemy Kovalyov <artemyko@mellanox.com> Reviewed-by: Yossi Itigin <yosefe@mellanox.com> Signed-off-by: Leon Romanovsky <leon@kernel.org> Signed-off-by: Doug Ledford <dledford@redhat.com>