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The camera driver (according also to bindings) registers a clock
provider if clock-output-names property is present and later the sensors
use registered clocks.
The DTS for S5Pv210 Goni board was incorrectly adding a child node with
clock output cells but without clock-output-names property. Although
the DTS was compiling (with "/soc/camera/clock-controller: missing or
empty reg/ranges property" warning), the clock provider was not
registered.
Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org>
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The Universal C210 (Exynos4210) uses the secure interface of MDMA0,
instead of regular one - non-secure MDMA1. DTS was overriding MDMA1
node address which caused DTC W=1 warning:
arch/arm/boot/dts/exynos4.dtsi:707.25-716.6:
Warning (simple_bus_reg): /soc/amba/mdma@12850000: simple-bus unit address format error, expected "12840000"
Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org>
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The three fixed-clocks (xusbxti, xxti and xtcxo) are inputs to the
Exynos3250 therefore they should not be inside the soc node. This also
fixes DTC W=1 warning:
arch/arm/boot/dts/exynos3250.dtsi:112.21-139.5:
Warning (simple_bus_reg): /soc/fixed-rate-clocks: missing or empty reg/ranges property
Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org>
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Exynos3250
xusbxti fixed-clock should not have address/size cells because it does
not have any children. This also fixes DTC W=1 warning:
arch/arm/boot/dts/exynos3250.dtsi:112.21-139.5:
Warning (simple_bus_reg): /soc/fixed-rate-clocks: missing or empty reg/ranges property
Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org>
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The ARM PMU and ARM architected timer nodes are part of ARM CPU design
therefore they should not be inside the soc node. This also fixes DTC
W=1 warnings like:
arch/arm/boot/dts/exynos3250.dtsi:106.21-135.5:
Warning (simple_bus_reg): /soc/fixed-rate-clocks: missing or empty reg/ranges property
arch/arm/boot/dts/exynos3250.dtsi:676.7-680.5:
Warning (simple_bus_reg): /soc/pmu: missing or empty reg/ranges property
Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org>
Tested-by: Marek Szyprowski <m.szyprowski@samsung.com>
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This patch fixes IO domain voltage setting that is related to
audio_gpio3d4a_ms (bit 1) of GRF_IO_VSEL.
This is because RockPro64 schematics P.16 says that regulator
supplies 3.0V power to APIO5_VDD. So audio_gpio3d4a_ms bit should
be clear (means 3.0V). Power domain map is saying different thing
(supplies 1.8V) but I believe P.16 is actual connectings.
Fixes: e4f3fb490967 ("arm64: dts: rockchip: add initial dts support for Rockpro64")
Cc: stable@vger.kernel.org
Suggested-by: Robin Murphy <robin.murphy@arm.com>
Signed-off-by: Katsuhiro Suzuki <katsuhiro@katsuster.net>
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
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This patch adds support both digital and analog audio on DB820c.
This board has HDMI port and 3.5mm audio jack to support both digital
and analog audio respectively.
Signed-off-by: Srinivas Kandagatla <srinivas.kandagatla@linaro.org>
Signed-off-by: Andy Gross <agross@kernel.org>
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The APQ8096 DB820c platform provides HDMI output. The MDSS block on
8x96 supports a direct HDMI out. Populate the MDSS, MDP and HDMI DT
nodes. Also, add the HDMI HPD and DDC pinctrl nodes with the bias
and driver strength specified for this platform.
Signed-off-by: Archit Taneja <architt@codeaurora.org>
Signed-off-by: Srinivas Kandagatla <srinivas.kandagatla@linaro.org>
Signed-off-by: Andy Gross <agross@kernel.org>
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Add an initial node for the Adreno GPU.
Signed-off-by: Vivek Gautam <vivek.gautam@codeaurora.org>
Signed-off-by: Srinivas Kandagatla <srinivas.kandagatla@linaro.org>
Signed-off-by: Jordan Crouse <jcrouse@codeaurora.org>
Signed-off-by: Andy Gross <agross@kernel.org>
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Signed-off-by: Archit Taneja <architt@codeaurora.org>
[Removed instances of mmagic clocks;
Use qcom,msm8996-smmu-v2 bindings]
Signed-off-by: Vivek Gautam <vivek.gautam@codeaurora.org>
Signed-off-by: Srinivas Kandagatla <srinivas.kandagatla@linaro.org>
Signed-off-by: Andy Gross <agross@kernel.org>
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Add device node for display smmu, aka. mdp_smmu.
Signed-off-by: Archit Taneja <architt@codeaurora.org>
Signed-off-by: Vivek Gautam <vivek.gautam@codeaurora.org>
Signed-off-by: Srinivas Kandagatla <srinivas.kandagatla@linaro.org>
Signed-off-by: Andy Gross <agross@kernel.org>
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Add device node for graphics smmu, aka. adreno_smmu.
Signed-off-by: Jordan Crouse <jcrouse@codeaurora.org>
Signed-off-by: Vivek Gautam <vivek.gautam@codeaurora.org>
Signed-off-by: Srinivas Kandagatla <srinivas.kandagatla@linaro.org>
Signed-off-by: Andy Gross <agross@kernel.org>
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Specify the relative CPU capacity of all SDM845 AP cores.
The values were provided by Qualcomm engineers.
Signed-off-by: Matthias Kaehlcke <mka@chromium.org>
Reviewed-by: Rajendra Nayak <rnayak@codeaurora.org>
Signed-off-by: Andy Gross <agross@kernel.org>
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The 8 CPU cores of the SDM845 are organized in two clusters of 4 big
("gold") and 4 little ("silver") cores. Add a cpu-map node to the DT
that describes this topology.
Signed-off-by: Matthias Kaehlcke <mka@chromium.org>
Reviewed-by: Douglas Anderson <dianders@chromium.org>
Signed-off-by: Andy Gross <agross@kernel.org>
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Add 'bi_tcxo' as ref clock for the DSI PHYs, it was previously
hardcoded in the PLL 'driver' for the 10nm PHY.
Signed-off-by: Matthias Kaehlcke <mka@chromium.org>
Reviewed-by: Douglas Anderson <dianders@chromium.org>
Reviewed-by: Stephen Boyd <swboyd@chromium.org>
Signed-off-by: Andy Gross <agross@kernel.org>
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Add 'xo_board' as ref clock for the DSI PHYs, it was previously
hardcoded in the PLL 'driver' for the 28nm PHY.
Signed-off-by: Matthias Kaehlcke <mka@chromium.org>
Reviewed-by: Douglas Anderson <dianders@chromium.org>
Reviewed-by: Stephen Boyd <swboyd@chromium.org>
Signed-off-by: Andy Gross <agross@kernel.org>
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The temperature information from the temp-alarm block itself is very
coarse ("temperature is above/below trip points"). Provide the driver
with the die temperature channel of the ADC on the PMIC for more precise
readings.
Signed-off-by: Matthias Kaehlcke <mka@chromium.org>
Reviewed-by: Douglas Anderson <dianders@chromium.org>
Signed-off-by: Andy Gross <agross@kernel.org>
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Add the Audio DSP (ADSP) and Compute DSP (CDSP) nodes for TrustZone
based remoteproc, supporting booting these cores on e.g. the MTP, and
enable the same for the MTP.
Tested-by: Sibi Sankar <sibis@codeaurora.org>
Reviewed-by: Sibi Sankar <sibis@codeaurora.org>
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Signed-off-by: Andy Gross <agross@kernel.org>
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Define the rmtfs memory node. As the memory region specified in version
10 of the memory map is only 1MB a chunk of unallocated memory is
chosen.
Tested-by: Sibi Sankar <sibis@codeaurora.org>
Reviewed-by: Sibi Sankar <sibis@codeaurora.org>
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Signed-off-by: Andy Gross <agross@kernel.org>
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Update existing and add missing regions to the reserved memory map, as
described in version 10.
Reviewed-by: Sibi Sankar <sibis@codeaurora.org>
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Signed-off-by: Andy Gross <agross@kernel.org>
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Wire up the reset controller in the Qcom UFS controller for the PHY.
This will be used to toggle PHY reset during initialization of the PHY.
Reviewed-by: Stephen Boyd <swboyd@chromium.org>
Signed-off-by: Evan Green <evgreen@chromium.org>
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Signed-off-by: Andy Gross <agross@kernel.org>
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Add #io-channel-cells to list of required properties. Needed to be
able to reference that node by phandle.
Signed-off-by: Andrey Smirnov <andrew.smirnov@gmail.com>
Cc: Shawn Guo <shawnguo@kernel.org>
Cc: Chris Healy <cphealy@gmail.com>
Cc: Andrew Lunn <andrew@lunn.ch>
Cc: Fabio Estevam <festevam@gmail.com>
Cc: Rob Herring <robh@kernel.org>
Cc: linux-kernel@vger.kernel.org
Cc: devicetree@vger.kernel.org
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
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Specify #io-channel-cells in ADC nodes. Needed to be able to reference
them by phandle.
Signed-off-by: Andrey Smirnov <andrew.smirnov@gmail.com>
Cc: Shawn Guo <shawnguo@kernel.org>
Cc: Chris Healy <cphealy@gmail.com>
Cc: Andrew Lunn <andrew@lunn.ch>
Cc: Fabio Estevam <festevam@gmail.com>
Cc: Rob Herring <robh@kernel.org>
Cc: linux-kernel@vger.kernel.org
Cc: devicetree@vger.kernel.org
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
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lx2160a supports pw20 which could help save more power during cpu is
dile. It needs system firmware support via PSCI.
Signed-off-by: Ran Wang <ran.wang_1@nxp.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
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v2 of "clk: imx: Refactor entire sccg pll clk" dropped the implicit
reparenting of the PLL output from the bypass clock to the real
PLL. The commit introducing the GPU node had only been tested against
v1 of this patch. Without an explicit reparent to the real PLL the
GPU is stuck at the bypass clock rate of 25MHz, serverly hampering
performance.
Signed-off-by: Lucas Stach <l.stach@pengutronix.de>
Reviewed-by: Abel Vesa <abel.vesa@nxp.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
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Link the SW1AB regulator to the GPU domain, so that it gets enabled
when needed.
Signed-off-by: Lucas Stach <l.stach@pengutronix.de>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
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This is very similar to imx8mq cpufreq-dt support.
Operating points are from datasheet:
https://www.nxp.com/docs/en/data-sheet/IMX8MMCEC.pdf
Higher opps were omitted (just like imx8mq) because it requires checking
speed grade from OCOTP fuses.
Signed-off-by: Leonard Crestez <leonard.crestez@nxp.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
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Add an initial description of the i2c1 bus with a pca9646 i2c switch and
various gpio expanders and sensors behind that. Only add the sensors
which already have upstream drivers.
According to the datasheet the pca9646 is software compatible with
pca9546 so no driver changes should be required.
Signed-off-by: Leonard Crestez <leonard.crestez@nxp.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
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On i.MX8QXP, SCU uses MU1 general interrupt channel #3 to notify
user for IRQs of RTC alarm, thermal alarm and WDOG etc., mailbox
RX doorbell mode is used for this function, this patch adds
support for it.
Signed-off-by: Anson Huang <Anson.Huang@nxp.com>
Reviewed-by: Dong Aisheng <aisheng.dong@nxp.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
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This enables the Vivante GC7000L GPU on the i.MX8MQ SoC.
Signed-off-by: Lucas Stach <l.stach@pengutronix.de>
Reviewed-by: Guido Günther <agx@sigxcpu.org>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
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The Zii Ultra design, also known as RDU3, is the i.MX8M based successor
to the the i.MX6 based RDU2. This adds the basic board support for all
components which are supported by the upstream kernel at this time.
The board comes in 2 different versions, called RMB3 and Zest, which
are derived from the same design, but have different layouts and a
few small differences in the populated components.
Signed-off-by: Lucas Stach <l.stach@pengutronix.de>
Reviewed-by: Fabio Estevam <festevam@gmail.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
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Specify CS as GPIO_ACTIVE_LOW in spi0 to fix the following warning:
m25p128@0 enforce active low on chipselect handle
Signed-off-by: Andrey Smirnov <andrew.smirnov@gmail.com>
Cc: Shawn Guo <shawnguo@kernel.org>
Cc: Chris Healy <cphealy@gmail.com>
Cc: Andrew Lunn <andrew@lunn.ch>
Cc: Fabio Estevam <festevam@gmail.com>
Cc: linux-kernel@vger.kernel.org
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
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Mark i2c0 SCL as GPIO_OPEN_DRAIN to fix the following warning:
gpio-36 (scl): enforced open drain please flag it properly in DT/ACPI DSDT/board file
Signed-off-by: Andrey Smirnov <andrew.smirnov@gmail.com>
Cc: Shawn Guo <shawnguo@kernel.org>
Cc: Chris Healy <cphealy@gmail.com>
Cc: Andrew Lunn <andrew@lunn.ch>
Cc: Fabio Estevam <festevam@gmail.com>
Cc: linux-kernel@vger.kernel.org
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
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Add support for ZII's i.MX7 based Remote Peripheral Unit 2 (RPU2)
board.
Signed-off-by: Andrey Smirnov <andrew.smirnov@gmail.com>
Reviewed-by: Fabio Estevam <festevam@gmail.com>
Cc: Shawn Guo <shawnguo@kernel.org>
Cc: Chris Healy <cphealy@gmail.com>
Cc: Andrew Lunn <andrew@lunn.ch>
Cc: Fabio Estevam <festevam@gmail.com>
Cc: Rob Herring <robh@kernel.org>
Cc: linux-kernel@vger.kernel.org
Cc: devicetree@vger.kernel.org
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
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Add support for ZII i.MX7 RPU2 board.
Signed-off-by: Andrey Smirnov <andrew.smirnov@gmail.com>
Reviewed-by: Rob Herring <robh@kernel.org>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
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Running reboot command on the TQMa7 board would just hang infinite
at the end of the system shutdown process.
Handling of i.MX7 errata e10574:
Watchdog: A watchdog timeout or software trigger will not reset the SOC.
Moved pinctrl from common mba7 to common tqma7 dtsi as it improves
readability of errata handling. Most integrators of this SoM will
likely use the development board as inspiration for handling this
SoC issue.
Signed-off-by: Bruno Thomsen <bruno.thomsen@gmail.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
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There is currently no DT binding for GPIO rfkill signals. To make
mini-PCIe attached WiFi devices work, use gpio-hog to hold the
wlan_disable signal de-asserted.
Signed-off-by: Thomas Schreiber <tschreibe@gmail.com>
[baruch: add pinctrl node; rename tag]
Signed-off-by: Baruch Siach <baruch@tkos.co.il>
Signed-off-by: Gregory CLEMENT <gregory.clement@bootlin.com>
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The first interrupt is for the regular watchdog timeout. Normally the
RSTOUT line will trigger a reset before this interrupt fires but on
systems with a non-standard reset it may still trigger.
The second interrupt is for a timer1 which is used as a pre-timeout for
the watchdog.
Signed-off-by: Chris Packham <chris.packham@alliedtelesis.co.nz>
Signed-off-by: Gregory CLEMENT <gregory.clement@bootlin.com>
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Add device tree for the Menlosystems board based on i.MX53 M53 SoM.
Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Shawn Guo <shawnguo@kernel.org>
Cc: Fabio Estevam <festevam@gmail.com>
Cc: NXP Linux Team <linux-imx@nxp.com>
To: linux-arm-kernel@lists.infradead.org
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
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Rename the touchscreen node to match contemporary design.
Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Shawn Guo <shawnguo@kernel.org>
Cc: Fabio Estevam <festevam@gmail.com>
Cc: NXP Linux Team <linux-imx@nxp.com>
To: linux-arm-kernel@lists.infradead.org
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
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Add devicetree binding for iMX53 SoC based M53 Menlo board.
Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Rob Herring <robh@kernel.org>
Cc: Shawn Guo <shawnguo@kernel.org>
Cc: Fabio Estevam <festevam@gmail.com>
Cc: NXP Linux Team <linux-imx@nxp.com>
Cc: devicetree@vger.kernel.org
To: linux-arm-kernel@lists.infradead.org
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
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Replace GPLv2+ header with the SPDX identifier.
Signed-off-by: Vladimir Zapolskiy <vz@mleia.com>
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All 4 SPI controllers on NXP LPC32xx SoC support SPI slaves discerning them
by one cell address value, set it as default to avoid duplication in board
device tree files.
Signed-off-by: Vladimir Zapolskiy <vz@mleia.com>
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NXP LPC3220 and LPC3230 SoCs do NOT contain a MAC controller, so,
since for now there is just one dtsi file for all variants of
NXP LPC32xx SoCs, it is reasonable to disable the controller
by default and enable it in device tree files of particular boards.
Signed-off-by: Vladimir Zapolskiy <vz@mleia.com>
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The I2S controllers found on NXP LPC32xx SoCs are not yet in
use by any boards supported in upstream, disable the controllers
by default.
Signed-off-by: Vladimir Zapolskiy <vz@mleia.com>
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This is a non-functional change, all inconsistent hexadecimal values
found in the file are now fixed.
Taking a chance to interfere into some non-functional change I add
my copyright notice for work done during the last few years.
Signed-off-by: Vladimir Zapolskiy <vz@mleia.com>
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blsp1_i2c1 is at 0x0c175000
blsp2_i2c5 is at 0x0c1ba000 (the label is correct)
Fixes: 1e71d0c273d0a ("arm64: dts: qcom: msm8998: Enumerate i2c controllers")
Signed-off-by: Marc Gonzalez <marc.w.gonzalez@free.fr>
Reviewed-by: Jeffrey Hugo <jhugo@codeaurora.org>
Signed-off-by: Andy Gross <agross@kernel.org>
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The compatible flag should be different for each board to match
with the dtb and to let the bootloader pick the appropriate dtb.
Signed-off-by: Khasim Syed Mohammed <khasim.mohammed@linaro.org>
Signed-off-by: Niklas Cassel <niklas.cassel@linaro.org>
Signed-off-by: Andy Gross <agross@kernel.org>
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This adds the gpio-ranges property so that the GPIO pins are initialized
by the GPIO framework and not pinctrl. This fixes a circular dependency
between these two frameworks so GPIO hogging can be used on this board.
This was not tested on this particular hardware, however this same
change was tested on qcom-pm8941 using a LG Nexus 5 (hammerhead) phone.
Signed-off-by: Brian Masney <masneyb@onstation.org>
Signed-off-by: Andy Gross <agross@kernel.org>
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This adds the gpio-ranges property so that the GPIO pins are initialized
by the GPIO framework and not pinctrl. This fixes a circular dependency
between these two frameworks so GPIO hogging can be used on this board.
This was not tested on this particular hardware, however this same
change was tested on qcom-pm8941 using a LG Nexus 5 (hammerhead) phone.
Signed-off-by: Brian Masney <masneyb@onstation.org>
Signed-off-by: Andy Gross <agross@kernel.org>
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