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git://git.kernel.org/pub/scm/linux/kernel/git/atorgue/stm32 into arm/dt
STM32 DT for v5.17, round 1
Highlights:
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-MCU:
- fix ili9341 for dtbs_check warnings on stm32f429 disco.
- MPU:
- ST boards:
- tune HS USB phys on stm32mp15 EV1 and DKx boards.
- add pull-up on USART3/UART7 RX pins on STM32MP15 DKx boards.
- use correct pinctrl setting for STUSB1600 on STM32MP15 DK boards.
- ENGICAM:
- enable LVDS pannel on i.Core STM32MP1 EDIMM2.2.
- add "i.Core STM32MP1 C.TOUCH 2.0 10.1" OF" support:
EDIMM compliant general purpose carrier board with ETH 10/100,
WIFI/BT, CAN, ...
* tag 'stm32-dt-for-v5.17-1' of git://git.kernel.org/pub/scm/linux/kernel/git/atorgue/stm32:
ARM: dts: stm32: Add Engicam i.Core STM32MP1 C.TOUCH 2.0 10.1" OF
dt-bindings: arm: stm32: Add Engicam i.Core STM32MP1 C.TOUCH 2.0 10.1" OF
ARM: dts: stm32: Enable LVDS panel on i.Core STM32MP1 EDIMM2.2
ARM: dts: stm32: fix stusb1600 pinctrl used on stm32mp157c-dk
ARM: dts: stm32: tune the HS USB PHYs on stm32mp157c-ev1
ARM: dts: stm32: tune the HS USB PHYs on stm32mp15xx-dkx
ARM: dts: stm32: clean uart4_idle_pins_a node for stm32mp15
ARM: dts: stm32: add pull-up to USART3 and UART7 RX pins on STM32MP15 DKx boards
ARM: dts: stm32: fix dtbs_check warning on ili9341 dts binding on stm32f429 disco
Link: https://lore.kernel.org/r/dfe942db-5af7-bb82-22b6-3bd866c9017d@foss.st.com
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
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This will bind to the PMGR pwrstate nodes that control power/clock
gating to SoC blocks. The mailbox driver doesn't do runtime-pm yet, so
initially this will just keep the domain on permanently.
Reviewed-by: Sven Peter <sven@svenpeter.dev>
Acked-by: Rob Herring <robh@kernel.org>
Signed-off-by: Hector Martin <marcan@marcan.st>
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We decided to keep SoC nodes sorted by address for sanity; fix a couple
that slipped into the wrong place.
Reviewed-by: Sven Peter <sven@svenpeter.dev>
Signed-off-by: Hector Martin <marcan@marcan.st>
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We now know that this frequency comes from the external reference
oscillator and is used for various SoC blocks, and isn't just a random
24MHz clock, so let's call it something more appropriate.
Reviewed-by: Mark Kettenis <kettenis@openbsd.org>
Reviewed-by: Sven Peter <sven@svenpeter.dev>
Signed-off-by: Hector Martin <marcan@marcan.st>
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Setup a thermal zone driven by SoC temperature sensor.
Create passive trip points and bind them to CPUFreq cooling
device that supports power extension.
Based on the work done by Dien Pham <dien.pham.ry@renesas.com>
and others for r8a77990 SoC.
Signed-off-by: Biju Das <biju.das.jz@bp.renesas.com>
Reviewed-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
Link: https://lore.kernel.org/r/20211208142729.2456-3-biju.das.jz@bp.renesas.com
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
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Add TSU node to RZ/G2L SoC DTSI.
Signed-off-by: Biju Das <biju.das.jz@bp.renesas.com>
Reviewed-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
Link: https://lore.kernel.org/r/20211208142729.2456-2-biju.das.jz@bp.renesas.com
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
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Provide the display output using the sn65dsi86 MIPI DSI bridge.
Reviewed-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
Signed-off-by: Kieran Bingham <kieran.bingham+renesas@ideasonboard.com>
Link: https://lore.kernel.org/r/20211130164311.2909616-3-kieran.bingham+renesas@ideasonboard.com
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
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Provide the two MIPI DSI encoders on the V3U and connect them to the DU
accordingly.
Reviewed-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
Signed-off-by: Kieran Bingham <kieran.bingham+renesas@ideasonboard.com>
Link: https://lore.kernel.org/r/20211130164311.2909616-2-kieran.bingham+renesas@ideasonboard.com
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
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git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-nomadik into arm/dt
IXP4xx DTS changes for v5.17:
- Add the LEDs to the Freecom FSG-3 that were missing.
- Add a devicetree for the Gorami MultiLink Router
- Add a devicetree for the Gateway GW7001 Router
This completes the migration of all IXP4xx devices to
device tree files.
Next merge window we will delete the remaining board files,
it cannot be done now because of cross-tree dependencies.
* tag 'ixp4xx-dtx-v5.17' of git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-nomadik:
ARM: dts: ixp4xx: Add devicetree for Gateway 7001
ARM: dts: Add Goramo MultiLink device tree
ARM: dts: Add FSG3 system controller and LEDs
Link: https://lore.kernel.org/r/CACRpkdYiWK7TEbZrh4_0WT5obMk=ZSc7AQVUSPXL+-uZ_hsUEA@mail.gmail.com
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
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git://git.kernel.org/pub/scm/linux/kernel/git/at91/linux into arm/dt
AT91 DT #1 for 5.17:
- 2 low priority fixes about pin function for sama7g5 and better
tailored mmc interface on sama5d2 xplained
- Addition of the Microchip EVB-KSZ9477: a Gigabit Ethernet
managed Switch Evaluation Board
- QSPI: addition of sama5d2 clock name and nodes for new sama7g7 and its
associated Evaluation Kit
* tag 'at91-dt-5.17' of git://git.kernel.org/pub/scm/linux/kernel/git/at91/linux:
ARM: dts: at91: sama7g5ek: Add QSPI0 node
ARM: dts: at91: sama7g5: Add QSPI nodes
ARM: dts: at91: sama5d2: Name the qspi clock
ARM: dts: at91: add Microchip EVB-KSZ9477 board
ARM: dts: at91: sama5d2_xplained: remove PA11__SDMMC0_VDDSEL from pinctrl
ARM: dts: at91: update alternate function of signal PD20
Link: https://lore.kernel.org/r/20211213161451.90786-1-nicolas.ferre@microchip.com
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
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git://git.kernel.org/pub/scm/linux/kernel/git/amlogic/linux into arm/dt
Amlogic ARM64 DT changes for v5.17:
- Add missing cec nodes for Odroid-C4 & HC4
- Fix thermal-zones indent for G12/SM1 SoCs dtsi
- Fix GPU OPP table node name for G12/SM1 SoCs dtsi
- Fix SPI NOR Flash node name for Odroid-N2/N2+
- Fixes for GXBB Wetek boards:
- Fix HDMI supply
- Add missing gpio bindings include
- Switch to new LED bindings
- P241 additions:
- Add VCC 5v regulator
- Add sound nodes
* tag 'amlogic-arm64-dt-for-v5.17' of git://git.kernel.org/pub/scm/linux/kernel/git/amlogic/linux:
arm64: dts: meson: p241: add sound support
arm64: dts: meson: p241: add vcc_5v regulator
arm64: dts: meson-gxbb-wetek: use updated LED bindings
arm64: dts: meson-gxbb-wetek: fix missing GPIO binding
arm64: dts: meson-gxbb-wetek: fix HDMI in early boot
arm64: dts: amlogic: Fix SPI NOR flash node name for ODROID N2/N2+
arm64: dts: amlogic: meson-g12: Fix GPU operating point table node name
arm64: dts: amlogic: meson-g12: Fix thermal-zones indent
arm64: dts: meson-sm1-odroid: add cec nodes
Link: https://lore.kernel.org/r/f47b9b95-6cde-d2f8-eb36-78777d449920@baylibre.com
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
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git://git.kernel.org/pub/scm/linux/kernel/git/mmind/linux-rockchip into arm/dt
Improvements on a number of boards:
- helios64: hdd-power, pcie, 2.5GbE nic
- spi for rk356x and on the Quartz-A board
- headphone, bluetooth support on Rock Pi4
And some misc soc improvements:
- missing dsi compatible on px30
- pwm pinctrl name on rk356x
* tag 'v5.17-rockchip-dts64-1' of git://git.kernel.org/pub/scm/linux/kernel/git/mmind/linux-rockchip:
arm64: dts: rockchip: Fix Bluetooth on ROCK Pi 4 boards
arm64: dts: rockchip: Add missing secondary compatible for PX30 DSI
arm64: dts: rockchip: Add spi1 pins on Quartz64 A
arm64: dts: rockchip: Add spi nodes on rk356x
arm64: dts: rockchip: Change pwm pinctrl-name to "default" on rk356x
arm64: dts: rockchip: Enable HDD power on helios64
arm64: dts: rockchip: add variables for pcie completion to helios64
arm64: dts: rockchip: define usb hub and 2.5GbE nic on helios64
arm64: dts: rockchip: add interrupt and headphone-detection for Rock Pi4's audio codec
Link: https://lore.kernel.org/r/3637342.7akbv5NDAT@phil
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
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Apple SoC DT updates for 5.17:
- Separate DTs for all t8103 platforms
- Add i2c and cd321x nodes
- Bindings for apple,wdt
- PMGR bindings and DT updates to instantiate it
- WiFi MAC address DT handling
This also includes the MAINTAINERS change for the PMGR driver itself, to
avoid merge issues; the driver will be sent in a different pull.
Manual fixups: Added i2c power domain references to the PMGR DT commit,
since a prior commit added the i2c nodes.
* tag 'asahi-soc-dt-5.17' of https://github.com/AsahiLinux/linux:
arm64: dts: apple: t8103: Expose PCI node for the WiFi MAC address
arm64: dts: apple: t8103: Add UART2
arm64: dts: apple: t8103: Add PMGR nodes
dt-bindings: arm: apple: Add apple,pmgr binding
dt-bindings: power: Add apple,pmgr-pwrstate binding
MAINTAINERS: Add PMGR power state files to ARM/APPLE MACHINE
dt-bindings: watchdog: Add Apple Watchdog
dt-bindings: interrupt-controller: apple,aic: Add power-domains property
dt-bindings: pinctrl: apple,pinctrl: Add power-domains property
dt-bindings: iommu: apple,dart: Add power-domains property
dt-bindings: i2c: apple,i2c: Add power-domains property
arm64: dts: apple: t8103: Add cd321x nodes
arm64: dts: apple: t8103: Add i2c nodes
arm64: dts: apple: Add missing M1 (t8103) devices
dt-bindings: arm: apple: Add iMac (24-inch 2021) to Apple bindings
arm64: dts: apple: add #interrupt-cells property to pinctrl nodes
dt-bindings: i2c: apple,i2c: allow multiple compatibles
arm64: dts: apple: change ethernet0 device type to ethernet
Link: https://lore.kernel.org/r/e18b476c-7b1f-de73-53a2-0e21fb5cd283@marcan.st
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
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Steven Maddox reported in the OpenWrt bugzilla, that his
RaidSonic IB-NAS4220-B was no longer booting with the new
OpenWrt 21.02 (uses linux 5.10's device-tree). However, it was
working with the previous OpenWrt 19.07 series (uses 4.14).
|[ 5.548038] No RedBoot partition table detected in 30000000.flash
|[ 5.618553] Searching for RedBoot partition table in 30000000.flash at offset 0x0
|[ 5.739093] No RedBoot partition table detected in 30000000.flash
|...
|[ 7.039504] Waiting for root device /dev/mtdblock3...
The provided bootlog shows that the RedBoot partition parser was
looking for the partition table "at offset 0x0". Which is strange
since the comment in the device-tree says it should be at 0xfe0000.
Further digging on the internet led to a review site that took
some useful PCB pictures of their review unit back in February 2009.
Their picture shows a Spansion S29GL128N11TFI01 flash chip.
>From Spansion's Datasheet:
"S29GL128N: One hundred twenty-eight 64 Kword (128 Kbyte) sectors"
Steven also provided a "cat /sys/class/mtd/mtd0/erasesize" from his
unit: "131072".
With the 128 KiB Sector/Erasesize in mind. This patch changes the
fis-index-block property to (0xfe0000 / 0x20000) = 0x7f.
Fixes: b5a923f8c739 ("ARM: dts: gemini: Switch to redboot partition parsing")
Reported-by: Steven Maddox <s.maddox@lantizia.me.uk>
Signed-off-by: Christian Lamparter <chunkeey@gmail.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Tested-by: Steven Maddox <s.maddox@lantizia.me.uk>
Link: https://lore.kernel.org/r/20211206004334.4169408-1-linus.walleij@linaro.org'
Bugzilla: https://bugs.openwrt.org/index.php?do=details&task_id=4137
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
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git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-nomadik into arm/dt
Ux500 DTS updates for the v5.17 kernel series:
- Add reset lines to applicable IP blocks
- Fix the magnetometer in the Gavini device tree
* tag 'ux500-dts-v5.17-1' of git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-nomadik:
ARM: dts: ux500: Fixup Gavini magnetometer
ARM: dts: ux500: Add reset lines to IP blocks
Link: https://lore.kernel.org/r/CACRpkdZuDPLj5Tcxbyd+JGfvBGQ8RuMP9PAsGsZT7pY8KoyOKg@mail.gmail.com
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
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git://git.kernel.org/pub/scm/linux/kernel/git/geert/renesas-devel into arm/dt
Renesas DT binding updates for v5.17
- Document SDHI SDnH clocks on R-Car Gen2 and later,
- Document core support for the R-Car S4-8 (R8A779F0) SoC.
* tag 'renesas-dt-bindings-for-v5.17-tag1' of git://git.kernel.org/pub/scm/linux/kernel/git/geert/renesas-devel:
dt-bindings: mmc: renesas,sdhi: Rename RZ/G2L clocks
dt-bindings: power: renesas,rcar-sysc: Document r8a779f0 SYSC bindings
dt-bindings: reset: renesas,rst: Document r8a779f0 reset module
dt-bindings: arm: renesas: Document R-Car S4-8 SoC DT bindings
dt-bindings: mmc: renesas,sdhi: Add optional SDnH clock
Link: https://lore.kernel.org/r/cover.1638530614.git.geert+renesas@glider.be
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
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git://git.kernel.org/pub/scm/linux/kernel/git/geert/renesas-devel into arm/dt
Renesas ARM DT updates for v5.17
- Serial, SPI, timer, watchdog, operating points, and QSPI FLASH
support for the RZ/G2L SoC and the RZ/G2L SMARC EVK development
board,
- SDHI SDnH clocks for the R-Car Gen3 and RZ/G2 SoCs,
- Display Unit support for the R-Car V3U SoC,
- Miscellaneous fixes and improvements.
* tag 'renesas-arm-dt-for-v5.17-tag1' of git://git.kernel.org/pub/scm/linux/kernel/git/geert/renesas-devel: (21 commits)
arm64: dts: renesas: r8a779a0: Add DU support
arm64: dts: renesas: salvator-common: Merge hdmi0_con
arm64: dts: renesas: ulcb: Merge hdmi0_con
arm64: dts: renesas: r9a07g044: Add OPP table
arm64: dts: renesas: Fix operating point table node names
arm64: dts: renesas: rzg2l-smarc-som: Enable watchdog
arm64: dts: renesas: r9a07g044: Add WDT nodes
arm64: dts: renesas: r9a07g044: Rename SDHI clocks
arm64: dts: renesas: rzg2l-smarc-som: Enable serial NOR flash
arm64: dts: renesas: rzg2l-smarc-som: Enable OSTM
arm64: dts: renesas: r9a07g044: Add OSTM nodes
arm64: dts: renesas: r9a07g044: Sort psci node
arm64: dts: renesas: rzg2l-smarc: Enable RSPI1 on carrier board
arm64: dts: renesas: r9a07g044: Add RSPI{0,1,2} nodes
arm64: dts: renesas: cat875: Add rx/tx delays
arm64: dts: reneas: rcar-gen3: Add SDnH clocks
arm64: dts: reneas: rzg2: Add SDnH clocks
arm64: dts: renesas: r9a07g044: Add SCI[0-1] nodes
arm64: dts: renesas: rzg2l-smarc: Enable SCIF2 on carrier board
arm64: dts: renesas: r9a07g044: Add SCIF[1-4] nodes
...
Link: https://lore.kernel.org/r/cover.1638530606.git.geert+renesas@glider.be
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
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The EVM architecture for J721S2 is similar to that of J721E and J7200. It
is as follows,
+------------------------------------------------------+
| +-------------------------------------------+ |
| | | |
| | Add-on Card 1 Options | |
| | | |
| +-------------------------------------------+ |
| |
| |
| +-------------------+ |
| | | |
| | SOM | |
| +--------------+ | | |
| | | | | |
| | Add-on | +-------------------+ |
| | Card 2 | | Power Supply
| | Options | | |
| | | | |
| +--------------+ | <---
+------------------------------------------------------+
Common Processor Board
Common Processor board is the baseboard that contains most of the actual
connectors, power supply etc. The System on Module (SoM) is plugged on to
the common processor baord. Therefore, add support for peripherals brought
out in the common processor board.
Common Processor Board: https://www.ti.com/tool/J721EXCPXEVM
Signed-off-by: Aswath Govindraju <a-govindraju@ti.com>
Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>
Reviewed-by: Kishon Vijay Abraham I <kishon@ti.com>
Link: https://lore.kernel.org/r/20211207080904.14324-6-a-govindraju@ti.com
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A System on Module (SoM) contains the SoC, PMIC, DDR and basic high speed
components necessary for functionality. Therefore, add support for the
components present on the SoM.
SoM: https://www.ti.com/lit/zip/sprr439
Signed-off-by: Aswath Govindraju <a-govindraju@ti.com>
Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>
Reviewed-by: Kishon Vijay Abraham I <kishon@ti.com>
Link: https://lore.kernel.org/r/20211207080904.14324-5-a-govindraju@ti.com
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The J721S2 SoC belongs to the K3 Multicore SoC architecture platform,
providing advanced system integration in automotive ADAS applications and
industrial applications requiring AI at the network edge. This SoC extends
the Jacinto 7 family of SoCs with focus on lowering system costs and power
while providing interfaces, memory architecture and compute performance for
single and multi-sensor applications.
Some highlights of this SoC are:
* Dual Cortex-A72s in a single cluster, three clusters of lockstep capable
dual Cortex-R5F MCUs, Deep-learning Matrix Multiply Accelerator(MMA), C7x
floating point Vector DSP.
* 3D GPU: Automotive grade IMG BXS-4-64
* Vision Processing Accelerator (VPAC) with image signal processor and
Depth and Motion Processing Accelerator (DMPAC)
* Two CSI2.0 4L RX plus one eDP/DP, two DSI Tx, and one DPI interface.
* Two Ethernet ports with RGMII support.
* Single 4 lane PCIe-GEN3 controllers, USB3.0 Dual-role device subsystems,
* Up to 20 MCANs, 5 McASP, eMMC and SD, OSPI/HyperBus memory controller,
QSPI, I3C and I2C, eCAP/eQEP, eHRPWM, MLB among other peripherals.
* Hardware accelerator blocks containing AES/DES/SHA/MD5 called SA2UL
management.
* Chips and Media Wave521CL H.264/H.265 encode/decode engine
See J721S2 Technical Reference Manual (SPRUJ28 – NOVEMBER 2021)
for further details: http://www.ti.com/lit/pdf/spruj28
Introduce basic support for the J721S2 SoC.
Signed-off-by: Aswath Govindraju <a-govindraju@ti.com>
Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>
Signed-off-by: Nishanth Menon <nm@ti.com>
Reviewed-by: Kishon Vijay Abraham I <kishon@ti.com>
Link: https://lore.kernel.org/r/20211207080904.14324-4-a-govindraju@ti.com
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Add pinctrl macros for J721S2 SoC. These macro definitions are
similar to that of J721E, but adding new definitions to avoid
any naming confusions in the soc dts files.
checkpatch insists the following error exists:
ERROR: Macros with complex values should be enclosed in parentheses
However, we do not need parentheses enclosing the values for this
macro as we do intend it to generate two separate values as has been
done for other similar platforms.
Signed-off-by: Aswath Govindraju <a-govindraju@ti.com>
Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>
Reviewed-by: Kishon Vijay Abraham I <kishon@ti.com>
Acked-by: Rob Herring <robh@kernel.org>
Link: https://lore.kernel.org/r/20211207080904.14324-3-a-govindraju@ti.com
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Add binding for J721S2 SoC
Signed-off-by: Aswath Govindraju <a-govindraju@ti.com>
Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>
Reviewed-by: Kishon Vijay Abraham I <kishon@ti.com>
Acked-by: Rob Herring <robh@kernel.org>
Link: https://lore.kernel.org/r/20211207080904.14324-2-a-govindraju@ti.com
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The SPEAr320s SOC is a SPEAr320 SOC variant.
Mostly identical to the SPEAr320 SOC variant, it has a
new interrupt routing for PL_PGIOs.
Add spear320s.dtsi to handle SPEAr320s SOC
Signed-off-by: Herve Codina <herve.codina@bootlin.com>
Link: https://lore.kernel.org/r/20211202095255.165797-7-herve.codina@bootlin.com'
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
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Resources used by plgpio and pinmux are conflicting on SPEAr310
and SPEAr320.
Use the newly introduced regmap property in plgpio node to use
pinmux resources from plgpio and so avoid the conflict.
Signed-off-by: Herve Codina <herve.codina@bootlin.com>
Link: https://lore.kernel.org/r/20211202095255.165797-5-herve.codina@bootlin.com'
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
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Disable mcasp nodes 0-2 because several required properties
are not present in the dtsi file as they are board specific.
These nodes can be enabled via an overlay whenever required.
Signed-off-by: Jayesh Choudhary <j-choudhary@ti.com>
Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>
Acked-by: Jan Kiszka <jan.kiszka@siemens.com>
Link: https://lore.kernel.org/r/20211117053806.10095-1-j-choudhary@ti.com
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QSPI0 comunicates with a MX66LM1G45G SPI NOR flash.
Enable the controller and describe the flash.
Signed-off-by: Tudor Ambarus <tudor.ambarus@microchip.com>
Signed-off-by: Nicolas Ferre <nicolas.ferre@microchip.com>
Link: https://lore.kernel.org/r/20211209123643.341892-2-tudor.ambarus@microchip.com
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sama7g5 embedds 2 instances of QSPI controller:
1/ OSPI0 Supporting Up to 200 MHz DDR. Octal, TwinQuad, Hyperflash
and OctaFlash Protocols Supported.
2/ QSPI1 Supporting Up to 90 MHz DDR/133 MHz SDR.
Signed-off-by: Tudor Ambarus <tudor.ambarus@microchip.com>
Signed-off-by: Nicolas Ferre <nicolas.ferre@microchip.com>
Link: https://lore.kernel.org/r/20211209123643.341892-1-tudor.ambarus@microchip.com
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Naming clocks is a good practice. The atmel-quadspi driver supports
an unnamed clock for the peripheral clock in order to be backward
compatible with old DTs, but it is recommended to name the clocks
on new DTs. The driver's bindings file requires the clock-names
property, so name the clock.
Signed-off-by: Tudor Ambarus <tudor.ambarus@microchip.com>
Signed-off-by: Nicolas Ferre <nicolas.ferre@microchip.com>
Link: https://lore.kernel.org/r/20211209102542.254153-1-tudor.ambarus@microchip.com
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This adds a device tree for the Gateway 7001 AP, based on
Intel IXP422.
Cc: Imre Kaloz <kaloz@openwrt.org>
Signed-off-by: Zoltan HERPAI <wigyori@uid0.hu>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
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This patch fixes the Bluetooth on ROCK Pi 4 boards.
ROCK Pi 4 boards has BCM4345C5 and now it is supported
on Mainline Linux, brcm,bcm43438-bt still working but
observed the BT Audio issues with latest test.
So, use the BCM4345C5 compatible and its associated
properties like clock-names as lpo and max-speed.
Attach vbat and vddio supply rails as well.
Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Link: https://lore.kernel.org/r/20211112142359.320798-1-jagan@amarulasolutions.com
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
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Add second DSI compatible to comply with DT schema validation
comming in the second patch.
Signed-off-by: David Heidelberg <david@ixit.cz>
Link: https://lore.kernel.org/r/20211211233818.88482-1-david@ixit.cz
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
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Add the watchdog node which also enables reboot support on the t8103.
Signed-off-by: Sven Peter <sven@svenpeter.dev>
Signed-off-by: Hector Martin <marcan@marcan.st>
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This new SoC uses the same pinctrl hardware, so just add a new per-SoC
compatible.
Reviewed-by: Mark Kettenis <kettenis@openbsd.org>
Acked-by: Rob Herring <robh@kernel.org>
Signed-off-by: Hector Martin <marcan@marcan.st>
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This new SoC is compatible with the existing driver, but the block
supports 4 downstream ports, so we need to adjust the binding to
allow that.
Reviewed-by: Mark Kettenis <kettenis@openbsd.org>
Acked-by: Rob Herring <robh@kernel.org>
Signed-off-by: Hector Martin <marcan@marcan.st>
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This block is compatible with t8103, so just add the new per-SoC
compatible under apple,i2c.
Reviewed-by: Mark Kettenis <kettenis@openbsd.org>
Reviewed-by: Sven Peter <sven@svenpeter.dev>
Acked-by: Rob Herring <robh@kernel.org>
Signed-off-by: Hector Martin <marcan@marcan.st>
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This adds the initial apple,t6000 platforms:
- apple,j314s - MacBook Pro (14-inch, M1 Pro, 2021)
- apple,j316s - MacBook Pro (16-inch, M1 Pro, 2021)
And the initial apple,t6001 platforms:
- apple,j314c - MacBook Pro (14-inch, M1 Max, 2021)
- apple,j316c - MacBook Pro (16-inch, M1 Max, 2021)
Reviewed-by: Mark Kettenis <kettenis@openbsd.org>
Acked-by: Rob Herring <robh@kernel.org>
Signed-off-by: Hector Martin <marcan@marcan.st>
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This is required for DCP to boot successfully; it seems if power gating
is allowed, they do not wake up properly.
Reviewed-by: Sven Peter <sven@svenpeter.dev>
Signed-off-by: Hector Martin <marcan@marcan.st>
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A few devices (DCP/DCPEXT) need to have the minimum power state for
auto-PM configured. Add a property that allows the DT to specify this
value.
Reviewed-by: Rob Herring <robh@kernel.org>
Signed-off-by: Hector Martin <marcan@marcan.st>
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The Quartz64 Model A has the SPI pins broken out on its pin
header. The actual pins being used though are not the m0
variant, but the m1 variant, which also lacks the cs1 pin.
This commit overrides pinctrl-0 accordingly for this board.
spi1 is intentionally left disabled, as anyone wishing to add
SPI devices needs to edit the dts anyway, and the pins are more
useful as GPIOs for the rest of the users.
Signed-off-by: Nicolas Frattaroli <frattaroli.nicolas@gmail.com>
Link: https://lore.kernel.org/r/20211127141910.12649-4-frattaroli.nicolas@gmail.com
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
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This adds the four spi nodes (spi0, spi1, spi2, spi3) to the
rk356x dtsi. These are from the downstream device tree, though
I have double-checked that their interrupts and DMA numbers are
correct. I have also tested spi1 with an SPI device.
Signed-off-by: Nicolas Frattaroli <frattaroli.nicolas@gmail.com>
Link: https://lore.kernel.org/r/20211127141910.12649-3-frattaroli.nicolas@gmail.com
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
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The pinctrl state "active" is neither documented nor used by the PWM
driver. Rename it to "default"
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Link: https://lore.kernel.org/r/20211208120312.3300390-1-s.hauer@pengutronix.de
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
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The old "ak" vendor prefix that was never officially accepted was still
being used in some device trees. Convert to the correct vendor prefix
(i.e. "asahi-kasei").
Signed-off-by: Thierry Reding <treding@nvidia.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
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The TI wlcore DT bindings specify using a single compatible value for
each variant, and the Linux kernel driver matches against the first
compatible value since commit 078b30da3f074f2e ("wlcore: add wl1285
compatible") in v4.13.
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Reviewed-by: Sebastian Reichel <sebastian.reichel@collabora.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
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ADC0 and ADC1 pins are available on external connector J22.
Enable ADC1 which was missing.
Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
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This hardware module is close to the am33xx ADC module but instead of
featuring a touchscreen it has a magnetic reader capability.
Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
Acked-by: Tony Lindgren <tony@atomide.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
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Back in 2014 a property got misspelled "ti,coordiante-readouts" instead
of "ti,coordinate-readouts".
The year after it got fixed but both are still supported, although this
is not a reason to continue using this old deprecated property.
Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
Acked-by: Tony Lindgren <tony@atomide.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
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On the am335x-icev2 board [1], AM3359 PMIC_PWR_EN (ZCZ ball C6) is
connected to PWRHOLD (pin 1) on the TPS65910A3 PMIC. The addition of
system-power-controller to the rtc node will enable the capability of
the RTC driver to poweroff the board.
Based on commit 15c7be47fb7c ("ARM: dts: am335x: Add rtc node as
system-power-controller") by Keerthy in ti-linux-5.4.y branch [2].
[1] https://www.ti.com/tool/TMDSICE3359
[2] git://git.ti.com/ti-linux-kernel/ti-linux-kernel.git
Cc: Dave Gerlach <d-gerlach@ti.com>
Cc: Keerthy <j-keerthy@ti.com>
Link: https://lore.kernel.org/linux-omap/20211012191311.879838-1-dfustini@baylibre.com/
Suggested-by: Johan Hovold <johan@kernel.org>
Signed-off-by: Drew Fustini <dfustini@baylibre.com>
Reviewed-by: Johan Hovold <johan@kernel.org>
Signed-off-by: Tony Lindgren <tony@atomide.com>
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Move the rtc node system-power-controller property from
am335x-boneblack-common.dtsi to am335x-bone-common.dtsi.
am335x-boneblack-common.dtsi is included by am335x-boneblack.dts,
am335x-boneblack-wireless.dts, am335x-sancloud-bbe.dts and
am335x-sancloud-bbe-lite.dts. All of these dts files also include
am335x-bone-common.dtsi and thus will retain the rtc node
system-power-controller property.
am335x-bone-common.dtsi is also included by am335x-bone.dts [1],
am335x-bonegreen.dts [2] and am335x-bonegreen-wireless.dts [3]. These
boards will now have the rtc node system-power-controller property too.
This is valid as they also have PMIC_POWR_EN (ZCZ C6) connected to
PWR_EN on the TPS65217B PMIC.
Based on commit 15c7be47fb7c ("ARM: dts: am335x: Add rtc node as
system-power-controller") by Keerthy in ti-linux-5.4.y branch [4].
[1] https://beagleboard.org/static/beaglebone/BEAGLEBONE_SCHEM_A3.pdf
[2] https://github.com/SeeedDocument/BeagleBone_Green/blob/master/resources/BEAGLEBONE_GREEN_V1.pdf
[3] https://github.com/SeeedDocument/BeagleBone_Green_Wireless/blob/master/resources/BeagleBone_Green%20Wireless_V1.0_SCH_20160314.pdf
[4] git://git.ti.com/ti-linux-kernel/ti-linux-kernel.git
Cc: Jason Kridner <jkridner@beagleboard.org>
Cc: Dave Gerlach <d-gerlach@ti.com>
Cc: Keerthy <j-keerthy@ti.com>
Link: https://lore.kernel.org/linux-omap/20211012191311.879838-1-dfustini@baylibre.com/
Suggested-by: Johan Hovold <johan@kernel.org>
Reviewed-by: Johan Hovold <johan@kernel.org>
Signed-off-by: Drew Fustini <dfustini@baylibre.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
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Vendor prefix shouldn't start with capital letter. The Elpida Memory
compatible was never used in practice, hence just correct the compatible.
Signed-off-by: Dmitry Osipenko <digetx@gmail.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
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Add KSZ9477 managed switch evaluation kit with SAMA5D36 MPU:
https://www.microchip.com/en-us/development-tool/evb-ksz9477
Signed-off-by: Oleksij Rempel <o.rempel@pengutronix.de>
Signed-off-by: Nicolas Ferre <nicolas.ferre@microchip.com>
Link: https://lore.kernel.org/r/20211111081045.711323-1-o.rempel@pengutronix.de
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