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2021-12-01arm64: dts: Update NAND MTD partition for Agilex and Stratix 10Sin Hui Kho
Change NAND flash MTD partition in device tree after implementation of UBI and UBIFS. "u-boot" partition remain for raw u-boot image, but "root" partition is use for UBI image containing all other components. Signed-off-by: Sin Hui Kho <sin.hui.kho@intel.com> Signed-off-by: Dinh Nguyen <dinguyen@kernel.org>
2021-12-01arm64: dts: meson: p241: add sound supportJerome Brunet
Add the p241 sound card support. This board can play audio through HDMI and the internal DAC. Signed-off-by: Jerome Brunet <jbrunet@baylibre.com> Reviewed-by: Neil Armstrong <narmstrong@baylibre.com> Signed-off-by: Neil Armstrong <narmstrong@baylibre.com> Link: https://lore.kernel.org/r/20211130100159.214489-3-jbrunet@baylibre.com
2021-12-01arm64: dts: meson: p241: add vcc_5v regulatorJerome Brunet
Add the VCC_5V regulator, which feeds the HDMI, USB and audio amplifier. Signed-off-by: Jerome Brunet <jbrunet@baylibre.com> Reviewed-by: Neil Armstrong <narmstrong@baylibre.com> Signed-off-by: Neil Armstrong <narmstrong@baylibre.com> Link: https://lore.kernel.org/r/20211130100159.214489-2-jbrunet@baylibre.com
2021-12-01ARM: dts: sun8i: Adjust power key nodesJernej Skrabec
Several H3 and one H2+ board have power key nodes, which are slightly off. Some are missing wakeup-source property and some have BTN_0 code assigned instead of KEY_POWER. Adjust them, so they can function as intended by designer. Co-developed-by: Michael Klein <michael@fossekall.de> Signed-off-by: Michael Klein <michael@fossekall.de> Signed-off-by: Jernej Skrabec <jernej.skrabec@gmail.com> Acked-by: Chen-Yu Tsai <wens@csie.org> Signed-off-by: Maxime Ripard <maxime@cerno.tech> Link: https://lore.kernel.org/r/20211129165510.370717-1-jernej.skrabec@gmail.com
2021-11-30arm64: dts: n5x: add qspi, usb, and ethernet supportDinh Nguyen
Populate the N5X board dts file with support for QSPI, USB, and ethernet. Signed-off-by: Dinh Nguyen <dinguyen@kernel.org>
2021-11-29ARM: dts: stm32: fix stusb1600 pinctrl used on stm32mp157c-dkFabrice Gasnier
A pinctrl handle is used to setup a pull-up on the stusb1600 IRQ pin (that is open drain). When in ANALOG state, no pull-up can be applied in the GPIO HW controller, still the setting is done into the register. The pull-up is effective currently, only when the GPIO IRQ is requested. The correct setting is to use directly the GPIO, instead of ANALOG state. Signed-off-by: Fabrice Gasnier <fabrice.gasnier@foss.st.com> Signed-off-by: Alexandre Torgue <alexandre.torgue@foss.st.com>
2021-11-26arm64: dts: renesas: r8a779a0: Add DU supportKieran Bingham
Provide the device nodes for the DU on the V3U platforms. Reviewed-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com> Signed-off-by: Kieran Bingham <kieran.bingham+renesas@ideasonboard.com> Link: https://lore.kernel.org/r/20211126095445.932930-2-kieran.bingham+renesas@ideasonboard.com Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
2021-11-26arm64: dts: renesas: salvator-common: Merge hdmi0_conKieran Bingham
The remote endpoint for the hdmi connector is specfied through a reference to the hdmi0_con endpoint, which is in the same file. Simplify by specifying the remote-endpoint directly in the hdmi0_con endpoint. Signed-off-by: Kieran Bingham <kieran.bingham+renesas@ideasonboard.com> Reviewed-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com> Link: https://lore.kernel.org/r/20211124152815.3926961-3-kieran.bingham+renesas@ideasonboard.com Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
2021-11-26arm64: dts: renesas: ulcb: Merge hdmi0_conKieran Bingham
The remote endpoint for the hdmi connector is specfied through a reference to the hdmi0_con endpoint, which is in the same file. Simplify by specifying the remote-endpoint directly in the hdmi0_con endpoint. Signed-off-by: Kieran Bingham <kieran.bingham+renesas@ideasonboard.com> Reviewed-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com> Link: https://lore.kernel.org/r/20211124152815.3926961-2-kieran.bingham+renesas@ideasonboard.com Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
2021-11-26arm64: dts: renesas: r9a07g044: Add OPP tableBiju Das
Add OPP table for RZ/G2L SoC. Signed-off-by: Biju Das <biju.das.jz@bp.renesas.com> Reviewed-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com> Link: https://lore.kernel.org/r/20211124154316.28365-1-biju.das.jz@bp.renesas.com Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
2021-11-26arm64: dts: renesas: Fix operating point table node namesGeert Uytterhoeven
Align the node names of device nodes representing operating point v2 tables with the expectations of the DT bindings in Documentation/devicetree/bindings/opp/opp-v2.yaml. Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> Reviewed-by: Niklas Söderlund <niklas.soderlund+renesas@ragnatech.se> Link: https://lore.kernel.org/r/ac885456ffb00fa4cc4069b9967761df2c98c3d8.1637764588.git.geert+renesas@glider.be
2021-11-26arm64: dts: renesas: rzg2l-smarc-som: Enable watchdogBiju Das
Enable watchdog{0, 1, 2} interfaces on RZ/G2L SMARC EVK. Signed-off-by: Biju Das <biju.das.jz@bp.renesas.com> Reviewed-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com> Link: https://lore.kernel.org/r/20211123141420.23529-3-biju.das.jz@bp.renesas.com Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
2021-11-26arm64: dts: renesas: r9a07g044: Add WDT nodesBiju Das
Add WDT{0, 1, 2} nodes to RZ/G2L SoC DTSI. Signed-off-by: Biju Das <biju.das.jz@bp.renesas.com> Reviewed-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com> Link: https://lore.kernel.org/r/20211123141420.23529-2-biju.das.jz@bp.renesas.com Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
2021-11-26arm64: dts: renesas: r9a07g044: Rename SDHI clocksBiju Das
Rename the below SDHI clocks to match with the clocks used in driver. imclk->core clk_hs->clkh imclk2->cd Also re-arrange the clocks to match with the sorting order used in the binding document. Signed-off-by: Biju Das <biju.das.jz@bp.renesas.com> Acked-by: Ulf Hansson <ulf.hansson@linaro.org> Link: https://lore.kernel.org/r/20211122103905.14439-3-biju.das.jz@bp.renesas.com Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
2021-11-26arm64: dts: renesas: rzg2l-smarc-som: Enable serial NOR flashLad Prabhakar
Enable mt25qu512a flash connected to QSPI0. Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com> Reviewed-by: Biju Das <biju.das.jz@bp.renesas.com> Link: https://lore.kernel.org/r/20211121234906.9602-1-prabhakar.mahadev-lad.rj@bp.renesas.com Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
2021-11-26arm64: dts: renesas: rzg2l-smarc-som: Enable OSTMBiju Das
Enable OSTM{1, 2} interfaces on RZ/G2L SMARC EVK. OSTM0 is reserved for TF-A. Signed-off-by: Biju Das <biju.das.jz@bp.renesas.com> Reviewed-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com> Link: https://lore.kernel.org/r/20211118191826.2026-3-biju.das.jz@bp.renesas.com Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
2021-11-26arm64: dts: renesas: r9a07g044: Add OSTM nodesBiju Das
Add OSTM{0,1,2} nodes to RZ/G2L SoC DTSI. Signed-off-by: Biju Das <biju.das.jz@bp.renesas.com> Reviewed-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com> Link: https://lore.kernel.org/r/20211118191826.2026-2-biju.das.jz@bp.renesas.com Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
2021-11-26arm64: dts: renesas: r9a07g044: Sort psci nodeBiju Das
Sort psci node alphabetically. Signed-off-by: Biju Das <biju.das.jz@bp.renesas.com> Reviewed-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com> Link: https://lore.kernel.org/r/20211112081003.15453-4-biju.das.jz@bp.renesas.com Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
2021-11-26dt-bindings: mmc: renesas,sdhi: Rename RZ/G2L clocksBiju Das
Rename the below RZ/G2L clocks to match with the clock names used in R-Car Gen2 and later generations. imclk->core clk_hs->clkh imclk2->cd This changes will avoid using fallback for RZ/G2L high speed clock, if "clkh" is not used in device tree and also the code changes in driver related to this clocks. Signed-off-by: Biju Das <biju.das.jz@bp.renesas.com> Reviewed-by: Wolfram Sang <wsa+renesas@sang-engineering.com> Acked-by: Ulf Hansson <ulf.hansson@linaro.org> Link: https://lore.kernel.org/r/20211122103905.14439-2-biju.das.jz@bp.renesas.com Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
2021-11-26arm64: dts: ti: k3-j721e: correct cache-sets infoPeng Fan
A72 Cluster has 48KB Icache, 32KB Dcache and 1MB L2 Cache - ICache is 3-way set-associative - Dcache is 2-way set-associative - Line size are 64bytes So correct the cache-sets info. Fixes: 2d87061e70dea ("arm64: dts: ti: Add Support for J721E SoC") Signed-off-by: Peng Fan <peng.fan@nxp.com> Reviewed-by: Nishanth Menon <nm@ti.com> Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com> Link: https://lore.kernel.org/r/20211112063155.3485777-1-peng.fan@oss.nxp.com
2021-11-26arm64: dts: apple: change ethernet0 device type to ethernetJanne Grunau
Fixes make dtbs_check errors for t8103-j274.dts due to missing pci properties. Fixes: e1bebf978151 ("arm64: dts: apple: j274: Expose PCI node for the Ethernet MAC address") Reviewed-by: Mark Kettenis <kettenis@openbsd.org> Signed-off-by: Janne Grunau <j@jannau.net> Tested-by: Hector Martin <marcan@marcan.st> Signed-off-by: Hector Martin <marcan@marcan.st>
2021-11-25ARM: dts: stm32: tune the HS USB PHYs on stm32mp157c-ev1Fabrice Gasnier
This patch adds phy tuning parameters for usbphyc port0 (USBH controller) and usbphyc port1 (OTG controller). Phy tuning parameters are used to adjust the phy settings to compensate parasitics, which can be due to USB receptacle, routing, and ESD protection component. Signed-off-by: Amelie Delaunay <amelie.delaunay@foss.st.com> Signed-off-by: Fabrice Gasnier <fabrice.gasnier@foss.st.com> Signed-off-by: Alexandre Torgue <alexandre.torgue@foss.st.com>
2021-11-25ARM: dts: stm32: tune the HS USB PHYs on stm32mp15xx-dkxFabrice Gasnier
This patch adds phy tuning parameters for usbphyc port0 (USBH controller) and usbphyc port1 (OTG controller). Phy tuning parameters are used to adjust the phy settings to compensate parasitics, which can be due to USB receptacle, routing, and ESD protection component. Signed-off-by: Amelie Delaunay <amelie.delaunay@foss.st.com> Signed-off-by: Fabrice Gasnier <fabrice.gasnier@foss.st.com> Signed-off-by: Alexandre Torgue <alexandre.torgue@foss.st.com>
2021-11-25ARM: dts: stm32: clean uart4_idle_pins_a node for stm32mp15Erwan Le Ray
Clean useless spaces in uart4_idle_pins_a node. Signed-off-by: Erwan Le Ray <erwan.leray@foss.st.com> Signed-off-by: Alexandre Torgue <alexandre.torgue@foss.st.com>
2021-11-25ARM: dts: stm32: add pull-up to USART3 and UART7 RX pins on STM32MP15 DKx boardsErwan Le Ray
Add pull-up to USART3 and UART7 RX pins to allow loop tests between USART3 and UART7 on stm32mp15 DKx boards. Signed-off-by: Erwan Le Ray <erwan.leray@foss.st.com> Signed-off-by: Alexandre Torgue <alexandre.torgue@foss.st.com>
2021-11-25ARM: dts: stm32: fix dtbs_check warning on ili9341 dts binding on stm32f429 ↵Dillon Min
disco Since the compatible string defined from ilitek,ili9341.yaml is "st,sf-tc240t-9370-t", "ilitek,ili9341" so, append "ilitek,ili9341" to avoid the below dtbs_check warning. arch/arm/boot/dts/stm32f429-disco.dt.yaml: display@1: compatible: ['st,sf-tc240t-9370-t'] is too short Fixes: a726e2f000ec ("ARM: dts: stm32: enable ltdc binding with ili9341, gyro l3gd20 on stm32429-disco board") Signed-off-by: Dillon Min <dillon.minfei@gmail.com> Reported-by: kernel test robot <lkp@intel.com> Reviewed-by: Linus Walleij <linus.walleij@linaro.org> Signed-off-by: Alexandre Torgue <alexandre.torgue@foss.st.com>
2021-11-23ARM: dts: ux500: Fixup Gavini magnetometerLinus Walleij
The Gavini device tree had the wrong magnetometer specified, this should be a YAS530. Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2021-11-23arm64: dts: allwinner: a64: Update MBUS nodeSamuel Holland
In order to support memory dynamic frequency scaling (MDFS), the MBUS binding now requires enumerating more resources. Provide them in the device tree. Reviewed-by: Chanwoo Choi <cw00.choi@samsung.com> Signed-off-by: Samuel Holland <samuel@sholland.org> Signed-off-by: Maxime Ripard <maxime@cerno.tech> Link: https://lore.kernel.org/r/20211118031841.42315-6-samuel@sholland.org
2021-11-23ARM: dts: sunxi: h3/h5: Update MBUS nodeSamuel Holland
In order to support memory dynamic frequency scaling (MDFS), the MBUS binding now requires enumerating more resources. Provide them in the device tree. Since the H3 and H5 have different clock divider limits, they need separate compatibles. Reviewed-by: Chanwoo Choi <cw00.choi@samsung.com> Signed-off-by: Samuel Holland <samuel@sholland.org> Signed-off-by: Maxime Ripard <maxime@cerno.tech> Link: https://lore.kernel.org/r/20211118031841.42315-5-samuel@sholland.org
2021-11-23dt-bindings: arm: sunxi: Add H5 MBUS compatibleSamuel Holland
The H5 SoC has a MBUS very similar to the H3 SoC, but it has a smaller MDFS divider range (1-4 instead of 1-16). Add a separate compatible for this variant. Acked-by: Rob Herring <robh@kernel.org> Signed-off-by: Samuel Holland <samuel@sholland.org> Signed-off-by: Maxime Ripard <maxime@cerno.tech> Link: https://lore.kernel.org/r/20211118031841.42315-4-samuel@sholland.org
2021-11-23dt-bindings: arm: sunxi: Expand MBUS bindingSamuel Holland
The MBUS provides more than address translation and bandwidth control. It also provides a PMU to measure bandwidth usage by certain masters, and it provides notification via IRQ when they are active or idle. The MBUS is also tightly integrated with the DRAM controller to provide a Memory Dynamic Frequency Scaling (MDFS) feature. In view of this, the MBUS binding needs to represent the hardware resources needed for MDFS, which include the clocks and MMIO range of the adjacent DRAM controller. Add the additional resources for the H3 and A64 compatibles, and a new example showing how they are used. Reviewed-by: Chanwoo Choi <cw00.choi@samsung.com> Signed-off-by: Samuel Holland <samuel@sholland.org> Signed-off-by: Maxime Ripard <maxime@cerno.tech> Link: https://lore.kernel.org/r/20211118031841.42315-3-samuel@sholland.org
2021-11-23dt-bindings: clock: sunxi: Export CLK_DRAM for devfreqSamuel Holland
The MBUS node needs to reference the CLK_DRAM clock, as the MBUS hardware implements memory dynamic frequency scaling using this clock. Export this clock for SoCs which will be getting a devfreq driver. Acked-by: Rob Herring <robh@kernel.org> Reviewed-by: Chanwoo Choi <cw00.choi@samsung.com> Signed-off-by: Samuel Holland <samuel@sholland.org> Signed-off-by: Maxime Ripard <maxime@cerno.tech> Link: https://lore.kernel.org/r/20211118031841.42315-2-samuel@sholland.org
2021-11-23ARM: dts: ux500: Add reset lines to IP blocksLinus Walleij
The new reset controller makes is possible to add reset lines to a host of IP blocks in the DB8500/U8500. Cc: Ulf Hansson <ulf.hansson@linaro.org> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2021-11-22ARM: dts: milbeaut: set clock phandle to uart nodeSugaya Taichi
Set clock phandle to uart node for Milbeaut M10V support. Signed-off-by: Sugaya Taichi <sugaya.taichi@socionext.com> Link: https://lore.kernel.org/r/1636968656-14033-4-git-send-email-sugaya.taichi@socionext.com' Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2021-11-22ARM: dts: milbeaut: set clock phandle to timer nodeSugaya Taichi
Set clock phandle to timer node for Milbeaut M10V support. Signed-off-by: Sugaya Taichi <sugaya.taichi@socionext.com> Link: https://lore.kernel.org/r/1636968656-14033-3-git-send-email-sugaya.taichi@socionext.com' Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2021-11-22ARM: dts: milbeaut: add a clock node for M10VSugaya Taichi
Add a clock node for the platform of the Milbeaut M10V. Signed-off-by: Sugaya Taichi <sugaya.taichi@socionext.com> Link: https://lore.kernel.org/r/1636968656-14033-2-git-send-email-sugaya.taichi@socionext.com' Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2021-11-22dt-bindings: crypto: Add optional dma propertiesMaxime Ripard
Some platforms, like the v3s, have DMA channels assigned to the crypto engine, which were in the DTSI but were never documented. Let's make sure they are. Signed-off-by: Maxime Ripard <maxime@cerno.tech> Acked-by: Corentin Labbe <clabbe.montjoie@gmail.com> Acked-by: Jernej Skrabec <jernej.skrabec@gmail.com> Link: https://lore.kernel.org/r/20211116143255.385480-1-maxime@cerno.tech
2021-11-22ARM: dts: sun8i: h3: beelink-x2: Add GPIO CEC nodeJernej Skrabec
Beelink X2 doesn't use HW CEC controller found in DW HDMI core. It has dedicated GPIO pin for that purpose. Add a node for it. Signed-off-by: Jernej Skrabec <jernej.skrabec@gmail.com> Signed-off-by: Maxime Ripard <maxime@cerno.tech> Link: https://lore.kernel.org/r/20211120102024.439456-1-jernej.skrabec@gmail.com
2021-11-22ARM: dts: sunxi: Add CEC clock to DW-HDMIJernej Skrabec
Experimentation determined that HDMI CEC controller inside DW HDMI block depends on 32k clock from RTC. If this clock is tampered with, HDMI CEC communication starts or stops working, depending on situation. SoC user manual doesn't say anything about CEC, so this was overlooked. Fix this by adding dependency to RTC 32k clock. Signed-off-by: Jernej Skrabec <jernej.skrabec@gmail.com> Signed-off-by: Maxime Ripard <maxime@cerno.tech> Link: https://lore.kernel.org/r/20211120073448.32480-3-jernej.skrabec@gmail.com
2021-11-22arm64: dts: allwinner: a64: Add CEC clock to HDMIJernej Skrabec
Experimentation determined that HDMI CEC controller inside DW HDMI block depends on 32k clock from RTC. If this clock is tampered with, HDMI CEC communication starts or stops working, depending on situation. SoC user manual doesn't say anything about CEC, so this was overlooked. Fix this by adding dependency to RTC 32k clock. Signed-off-by: Jernej Skrabec <jernej.skrabec@gmail.com> Signed-off-by: Maxime Ripard <maxime@cerno.tech> Link: https://lore.kernel.org/r/20211120073448.32480-2-jernej.skrabec@gmail.com
2021-11-22ARM: dts: sun8i: h3: beelink-x2: Sort nodesJernej Skrabec
Nodes are not sorted alphabetically. Do it. There is no functional change. Signed-off-by: Jernej Skrabec <jernej.skrabec@gmail.com> Acked-by: Chen-Yu Tsai <wens@csie.org> Signed-off-by: Maxime Ripard <maxime@cerno.tech> Link: https://lore.kernel.org/r/20211121070321.601659-1-jernej.skrabec@gmail.com
2021-11-22arm64: dts: allwinner: h6: tanix-tx6: Add I2C nodeJernej Skrabec
Tanix TX6 has a LED display driven by FD650. Currently there is no Linux driver nor any binding for it. However, we can at least provide I2C node in DT, so user space scripts or programs can manually control it. Signed-off-by: Jernej Skrabec <jernej.skrabec@gmail.com> Signed-off-by: Maxime Ripard <maxime@cerno.tech> Link: https://lore.kernel.org/r/20211121115002.693329-1-jernej.skrabec@gmail.com
2021-11-21Linux 5.16-rc2v5.16-rc2Linus Torvalds
2021-11-21Merge tag 'x86-urgent-2021-11-21' of ↵Linus Torvalds
git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip Pull x86 fixes from Thomas Gleixner: - Move the command line preparation and the early command line parsing earlier so that the command line parameters which affect early_reserve_memory(), e.g. efi=nosftreserve, are taken into account. This was broken when the invocation of early_reserve_memory() was moved recently. - Use an atomic type for the SGX page accounting, which is read and written locklessly, to plug various race conditions related to it. * tag 'x86-urgent-2021-11-21' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip: x86/sgx: Fix free page accounting x86/boot: Pull up cmdline preparation and early param parsing
2021-11-21Merge tag 'perf-urgent-2021-11-21' of ↵Linus Torvalds
git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip Pull x86 perf fixes from Thomas Gleixner: - Remove unneded PEBS disabling when taking LBR snapshots to prevent an unchecked MSR access error. - Fix IIO event constraints for Snowridge and Skylake server chips. * tag 'perf-urgent-2021-11-21' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip: x86/perf: Fix snapshot_branch_stack warning in VM perf/x86/intel/uncore: Fix IIO event constraints for Snowridge perf/x86/intel/uncore: Fix IIO event constraints for Skylake Server perf/x86/intel/uncore: Fix filter_tid mask for CHA events on Skylake Server
2021-11-21Merge tag 'powerpc-5.16-2' of ↵Linus Torvalds
git://git.kernel.org/pub/scm/linux/kernel/git/powerpc/linux Pull more powerpc fixes from Michael Ellerman: - Fix a bug in copying of sigset_t for 32-bit systems, which caused X to not start. - Fix handling of shared LSIs (rare) with the xive interrupt controller (Power9/10). - Fix missing TOC setup in some KVM code, which could result in oopses depending on kernel data layout. - Fix DMA mapping when we have persistent memory and only one DMA window available. - Fix further problems with STRICT_KERNEL_RWX on 8xx, exposed by a recent fix. - A couple of other minor fixes. Thanks to Alexey Kardashevskiy, Aneesh Kumar K.V, Cédric Le Goater, Christian Zigotzky, Christophe Leroy, Daniel Axtens, Finn Thain, Greg Kurz, Masahiro Yamada, Nicholas Piggin, and Uwe Kleine-König. * tag 'powerpc-5.16-2' of git://git.kernel.org/pub/scm/linux/kernel/git/powerpc/linux: powerpc/xive: Change IRQ domain to a tree domain powerpc/8xx: Fix pinned TLBs with CONFIG_STRICT_KERNEL_RWX powerpc/signal32: Fix sigset_t copy powerpc/book3e: Fix TLBCAM preset at boot powerpc/pseries/ddw: Do not try direct mapping with persistent memory and one window powerpc/pseries/ddw: simplify enable_ddw() powerpc/pseries/ddw: Revert "Extend upper limit for huge DMA window for persistent memory" powerpc/pseries: Fix numa FORM2 parsing fallback code powerpc/pseries: rename numa_dist_table to form2_distances powerpc: clean vdso32 and vdso64 directories powerpc/83xx/mpc8349emitx: Drop unused variable KVM: PPC: Book3S HV: Use GLOBAL_TOC for kvmppc_h_set_dabr/xdabr()
2021-11-21arm64: dts: rockchip: Enable HDD power on helios64Florian Klink
This adds the hdd_{a,b}_power blocks present in the armbian helios64 dts. [1] Without those powered up, no HDDs will appear (except one connected via the m.2 slot). >From https://wiki.kobol.io/helios64/sata/#hdd-power: > The power delivery of the HDDs is divided into two group: > > HDD Rail A (Max. 3x Drives) > HDD Rail B (Max. 2x Drives) > > Helios64 implements a power staggering approach where HDD Rail A will be > powered up first, then few seconds later HDD Rail B will be powered up. > This power control scenario is performed to reduce the inrush current > during disk spin-up. In practice, this power staggering approach will be included in the bootloader (not in the kernel), as we might want to boot from a SATA drive. >From my experiments, if the bootloader doesn't implement the power staggering, only one HDD will get recognized (probably cause the others didn't boot due to few power). Still, it makes sense to expose this block in the device-tree, so the kernel can ensure both rails are on (and this can be shared with u-boot). [1] https://github.com/armbian/build/blob/744ea89a589d62cb6f409baab60fc6664520bc39/patch/kernel/archive/rockchip64-5.14/add-board-helios64.patch Signed-off-by: Florian Klink <flokli@flokli.de> Tested-by: Dennis Gilmore <dgilmore@redhat.com> Link: https://lore.kernel.org/r/20211020095926.735938-1-flokli@flokli.de Signed-off-by: Heiko Stuebner <heiko@sntech.de>
2021-11-21arm64: dts: rockchip: add variables for pcie completion to helios64Dennis Gilmore
without ep-gpios defined u-boot does not initialise PCIe rockchip_pcie pcie@f8000000: failed to find ep-gpios property additionally set max-link-speed and pinctrl-names for completeness with this patch and the ones from Florian Klink applied to the dts file in u-boot sata drives show up in both u-boot and linux Signed-off-by: Dennis Gilmore <dgilmore@redhat.com> Acked-By: Florian Klink <flokli@flokli.de> Link: https://lore.kernel.org/r/20211029005323.144652-1-dgilmore@redhat.com Signed-off-by: Heiko Stuebner <heiko@sntech.de>
2021-11-21pstore/blk: Use "%lu" to format unsigned longGeert Uytterhoeven
On 32-bit: fs/pstore/blk.c: In function ‘__best_effort_init’: include/linux/kern_levels.h:5:18: warning: format ‘%zu’ expects argument of type ‘size_t’, but argument 3 has type ‘long unsigned int’ [-Wformat=] 5 | #define KERN_SOH "\001" /* ASCII Start Of Header */ | ^~~~~~ include/linux/kern_levels.h:14:19: note: in expansion of macro ‘KERN_SOH’ 14 | #define KERN_INFO KERN_SOH "6" /* informational */ | ^~~~~~~~ include/linux/printk.h:373:9: note: in expansion of macro ‘KERN_INFO’ 373 | printk(KERN_INFO pr_fmt(fmt), ##__VA_ARGS__) | ^~~~~~~~~ fs/pstore/blk.c:314:3: note: in expansion of macro ‘pr_info’ 314 | pr_info("attached %s (%zu) (no dedicated panic_write!)\n", | ^~~~~~~ Cc: stable@vger.kernel.org Fixes: 7bb9557b48fcabaa ("pstore/blk: Use the normal block device I/O path") Signed-off-by: Geert Uytterhoeven <geert@linux-m68k.org> Signed-off-by: Kees Cook <keescook@chromium.org> Link: https://lore.kernel.org/r/20210629103700.1935012-1-geert@linux-m68k.org Cc: Jens Axboe <axboe@kernel.dk> Reviewed-by: Christoph Hellwig <hch@lst.de> Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
2021-11-21arm64: dts: rockchip: define usb hub and 2.5GbE nic on helios64Dennis Gilmore
Add the 4 ports on the internal hub and define and turn on the 2.5GbE nic. Signed-off-by: Dennis Gilmore <dgilmore@redhat.com> Tested-by: Florian Klink <flokli@flokli.de> Link: https://lore.kernel.org/r/20211026150751.70115-1-dgilmore@redhat.com Signed-off-by: Heiko Stuebner <heiko@sntech.de>