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2012-11-16ARM: dts: imx6q-sabresd: add volume up/down gpio keysLiu Ying
Add volume up/down gpio keys support in imx6q-sabresd.dts. Signed-off-by: Liu Ying <Ying.Liu@freescale.com> Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
2012-11-16ARM: dts: imx53: pinctl updateRoland Stigge
This patch supplements pinctl support on i.MX53. Signed-off-by: Roland Stigge <stigge@antcom.de> Acked-by: Sascha Hauer <s.hauer@pengutronix.de> Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
2012-11-16ARM: imx: enable cpufreq for imx6qShawn Guo
It enables cpufreq support for imx6q with generic cpufreq-cpu0 driver. Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
2012-11-16ARM: dts: imx6q: enable snvs lp rtcShawn Guo
Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
2012-11-16ARM: dts: imx6q-sabreauto: Add basic supportFabio Estevam
mx6qsabreauto is a board based on mx6q SoC with the following features: - 2GB of DDR3 - 2 USB ports - 1 HDMI output port - SPI NOR - 2 LVDS LCD ports - Gigabit Ethernet - Camera - eMMC and SD card slot - Multichannel Audio - CAN - SATA - NAND - PCIE - Video Input Add very basic support for it. Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com> Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
2012-11-16ARM: imx6q: let users input debug uart port numberShawn Guo
imx6q gets 5 uart ports in total. Different board design may choose different port as debug uart. For example, imx6q-sabresd uses UART1, imx6q-sabrelite uses UART2 and imx6q-arm2 uses UART4. Rather than bloating DEBUG_LL choice list with all these uart ports, the patch introduces DEBUG_IMX6Q_UART_PORT for users to input uart port number when DEBUG_IMX6Q_UART is selected inside DEBUG_LL choice. Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
2012-11-16ARM: dts: imx53-qsb: Make DA9053 regulator functionalFabio Estevam
Setup the GPIO7_11 pin as interrupt to the DA9053 and also rename the regulator nodes so that they match with the datasheet. This allows probing of DA9053 to succeed. Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com> Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
2012-11-16ARM: dts: imx53-qsb: Use pinctrl for gpio-ledFabio Estevam
Since commit 8fe4554f (leds: leds-gpio: adopt pinctrl support) gpio-led driver has pinctrl support, so setup the gpio led pin via pinctrl and avoid the following warning: leds-gpio leds.2: pins are not configured from the driver Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com> Reviewed-by: Marek Vasut <marex@denx.de> Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
2012-11-16ARM i.MX dtsi: Add default bus-width property for esdhc controllerSascha Hauer
According to Documentation/devicetree/bindings/mmc/mmc.txt bus-width is a mandatory property. While this is currently enforced nowhere, it's a good habit to just add the property now to allow to add common helper functionality for the mmc property parsing later. Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de> Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
2012-11-15ARM: tegra: Add Tegra30 host1x supportThierry Reding
Add the host1x node along with its children to the Tegra30 DTSI. Board- specific DTS files are expected to enable the available outputs and complement the device tree with data specific to the hardware. Signed-off-by: Thierry Reding <thierry.reding@avionic-design.de> Signed-off-by: Stephen Warren <swarren@nvidia.com>
2012-11-15ARM: tegra: Add Tegra20 host1x supportThierry Reding
Add the host1x node along with its children to the Tegra20 DTSI. Board- specific DTS files are expected to enable the available outputs and complement the device tree with data specific to the hardware. Signed-off-by: Thierry Reding <thierry.reding@avionic-design.de> Signed-off-by: Stephen Warren <swarren@nvidia.com>
2012-11-15ARM: tegra: trimslice: enable SPI flashStephen Warren
TrimSlice contains a 1MiB SPI flash. Represent this in the device tree. Signed-off-by: Stephen Warren <swarren@nvidia.com>
2012-11-15ARM: tegra: dts: add sflash controller dt entryLaxman Dewangan
Nvidia's Tegra20 have the SPI (SFLASH) controller to interface with spi flash device which is used for system boot. Add DT entry for this controller. Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com> [swarren: move sflash node to keep file sorted] Signed-off-by: Stephen Warren <swarren@nvidia.com>
2012-11-15ARM: tegra: ventana: Add NCT1008 temperature sensorThierry Reding
The Harmony board has an ON Semiconductors NCT1008 temperature sensor connected to the DVC bus. It can be used to monitor the ambient (local) and on-die (remote) temperatures. Signed-off-by: Thierry Reding <thierry.reding@avionic-design.de> Tested-by: Stephen Warren <swarren@nvidia.com> Signed-off-by: Stephen Warren <swarren@nvidia.com>
2012-11-15ARM: tegra: tamonten: Add NCT1008 temperature sensorThierry Reding
The Tamonten SOM has an ON Semiconductor NCT1008 connected to the DVC bus which is used to measure the ambient (local) temperature as well as the on-die (remote) temperature. Signed-off-by: Thierry Reding <thierry.reding@avionic-design.de> Signed-off-by: Stephen Warren <swarren@nvidia.com>
2012-11-15ARM: tegra: harmony: Add ADT7641 temperature sensorThierry Reding
The Harmony board has an Analog Devices ADT7461 temperature sensor connected to the DVC bus. It can be used to monitor the ambient (local) and on-die (remote) temperatures. Signed-off-by: Thierry Reding <thierry.reding@avionic-design.de> Tested-by: Stephen Warren <swarren@nvidia.com> Signed-off-by: Stephen Warren <swarren@nvidia.com>
2012-11-15ARM: tegra: tec: Remove redundant DT propertiesThierry Reding
These properties are already set by the tegra20-tamonten.dtsi, so they don't need to be repeated. Signed-off-by: Thierry Reding <thierry.reding@avionic-design.de> Signed-off-by: Stephen Warren <swarren@nvidia.com>
2012-11-15ARM: tegra: tamonten: Add DDC/PTA pinmuxThierry Reding
This commit allows the I2C2 controller on Tegra20 to be routed either to the DDC or the PTA pin group at runtime. On Tamonten this allows the I2C bus to be used for the DDC of the HDMI connector or to access I2C chips on the carrier board. Signed-off-by: Thierry Reding <thierry.reding@avionic-design.de> Signed-off-by: Stephen Warren <swarren@nvidia.com>
2012-11-15ARM: tegra: dts: cardhu: enable SLINK4Laxman Dewangan
Enable SLINK4 and connected device in Tegra30 based platform Cardhu. Setting maximum spi frequency to 25MHz. SPI serial flash is connected on CS1 of SLINK4 on cardhu platform. Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com> [swarren: swapped reg/compatible order to be consistent] Signed-off-by: Stephen Warren <swarren@nvidia.com>
2012-11-15ARM: tegra: dts: add slink controller dt entryLaxman Dewangan
Add slink controller details in the dts file of Tegra20 and Tegra30. Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com> Signed-off-by: Stephen Warren <swarren@nvidia.com>
2012-11-15ARM: dt: tegra: ventana: define pinmux for ddcMark Zhang
Tegra 2's I2C2 controller can be routed to either the PTA or DDC pin group on Ventana. So: - Remove the HDMI function definition of pta pingroup - Define child i2c adapters(ddc & pta) for I2C2 controller Signed-off-by: Mark Zhang <markz@nvidia.com> Signed-off-by: Stephen Warren <swarren@nvidia.com>
2012-11-15ARM: dt: t30 cardhu: set pinmux and power for wlanWei Ni
Configure pinmux as required for WiFi. Enable the SDHCI1 controller for a02 and a04 board, which is connected to the WiFi module. For now, always enable the regulator that provides power to the Wifi module. Signed-off-by: Wei Ni <wni@nvidia.com> Signed-off-by: Stephen Warren <swarren@nvidia.com>
2012-11-15ARM: dt: t20 ventana: set pinmux and power for wlanWei Ni
Configure pinmux as required for WiFi. Enable the SDHCI1 controller, which is connectted to the WiFi module. Signed-off-by: Wei Ni <wni@nvidia.com> Signed-off-by: Stephen Warren <swarren@nvidia.com>
2012-11-15ARM: dt: t20 seaboard: turn on the power for wlanWei Ni
Enable the SDHCI1 controller. This is connected to the WiFi module. Signed-off-by: Wei Ni <wni@nvidia.com> Signed-off-by: Stephen Warren <swarren@nvidia.com>
2012-11-15ARM: tegra: Add Tegra30 host1x clock supportThierry Reding
Setup the clock parents for the two display controllers and HDMI. Signed-off-by: Thierry Reding <thierry.reding@avionic-design.de> Signed-off-by: Stephen Warren <swarren@nvidia.com>
2012-11-15ARM: tegra: Add AUXDATA for Tegra30 host1xThierry Reding
Add the OF_DEV_AUXDATA table entries required to associate the proper names with host1x and its children. In turn, this allows the devices to find the required clocks. Signed-off-by: Thierry Reding <thierry.reding@avionic-design.de> Signed-off-by: Stephen Warren <swarren@nvidia.com>
2012-11-15ARM: tegra: Add Tegra20 host1x clock supportThierry Reding
Extend the pll_d frequency table with a few entries to support common HDMI and LVDS display modes and setup the clock parents for the two display controllers and HDMI. Signed-off-by: Thierry Reding <thierry.reding@avionic-design.de> Signed-off-by: Stephen Warren <swarren@nvidia.com>
2012-11-15ARM: tegra: Add AUXDATA for Tegra20 host1xThierry Reding
Add the OF_DEV_AUXDATA table entries required to associate the proper names with host1x and its children. In turn, this allows the devices to find the required clocks. Signed-off-by: Thierry Reding <thierry.reding@avionic-design.de> Signed-off-by: Stephen Warren <swarren@nvidia.com>
2012-11-15ARM: tegra: Tegra30 speedo-based process identificationDanny Huang
This patch adds speedo-based process identification support for Tegra30. Signed-off-by: Danny Huang <dahuang@nvidia.com> [swarren s/Tegra3/Tegra30/ in log print, s/T30/Tegra30/ in commit description] Signed-off-by: Stephen Warren <swarren@nvidia.com>
2012-11-15ARM: tegra: Add speedo-based process identificationDanny Huang
Detect CPU and core process ID by checking speedo corner tables. This can provide a more accurate process ID. Signed-off-by: Danny Huang <dahuang@nvidia.com> [swarren s/Tegra2/Tegra20/ in log print] Signed-off-by: Stephen Warren <swarren@nvidia.com>
2012-11-15ARM: tegra: flexible spare fuse read functionDanny Huang
Change the spare fuse base from a definition to a variable. It provides flexibilty to read spare fuse on different chip. Signed-off-by: Danny Huang <dahuang@nvidia.com> Signed-off-by: Stephen Warren <swarren@nvidia.com>
2012-11-15Merge branch 'omap/cleanup-prcm-part2' into next/dtArnd Bergmann
This resolves a nontrivial conflict where the omap_prcm_restart is removed in one branch but another use is added in another branch. Conflicts: arch/arm/mach-omap2/cm33xx.c arch/arm/mach-omap2/io.c arch/arm/mach-omap2/prm_common.c Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2012-11-15Merge tag 'omap-for-v3.8/dt-signed' of ↵Arnd Bergmann
git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap into next/dt From Tony Lindgren <tony@atomide.com>: Device tree related changes for omaps updating the various .dts files, and timer related changes to allow configuring the timer via device tree. * tag 'omap-for-v3.8/dt-signed' of git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap: (48 commits) usb: musb: dsps: dt binding - add resources, example ARM: dts: omap4-sdp: Add pinmux configuration for HDMI ARM: dts: omap4-panda: Add pinmux configuration for HDMI ARM: dts: Makefile: Add the am335x-evmsk target in dtbs list ARM: dts: AM33XX: Add usbss node ARM: dts: AM33XX: Add push-buttons device tree data to am335x-evmsk ARM: dts: AM33XX: Add pinmux configuration for gpio-keys to EVMSK ARM: dts: AM33XX: Add user-leds device tree data to am335x-evmsk ARM: dts: AM33XX: Add pinmux configuration for gpio-leds to EVMSK ARM: dts: AM33XX: Add user-leds device tree data to am335x-bone ARM: dts: AM33XX: Add pinmux configuration for user-leds to BONE ARM: dts: AM33XX: Add volume-keys device tree data to am335x-evm ARM: dts: AM33XX: Add pinmux configuration for volume-keys to EVM ARM: dts: AM33XX: Add matrix keypad device tree data to am335x-evm ARM: dts: AM33XX: Add pinmux configuration for matrix keypad to EVM ARM: dts: omap5-evm: LPDDR2 memory device details for EVM ARM: dts: omap5: EMIF device tree data for OMAP5 boards ARM: dts: omap5-evm: Fix size of memory defined for EVM ARM: OMAP2+: Add device-tree support for 32kHz counter ARM: OMAP: Add DT support for timer driver ... Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2012-11-15Merge branch 'omap/headers4' into next/dtArnd Bergmann
These changes are needed for the following omap DT changes Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2012-11-14ARM: tegra: Implement 6395/1 for TegraPeter De Schrijver
This patch implements ARM linux patch 6395/1 for Tegra. See commit 1a8e41c "ARM: 6395/1: VExpress: Set bit 22 in the PL310 (cache controller) AuxCtlr register" for details. Signed-off-by: Peter De Schrijver <pdeschrijver@nvidia.com> [swarren: added commit subject for referenced patch] Signed-off-by: Stephen Warren <swarren@nvidia.com>
2012-11-14ARM: zynq: add clk binding support to the ttcJosh Cartwright
Add support for retrieving TTC configuration from device tree. This includes the ability to pull information about the driving clocks from the of_clk bindings. Signed-off-by: Josh Cartwright <josh.cartwright@ni.com> Acked-by: Michal Simek <michal.simek@xilinx.com>
2012-11-14ARM: zynq: use zynq clk bindingsJosh Cartwright
Make the Zynq platform use the newly created zynq clk bindings. Signed-off-by: Josh Cartwright <josh.cartwright@ni.com> Acked-by: Michal Simek <michal.simek@xilinx.com>
2012-11-14clk: Add support for fundamental zynq clksJosh Cartwright
Provide simplified models for the necessary clocks on the zynq-7000 platform. Currently, the PLLs, the CPU clock network, and the basic peripheral clock networks (for SDIO, SMC, SPI, QSPI, UART) are modelled. OF bindings are also provided and documented. Signed-off-by: Josh Cartwright <josh.cartwright@ni.com> Signed-off-by: Soren Brinkmann <soren.brinkmann@xilinx.com> Acked-by: Mike Turquette <mturquette@linaro.org> Acked-by: Michal Simek <michal.simek@xilinx.com>
2012-11-14ARM: LPC32xx: Add the motor PWM to base dts fileAlban Bedel
Signed-off-by: Alban Bedel <alban.bedel@avionic-design.de> Signed-off-by: Roland Stigge <stigge@antcom.de>
2012-11-13ARM: tegra: Add OF_DEV_AUXDATA for sflash driver in board dtLaxman Dewangan
Add OF_DEV_AUXDATA for sflash controller driver for Tegra20 board dt files. Set the parent clock of sflash controller to PLLP and configure clock to 20MHz. Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com> Signed-off-by: Stephen Warren <swarren@nvidia.com>
2012-11-12ARM: OMAP2: Fix compillation error in cm_commonPeter Ujfalusi
Fixes the following error: CC arch/arm/mach-omap2/cm_common.o arch/arm/mach-omap2/cm_common.c: In function ‘cm_register’: arch/arm/mach-omap2/cm_common.c:42:11: error: ‘EINVAL’ undeclared (first use in this function) arch/arm/mach-omap2/cm_common.c:42:11: note: each undeclared identifier is reported only once for each function it appears in arch/arm/mach-omap2/cm_common.c:45:11: error: ‘EEXIST’ undeclared (first use in this function) arch/arm/mach-omap2/cm_common.c: In function ‘cm_unregister’: arch/arm/mach-omap2/cm_common.c:66:11: error: ‘EINVAL’ undeclared (first use in this function) make[1]: *** [arch/arm/mach-omap2/cm_common.o] Error 1 make: *** [arch/arm/mach-omap2] Error 2 Signed-off-by: Peter Ujfalusi <peter.ujfalusi@ti.com> Acked-by: Paul Walmsley <paul@pwsan.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
2012-11-12ARM: zynq: dts: split up device treeJosh Cartwright
The purpose of the created zynq-7000.dtsi file is to describe the hardware common to all Zynq 7000-based boards. Also, get rid of the zynq-ep107 device tree, since it is not hardware anyone can purchase. Add a zc702 dts file based on the zynq-7000.dtsi. Add it to the dts/Makefile so it is built with the 'dtbs' target. Signed-off-by: Josh Cartwright <josh.cartwright@ni.com> Acked-by: Michal Simek <michal.simek@xilinx.com>
2012-11-12ARM i.MX: Add Ka-Ro TX25 devicetreeSascha Hauer
Basic support for the Ka-Ro i.MX25 based TX25 board. Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de> Cc: Lothar Waßmann <LW@KARO-electronics.de>
2012-11-12ARM i.MX25: Add devicetreeSascha Hauer
This adds a i.MX25 dtsi file along with the i.MX25 clock tree documentation. The devicetree should be fairly complete for: - uart - fec - i2c - spi - pwm - nand - gpio - wdog - esdhc - flexcan The more exotic devices currently miss clock bindings. Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de> Acked-by: Shawn Guo <shawn.guo@linaro.org>
2012-11-12ARM i.MX25: Add devicetree supportSascha Hauer
This adds a i.MX25 dt machine descriptor and changes the clock support to optionally initialize from dt. Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de> Acked-by: Shawn Guo <shawn.guo@linaro.org>
2012-11-12ARM i.MX25: Add missing clock gatesSascha Hauer
This completes the list of clock gates on the i.MX25. There are several clocks marked as reserved in the datasheet, but nevertheless used in the Freescale kernel. Add some comments to their positions and add 'reservedx' entries to the clk enum. This way we can replace them with the real names should we need them later. Adding the reserved entry names will help us keeping the clk numbers when moving to devicetree. Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
2012-11-12Merge remote-tracking branch 'arm-soc/imx/multiplatform' into imx25-dtSascha Hauer
2012-11-12ARM: mxs: apf28dev: Add I2C and SPI supportGwenhael Goavec-Merou
Signed-off-by: Gwenhael Goavec-Merou <gwenhael.goavec-merou@armadeus.com> Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
2012-11-12ARM: mxs: Setup scheduler clockStanislav Meduna
Setup scheduler clock on ARM MXS platforms with a 32-bit timrot such as i.MX28. This allows the scheduler to use sub-jiffy resolution. The corresponding change for 16-bit v1 timrots is not possible at the moment due to rounding issues with clock values wrapping faster than once per several seconds in the common ARM platform code. Signed-off-by: Stanislav Meduna <stano@meduna.org> Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
2012-11-11Linux 3.7-rc5v3.7-rc5Linus Torvalds
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