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2023-06-15dt-bindings: display: panel: mipi-dbi-spi: add shineworld lh133k compatibleLeonard Göhrs
The Shineworld LH133K is a 1.3" 240x240px RGB LCD with a MIPI DBI compatible SPI interface. The initialization procedure is quite basic with the exception of requiring inverted colors. A basic mipi-dbi-cmd[1] script to get the display running thus looks like this: $ cat shineworld,lh133k.txt command 0x11 # exit sleep mode delay 120 # The display seems to require display color inversion, so enable it. command 0x21 # INVON # Enable normal display mode (in contrast to partial display mode). command 0x13 # NORON command 0x29 # MIPI_DCS_SET_DISPLAY_ON $ mipi-dbi-cmd shineworld,lh133k.bin shineworld,lh133k.txt [1]: https://github.com/notro/panel-mipi-dbi Signed-off-by: Leonard Göhrs <l.goehrs@pengutronix.de> Acked-by: Conor Dooley <conor.dooley@microchip.com> Reviewed-by: Noralf Trønnes <noralf@tronnes.org> Link: https://lore.kernel.org/r/20230614123222.4167460-3-l.goehrs@pengutronix.de Signed-off-by: Rob Herring <robh@kernel.org>
2023-06-15dt-bindings: vendor-prefixes: Add prefix for ShineWorld InnovationsLeonard Göhrs
Add a vendor prefix for ShineWorld Innovations, a manufacturer of display panels https://www.swicn.com/. Signed-off-by: Leonard Göhrs <l.goehrs@pengutronix.de> Acked-by: Conor Dooley <conor.dooley@microchip.com> Link: https://lore.kernel.org/r/20230614123222.4167460-2-l.goehrs@pengutronix.de Signed-off-by: Rob Herring <robh@kernel.org>
2023-06-15drm/amdgpu: Remove unused NBIO interfaceLijo Lazar
Set compute partition mode interface in NBIO is no longer used. Remove the only implementation from NBIO v7.9 Signed-off-by: Lijo Lazar <lijo.lazar@amd.com> Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com> Reviewed-by: Le Ma <le.ma@amd.com> Acked-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2023-06-15dt-bindings: clock: drop unneeded quotes and use absolute /schemas pathKrzysztof Kozlowski
Cleanup bindings dropping unneeded quotes. Once all these are fixed, checking for this can be enabled in yamllint. Also absolute path starting with /schemas is preferred. Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Link: https://lore.kernel.org/r/20230609140751.65129-1-krzysztof.kozlowski@linaro.org Signed-off-by: Stephen Boyd <sboyd@kernel.org>
2023-06-15dt-bindings: timer: fsl,imxgpt: Add i.MX8MP variantUwe Kleine-König
The i.MX8MP has the same register layout as the i.MX6DL, so add it as a variant allowing to add the GPT IP blocks to the i.MX8MP's dtsi file. Signed-off-by: Uwe Kleine-König <u.kleine-koenig@pengutronix.de> Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Link: https://lore.kernel.org/r/20230327173526.851734-2-u.kleine-koenig@pengutronix.de Signed-off-by: Rob Herring <robh@kernel.org>
2023-06-15dt-bindings: crypto: fsl,sec-v4.0-mon: Add "linux,keycodes" and deprecate ↵Rob Herring
"linux,keycode" The "linux,keycode" property is non-standard. Add the common property "linux,keycodes" and mark "linux,keycode" deprecated so that the mistake is not propagated. Acked-by: Conor Dooley <conor.dooley@microchip.com> Link: https://lore.kernel.org/r/20230613201231.2826352-2-robh@kernel.org Signed-off-by: Rob Herring <robh@kernel.org>
2023-06-15dt-bindings: crypto: fsl,sec-v4.0-mon: Add missing type for "linux,keycode"Rob Herring
The "linux,keycode" property is missing a type probably because it was confused with the common property "linux,keycodes". Reviewed-by: Conor Dooley <conor.dooley@microchip.com> Link: https://lore.kernel.org/r/20230613201231.2826352-1-robh@kernel.org Signed-off-by: Rob Herring <robh@kernel.org>
2023-06-15dt-bindings: display: Add missing property typesRob Herring
A couple of display bridge properties are missing a type definition. Add the types to them. Reviewed-by: Conor Dooley <conor.dooley@microchip.com> Link: https://lore.kernel.org/r/20230613201114.2824626-1-robh@kernel.org Signed-off-by: Rob Herring <robh@kernel.org>
2023-06-15dt-bindings: net: bluetooth: nxp: Add missing type for "fw-init-baudrate"Rob Herring
"fw-init-baudrate" is missing a type, add it. While we're here, define the default value with a schema rather than freeform text. Reviewed-by: Conor Dooley <conor.dooley@microchip.com> Link: https://lore.kernel.org/r/20230613200929.2822137-1-robh@kernel.org Signed-off-by: Rob Herring <robh@kernel.org>
2023-06-15dt-bindings: example-schema: don't use enum as fallback, explain clock-namesKrzysztof Kozlowski
Compatibles with multiple entries should have usually only one fallback compatible thus enum followed by enum is not a common case. Use 'const' as second compatible to show the recommended approach. Explain also when clock-names are not really necessary. Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Link: https://lore.kernel.org/r/20230612092611.12385-1-krzysztof.kozlowski@linaro.org Signed-off-by: Rob Herring <robh@kernel.org>
2023-06-15arm64: mm: fix VA-range sanity checkMark Rutland
Both create_mapping_noalloc() and update_mapping_prot() sanity-check their 'virt' parameter, but the check itself doesn't make much sense. The condition used today appears to be a historical accident. The sanity-check condition: if ((virt >= PAGE_END) && (virt < VMALLOC_START)) { [ ... warning here ... ] return; } ... can only be true for the KASAN shadow region or the module region, and there's no reason to exclude these specifically for creating and updateing mappings. When arm64 support was first upstreamed in commit: c1cc1552616d0f35 ("arm64: MMU initialisation") ... the condition was: if (virt < VMALLOC_START) { [ ... warning here ... ] return; } At the time, VMALLOC_START was the lowest kernel address, and this was checking whether 'virt' would be translated via TTBR1. Subsequently in commit: 14c127c957c1c607 ("arm64: mm: Flip kernel VA space") ... the condition was changed to: if ((virt >= VA_START) && (virt < VMALLOC_START)) { [ ... warning here ... ] return; } This appear to have been a thinko. The commit moved the linear map to the bottom of the kernel address space, with VMALLOC_START being at the halfway point. The old condition would warn for changes to the linear map below this, and at the time VA_START was the end of the linear map. Subsequently we cleaned up the naming of VA_START in commit: 77ad4ce69321abbe ("arm64: memory: rename VA_START to PAGE_END") ... keeping the erroneous condition as: if ((virt >= PAGE_END) && (virt < VMALLOC_START)) { [ ... warning here ... ] return; } Correct the condition to check against the start of the TTBR1 address space, which is currently PAGE_OFFSET. This simplifies the logic, and more clearly matches the "outside kernel range" message in the warning. Signed-off-by: Mark Rutland <mark.rutland@arm.com> Cc: Russell King <linux@armlinux.org.uk> Cc: Steve Capper <steve.capper@arm.com> Cc: Will Deacon <will@kernel.org> Reviewed-by: Russell King (Oracle) <rmk+kernel@armlinux.org.uk> Link: https://lore.kernel.org/r/20230615102628.1052103-1-mark.rutland@arm.com Signed-off-by: Catalin Marinas <catalin.marinas@arm.com>
2023-06-15of/platform: Propagate firmware node by calling device_set_node()Andy Shevchenko
Insulate of_device_alloc() and of_amba_device_create() from possible changes to fwnode_handle implementation by using device_set_node() instead of open-coding dev->dev.fwnode assignments. Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Link: https://lore.kernel.org/r/20230615145243.37095-1-andriy.shevchenko@linux.intel.com Signed-off-by: Rob Herring <robh@kernel.org>
2023-06-15arm64/mm: remove now-superfluous ISBs from TTBR writesJamie Iles
At the time of authoring 7655abb95386 ("arm64: mm: Move ASID from TTBR0 to TTBR1"), the Arm ARM did not specify any ordering guarantees for direct writes to TTBR0_ELx and TTBR1_ELx and so an ISB was required after each write to ensure TLBs would only be populated from the expected (or reserved tables). In a recent update to the Arm ARM, the requirements have been relaxed to reflect the implementation of current CPUs and required implementation of future CPUs to read (RDYDPX in D8.2.3 Translation table base address register): Direct writes to TTBR0_ELx and TTBR1_ELx occur in program order relative to one another, without the need for explicit synchronization. For any one translation, all indirect reads of TTBR0_ELx and TTBR1_ELx that are made as part of the translation observe only one point in that order of direct writes. Remove the superfluous ISBs to optimize uaccess helpers and context switch. Cc: Will Deacon <will@kernel.org> Cc: Mark Rutland <mark.rutland@arm.com> Signed-off-by: Jamie Iles <quic_jiles@quicinc.com> Reviewed-by: Mark Rutland <mark.rutland@arm.com> Link: https://lore.kernel.org/r/20230613141959.92697-1-quic_jiles@quicinc.com [catalin.marinas@arm.com: rename __cpu_set_reserved_ttbr0 to ..._nosync] [catalin.marinas@arm.com: move the cpu_set_reserved_ttbr0_nosync() call to cpu_do_switch_mm()] Signed-off-by: Catalin Marinas <catalin.marinas@arm.com>
2023-06-15dm: use op specific max_sectors when splitting abnormal ioMike Snitzer
Split abnormal IO in terms of the corresponding operation specific max_sectors (max_discard_sectors, max_secure_erase_sectors or max_write_zeroes_sectors). This fixes a significant dm-thinp discard performance regression that was introduced with commit e2dd8aca2d76 ("dm bio prison v1: improve concurrent IO performance"). Relative to discard: max_discard_sectors is used instead of max_sectors; which fixes excessive discard splitting (e.g. max_sectors=128K vs max_discard_sectors=64M). Tested by discarding an 1 Petabyte dm-thin device: lvcreate -V 1125899906842624B -T test/pool -n thin time blkdiscard /dev/test/thin Before this fix (splitting discards every 128K): ~116m After this fix (splitting discards every 64M) : 0m33.460s Reported-by: Zorro Lang <zlang@redhat.com> Fixes: 06961c487a33 ("dm: split discards further if target sets max_discard_granularity") Requires: 13f6facf3fae ("dm: allow targets to require splitting WRITE_ZEROES and SECURE_ERASE") Fixes: e2dd8aca2d76 ("dm bio prison v1: improve concurrent IO performance") Signed-off-by: Mike Snitzer <snitzer@kernel.org>
2023-06-15dm thin: fix issue_discard to pass GFP_NOIO to __blkdev_issue_discardMike Snitzer
issue_discard() passes GFP_NOWAIT to __blkdev_issue_discard() despite its code assuming bio_alloc() always succeeds. Commit 3dba53a958a75 ("dm thin: use __blkdev_issue_discard for async discard support") clearly shows where things went bad: Before commit 3dba53a958a75, dm-thin.c's open-coded __blkdev_issue_discard_async() properly handled using GFP_NOWAIT. Unfortunately __blkdev_issue_discard() doesn't and it was missed during review. Cc: stable@vger.kernel.org Signed-off-by: Mike Snitzer <snitzer@kernel.org>
2023-06-15dm thin metadata: check fail_io before using data_smLi Lingfeng
Must check pmd->fail_io before using pmd->data_sm since pmd->data_sm may be destroyed by other processes. P1(kworker) P2(message) do_worker process_prepared process_prepared_discard_passdown_pt2 dm_pool_dec_data_range pool_message commit dm_pool_commit_metadata ↓ // commit failed metadata_operation_failed abort_transaction dm_pool_abort_metadata __open_or_format_metadata ↓ dm_sm_disk_open ↓ // open failed // pmd->data_sm is NULL dm_sm_dec_blocks ↓ // try to access pmd->data_sm --> UAF As shown above, if dm_pool_commit_metadata() and dm_pool_abort_metadata() fail in pool_message process, kworker may trigger UAF. Fixes: be500ed721a6 ("dm space maps: improve performance with inc/dec on ranges of blocks") Cc: stable@vger.kernel.org Signed-off-by: Li Lingfeng <lilingfeng3@huawei.com> Signed-off-by: Mike Snitzer <snitzer@kernel.org>
2023-06-15dm: don't lock fs when the map is NULL during suspend or resumeLi Lingfeng
As described in commit 38d11da522aa ("dm: don't lock fs when the map is NULL in process of resume"), a deadlock may be triggered between do_resume() and do_mount(). This commit preserves the fix from commit 38d11da522aa but moves it to where it also serves to fix a similar deadlock between do_suspend() and do_mount(). It does so, if the active map is NULL, by clearing DM_SUSPEND_LOCKFS_FLAG in dm_suspend() which is called by both do_suspend() and do_resume(). Fixes: 38d11da522aa ("dm: don't lock fs when the map is NULL in process of resume") Signed-off-by: Li Lingfeng <lilingfeng3@huawei.com> Signed-off-by: Mike Snitzer <snitzer@kernel.org>
2023-06-15cpufreq: Fail driver register if it has adjust_perf without fast_switchWyes Karny
If fast_switch_possible flag is set by the scaling driver, the governor is free to select fast_switch function even if adjust_perf is set. Some scaling drivers which use adjust_perf don't set fast_switch thinking that the governor would never fall back to fast_switch. But the governor can fall back to fast_switch even in runtime if frequency invariance is disabled due to some reason. This could crash the kernel if the driver didn't set the fast_switch function pointer. Therefore, fail driver registration if it has adjust_perf without fast_switch. Suggested-by: Rafael J. Wysocki <rafael@kernel.org> Suggested-by: Viresh Kumar <viresh.kumar@linaro.org> Signed-off-by: Wyes Karny <wyes.karny@amd.com> Signed-off-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com>
2023-06-15thermal/intel/intel_soc_dts_iosf: Fix reporting wrong temperaturesHans de Goede
Since commit 955fb8719efb ("thermal/intel/intel_soc_dts_iosf: Use Intel TCC library") intel_soc_dts_iosf is reporting the wrong temperature. The driver expects tj_max to be in milli-degrees-celcius but after the switch to the TCC library this is now in degrees celcius so instead of e.g. 90000 it is set to 90 causing a temperature 45 degrees below tj_max to be reported as -44910 milli-degrees instead of as 45000 milli-degrees. Fix this by adding back the lost factor of 1000. Fixes: 955fb8719efb ("thermal/intel/intel_soc_dts_iosf: Use Intel TCC library") Reported-by: Bernhard Krug <b.krug@elektronenpumpe.de> Signed-off-by: Hans de Goede <hdegoede@redhat.com> Acked-by: Zhang Rui <rui.zhang@intel.com> Cc: 6.3+ <stable@vger.kernel.org> # 6.3+ Signed-off-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com>
2023-06-15ACPI: sleep: Avoid breaking S3 wakeup due to might_sleep()Rafael J. Wysocki
The addition of might_sleep() to down_timeout() caused the latter to enable interrupts unconditionally in some cases, which in turn broke the ACPI S3 wakeup path in acpi_suspend_enter(), where down_timeout() is called by acpi_disable_all_gpes() via acpi_ut_acquire_mutex(). Namely, if CONFIG_DEBUG_ATOMIC_SLEEP is set, might_sleep() causes might_resched() to be used and if CONFIG_PREEMPT_VOLUNTARY is set, this triggers __cond_resched() which may call preempt_schedule_common(), so __schedule() gets invoked and it ends up with enabled interrupts (in the prev == next case). Now, enabling interrupts early in the S3 wakeup path causes the kernel to crash. Address this by modifying acpi_suspend_enter() to disable GPEs without attempting to acquire the sleeping lock which is not needed in that code path anyway. Fixes: 99409b935c9a ("locking/semaphore: Add might_sleep() to down_*() family") Reported-by: Srinivas Pandruvada <srinivas.pandruvada@linux.intel.com> Signed-off-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com> Acked-by: Peter Zijlstra (Intel) <peterz@infradead.org> Cc: 5.15+ <stable@vger.kernel.org> # 5.15+
2023-06-15Revert "arm64: dts: adapt to LP855X bindings changes"Bjorn Andersson
commit 'ebdcfc8c42c2 ("arm64: dts: adapt to LP855X bindings changes")' is a Tegra change, but was accidentally merged in the Qualcomm tree. The change is reverted to avoid rebasing a large number of other changes. This reverts commit ebdcfc8c42c2b9d5ca1b27d8ee558eefb3e904d8. Signed-off-by: Bjorn Andersson <quic_bjorande@quicinc.com>
2023-06-15drm/amdkfd: bump kfd ioctl minor version for event age availabilityJames Zhu
Bump the minor version to declare event age tracking feature is now available. In kernel amdgpu driver, kfd_wait_on_events is used to support user space signal event wait function. For multiple threads waiting on same event scenery, race condition could occur since some threads after checking signal condition, before calling kfd_wait_on_events, the event interrupt could be fired and wake up other thread which are sleeping on this event. Then those threads could fall into sleep without waking up again. Adding event age tracking in both kernel and user mode, will help avoiding this race condition. Proposed ROCT-Thunk-Interface: https://github.com/RadeonOpenCompute/ROCT-Thunk-Interface/commit/efdbf6cfbc026bd68ac3c35d00dacf84370eb81e https://github.com/RadeonOpenCompute/ROCT-Thunk-Interface/commit/1820ae0a2db85b6f584611dc0cde1a00e7c22915 Proposed ROCR-Runtime: https://github.com/RadeonOpenCompute/ROCR-Runtime/compare/master...zhums:ROCR-Runtime:new_event_wait_review https://github.com/RadeonOpenCompute/ROCR-Runtime/commit/e1f5bdb88eb882ac798aeca2c00ea3fbb2dba459 https://github.com/RadeonOpenCompute/ROCR-Runtime/commit/7d26afd14107b5c2a754c1a3f415d89f3aabb503 Signed-off-by: James Zhu <James.Zhu@amd.com> Reviewed-by: Felix Kuehling <Felix.Kuehling@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2023-06-15drm/amdkfd: update user space last_event_ageJames Zhu
Update user space last_event_age when event age is enabled. It is only for KFD_EVENT_TYPE_SIGNAL which is checked by user space. Signed-off-by: James Zhu <James.Zhu@amd.com> Reviewed-by: Felix Kuehling <Felix.Kuehling@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2023-06-15drm/amdkfd: set activated flag true when event age unmatchsJames Zhu
Set waiter's activated flag true when event age unmatchs with last_event_age. Signed-off-by: James Zhu <James.Zhu@amd.com> Reviewed-by: Felix Kuehling <Felix.Kuehling@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2023-06-15drm/amdkfd: add event_age tracking when receiving interruptJames Zhu
Add event_age tracking when receiving interrupt. Signed-off-by: James Zhu <James.Zhu@amd.com> Reviewed-by: Felix Kuehling <Felix.Kuehling@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2023-06-15drm/amdkfd: add event age trackingJames Zhu
Add event age tracking Signed-off-by: James Zhu <James.Zhu@amd.com> Reviewed-by: Felix Kuehling <Felix.Kuehling@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2023-06-15drm/scheduler: avoid infinite loop if entity's dependency is a scheduled ↵ZhenGuo Yin
error fence [Why] drm_sched_entity_add_dependency_cb ignores the scheduled fence and return false. If entity's dependency is a scheduler error fence and drm_sched_stop is called due to TDR, drm_sched_entity_pop_job will wait for the dependency infinitely. [How] Do not wait or ignore the scheduled error fence, add drm_sched_entity_wakeup callback for the dependency with scheduled error fence. Signed-off-by: ZhenGuo Yin <zhenguo.yin@amd.com> Acked-by: Alex Deucher <alexander.deucher@amd.com> Reviewed-by: Christian König <christian.koenig@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2023-06-15drm/amdgpu: add entity error check in amdgpu_ctx_get_entityZhenGuo Yin
[Why] UMD is not aware of entity error, and will keep submitting jobs into the error entity. [How] Add entity error check when getting entity from ctx. Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: ZhenGuo Yin <zhenguo.yin@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2023-06-15drm/amdgpu: add VM generation tokenChristian König
Instead of using the VRAM lost counter add a 64bit token which indicates if a context or job is still valid to use. Should the VRAM be lost or the page tables need re-creation the token will change indicating that userspace needs to act and re-create the contexts and re-submit the work. Signed-off-by: Christian König <christian.koenig@amd.com> Reviewed-by: Luben Tuikov <luben.tuikov@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2023-06-15drm/amdgpu: reset VM when an error is detectedChristian König
When some problem with the updates of page tables is detected reset the state machine of the VM and re-create all page tables from scratch. Signed-off-by: Christian König <christian.koenig@amd.com> Reviewed-by: Luben Tuikov <luben.tuikov@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2023-06-15drm/amdgpu: abort submissions during prepare on errorChristian König
Forward errors from previous submissions to this one. Signed-off-by: Christian König <christian.koenig@amd.com> Reviewed-by: Luben Tuikov <luben.tuikov@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2023-06-15drm/amdgpu: mark soft recovered fences with -ENODATAChristian König
Set the fence error code before trying to soft-recover it. It gets overwritten when a hard recovery is required. Signed-off-by: Christian König <christian.koenig@amd.com> Reviewed-by: Luben Tuikov <luben.tuikov@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2023-06-15drm/amdgpu: mark force completed fences with -ECANCELEDChristian König
When we force complete fences we should mark them as canceled. Signed-off-by: Christian König <christian.koenig@amd.com> Reviewed-by: Luben Tuikov <luben.tuikov@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2023-06-15drm/amdgpu: add amdgpu_error_* debugfs fileChristian König
This allows us to insert some error codes into the bottom of the pipeline on an engine. Signed-off-by: Christian König <christian.koenig@amd.com> Reviewed-by: Luben Tuikov <luben.tuikov@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2023-06-15drm/amdgpu: mark GC 9.4.3 experimental for nowAlex Deucher
Mark as experimental for now until we get closer to production to avoid possible undesireable behavior when mixing newer boards with older kernels. Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2023-06-15arm64: dts: ti: Unify pin group node names for make dtbs checksTony Lindgren
Prepare for pinctrl-single yaml binding and unify pin group node names. Let's standardize on pin group node naming ending in -pins. As we don't necessarily have a SoC specific compatible property for pinctrl-single. I'd rather not add a pattern match for pins somewhere in the name for all the users. Trying to add matches for pins-default will be futile as on the earlier SoCs we've already seen names like pins-sleep, pins-idle, pins-off and so on that would need to be matched. And as the node is a pin group, let's prefer to use naming -pins rather than -pin as more pins may need to be added to the pin group later on. Signed-off-by: Tony Lindgren <tony@atomide.com> [vigneshr@ti.com: Rebase onto latest ti/next and extend to new nodes] Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>
2023-06-15arm64: dts: ti: add verdin am62 yaviaFrancesco Dolcini
Add Toradex Verdin AM62 Yavia. Link: https://www.toradex.com/products/carrier-board/yavia Signed-off-by: Francesco Dolcini <francesco.dolcini@toradex.com> Link: https://lore.kernel.org/r/20230615095058.33890-6-francesco@dolcini.it Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>
2023-06-15arm64: dts: ti: add verdin am62 dahliaFrancesco Dolcini
Add Toradex Verdin AM62 Dahlia. Link: https://www.toradex.com/products/carrier-board/dahlia-carrier-board-kit Signed-off-by: Francesco Dolcini <francesco.dolcini@toradex.com> Link: https://lore.kernel.org/r/20230615095058.33890-5-francesco@dolcini.it Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>
2023-06-15arm64: dts: ti: add verdin am62Francesco Dolcini
This patch adds the device tree to support Toradex Verdin AM62 a computer on module which can be used on different carrier boards and the Toradex Verdin Development Board carrier board. The module consists of an TI AM62 family SoC (either AM623 or AM625), a TPS65219 PMIC, a Gigabit Ethernet PHY, 512MB to 2GB of LPDDR4 RAM, an eMMC, a TLA2024 ADC, an I2C EEPROM, an RX8130 RTC, and optional Parallel RGB to MIPI DSI bridge plus an optional Bluetooth/Wi-Fi module. Anything that is not self-contained on the module is disabled by default. So far there is no display nor USB role switch supported, apart of that all the other functionalities are fine. Link: https://developer.toradex.com/hardware/verdin-som-family/modules/verdin-am62/ Link: https://www.toradex.com/computer-on-modules/verdin-arm-family/ti-am62 Link: https://www.toradex.com/products/carrier-board/verdin-development-board-kit Signed-off-by: Francesco Dolcini <francesco.dolcini@toradex.com> Link: https://lore.kernel.org/r/20230615095058.33890-4-francesco@dolcini.it Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>
2023-06-15dt-bindings: arm: ti: add toradex,verdin-am62 et al.Francesco Dolcini
Add toradex,verdin-am62 for Toradex Verdin AM62 SoM, its nonwifi and wifi variants and the carrier boards (Dahlia, Verdin Development Board and Yavia) they may be mated in. Link: https://developer.toradex.com/hardware/verdin-som-family/modules/verdin-am62/ Link: https://www.toradex.com/computer-on-modules/verdin-arm-family/ti-am62 Signed-off-by: Francesco Dolcini <francesco.dolcini@toradex.com> Reviewed-by: Conor Dooley <conor.dooley@microchip.com> Link: https://lore.kernel.org/r/20230615095058.33890-2-francesco@dolcini.it Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>
2023-06-15arm64: dts: ti: Add basic support for phyBOARD-Lyra-AM625Wadim Egorov
The phyCORE-AM62x [1] is a SoM (System on Module) featuring TI's AM62x SoC. It can be used in combination with different carrier boards. This module can come with different sizes and models for DDR, eMMC, SPI NOR Flash and various SoCs from the AM62x family. A development Kit, called phyBOARD-Lyra [2] is used as a carrier board reference design around the AM62x SoM. Supported features: * Debug UART * SPI NOR Flash * eMMC * 2x Ethernet * Micro SD card * I2C EEPROM * I2C RTC * GPIO Expander * LEDs * USB For more details, see: [1] Product page SoM: https://www.phytec.com/product/phycore-am62x [2] Product page CB: https://www.phytec.com/product/phyboard-am62x Signed-off-by: Wadim Egorov <w.egorov@phytec.de> Reviewed-by: Tony Lindgren <tony@atomide.com> Link: https://lore.kernel.org/r/20230504140143.1425951-2-w.egorov@phytec.de Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>
2023-06-15pinctrl: intel: refine ->irq_set_type() hookRaag Jadav
Refine ->irq_set_type() hook and improve its readability by: - Reducing scope of spinlock by moving unneeded operations out of it. - Dropping redundant PADCFG0_RXEVCFG_SHIFT and including it directly into PADCFG0_RXEVCFG_* definitions. - Utilizing temporary variables for common operations. - Simplifying if-else-if chain. Signed-off-by: Raag Jadav <raag.jadav@intel.com> Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
2023-06-15mfd: core: Use of_property_read_reg() to parse "reg"Rob Herring
Use the recently added of_property_read_reg() helper to get the untranslated "reg" address value. Signed-off-by: Rob Herring <robh@kernel.org> Link: https://lore.kernel.org/r/20230609183159.1766429-1-robh@kernel.org Signed-off-by: Lee Jones <lee@kernel.org>
2023-06-15MAINTAINERS: Add source tree entry for kunitSeongJae Park
Patches for kunit are managed in kunit and kunit-fixes branches of linux-kselftest tree before merged into the mainline. However, the MAINTAINERS section for kunit is not having the entries for the branches. Add the entries. Signed-off-by: SeongJae Park <sj@kernel.org> Reviewed-by: David Gow <davidgow@google.com> Signed-off-by: Shuah Khan <skhan@linuxfoundation.org>
2023-06-15drm/amdgpu: Use PSP FW API for partition switchLijo Lazar
Use PSP firmware interface for switching compute partitions. Signed-off-by: Lijo Lazar <lijo.lazar@amd.com> Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com> Reviewed-by: Le Ma <le.ma@amd.com> Acked-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2023-06-15drm/amdgpu: Change nbio v7.9 xcp status definitionLijo Lazar
PARTITION_MODE field in PARTITION_COMPUTE_STATUS register is defined as below by firmware. SPX = 0, DPX = 1, TPX = 2, QPX = 3, CPX = 4 Change driver definition accordingly. Signed-off-by: Lijo Lazar <lijo.lazar@amd.com> Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com> Reviewed-by: Le Ma <le.ma@amd.com> Acked-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2023-06-15drm/amdgpu: make sure that BOs have a backing storeChristian König
It's perfectly possible that the BO is about to be destroyed and doesn't have a backing store associated with it. Signed-off-by: Christian König <christian.koenig@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Acked-by: Guchun Chen <guchun.chen@amd.com> Tested-by: Mikhail Gavrilov <mikhail.v.gavrilov@gmail.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2023-06-15drm/amdgpu: make sure BOs are locked in amdgpu_vm_get_memoryChristian König
We need to grab the lock of the BO or otherwise can run into a crash when we try to inspect the current location. Signed-off-by: Christian König <christian.koenig@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Acked-by: Guchun Chen <guchun.chen@amd.com> Tested-by: Mikhail Gavrilov <mikhail.v.gavrilov@gmail.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2023-06-15drm/amdgpu: Add checking mc_vram_sizeStanley.Yang
Do not compare injection address with mc_vram_size if mc_vram_size is zero. Signed-off-by: Stanley.Yang <Stanley.Yang@amd.com> Reviewed-by: Tao Zhou <tao.zhou1@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2023-06-15drm/amdgpu: Optimize checking ras supportedStanley.Yang
Using "is_app_apu" to identify device in the native APU mode or carveout mode. Signed-off-by: Stanley.Yang <Stanley.Yang@amd.com> Reviewed-by: Tao Zhou <tao.zhou1@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
generated by cgit (git 2.34.1) at 2025-10-02 21:01:30 +0000