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2023-09-19arm64: dts: qcom: ipq5332: Add USB related nodesVaradarajan Narayanan
Add USB phy and controller nodes. Signed-off-by: Varadarajan Narayanan <quic_varada@quicinc.com> Link: https://lore.kernel.org/r/f25777bfe2c84e203b7615527607900b756c51bd.1693468292.git.quic_varada@quicinc.com Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2023-09-19ARM: dts: qcom: drop incorrect cell-index from SPMIKrzysztof Kozlowski
The SPMI controller (PMIC Arbiter) does not use nor allow 'cell-index' property: qcom-sdx55-mtp.dtb: spmi@c440000: Unevaluated properties are not allowed ('cell-index' was unexpected) Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org> Link: https://lore.kernel.org/r/20230827122842.63741-1-krzysztof.kozlowski@linaro.org Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2023-09-19arm64: dts: qcom: sm7225-fp4: Revert "arm64: dts: qcom: ↵Krzysztof Kozlowski
sm7225-fairphone-fp4: Add AW8695 haptics" This reverts commit 413821b7777d062b57f8dc66ab088ed390cbc3ec because it was never reviewed, was buggy (report from kernel test robot: https://lore.kernel.org/all/202204090333.QZXMI2tu-lkp@intel.com/) and used undocumented, broken bindings. Half of the properties in this device are questioned, thus adding DTS node causes only errors and does not make the device usable without the bindings and driver part: sm7225-fairphone-fp4.dtb: haptics@5a: failed to match any schema with compatible: ['awinic,aw8695'] sm7225-fairphone-fp4.dtb: haptics@5a: awinic,tset: b'\x12' is not of type 'object', 'array', 'boolean', 'null' sm7225-fairphone-fp4.dtb: haptics@5a: awinic,r-spare: b'h' is not of type 'object', 'array', 'boolean', 'null' Since bindings were abandoned (4 months since review), revert the commit to avoid false sense of supporting something which is not supported. Cc: Luca Weiss <luca.weiss@fairphone.com> Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Acked-by: Konrad Dybcio <konrad.dybcio@linaro.org> Acked-by: Luca Weiss <luca.weiss@fairphone.com> Link: https://lore.kernel.org/r/20230827122842.63741-3-krzysztof.kozlowski@linaro.org Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2023-09-19arm64: dts: qcom: sc8180x: drop incorrect cell-index from SPMIKrzysztof Kozlowski
The SPMI controller (PMIC Arbiter) does not use nor allow 'cell-index' property: sc8180x-primus.dtb: spmi@c440000: Unevaluated properties are not allowed ('cell-index' was unexpected) Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org> Link: https://lore.kernel.org/r/20230827122842.63741-2-krzysztof.kozlowski@linaro.org Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2023-09-19arm64: dts: qcom: msm8939-longcheer-l9100: Add initial device treeAndré Apitzsch
This dts adds support for BQ Aquaris M5 (Longcheer L9100) released in 2015. Add a device tree with initial support for: - GPIO keys - Hall sensor - SDHCI - WCNSS (BT/WIFI) - Accelerometer/Magnetometer - Vibrator - Touchscreen - Front flash Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org> Signed-off-by: André Apitzsch <git@apitzsch.eu> Link: https://lore.kernel.org/r/20230827-bq_m5-v4-2-f8435fb8f955@apitzsch.eu Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2023-09-19dt-bindings: arm: qcom: Add BQ Aquaris M5André Apitzsch
Add a compatible for BQ Aquaris M5 (Longcheer L9100). Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Signed-off-by: André Apitzsch <git@apitzsch.eu> Link: https://lore.kernel.org/r/20230827-bq_m5-v4-1-f8435fb8f955@apitzsch.eu Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2023-09-19arm64: dts: qcom: sdm845-mtp: enable PCIe supportDmitry Baryshkov
Enable two PCIe hosts support on Qualcomm SDM845 MTP board. Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> Link: https://lore.kernel.org/r/20230826221915.846937-6-dmitry.baryshkov@linaro.org Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2023-09-19arm64: dts: qcom: sdm845-mtp: enable Vol-/reset buttonDmitry Baryshkov
Wire up the Vol- / reset button on Qualcomm SDM845 MTP board. Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org> Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> Link: https://lore.kernel.org/r/20230826221915.846937-5-dmitry.baryshkov@linaro.org Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2023-09-19arm64: dts: qcom: sdm845-mtp: switch to mbn firmwareDmitry Baryshkov
We have switched most of devices to use mbn (squashed) firmware files instead of spit mdt+bNN. Even this DT uses modem.mbn and a630_zap.mbn. Let's switch adsp and cdsp firmware files to use .mbn format too. Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org> Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> Link: https://lore.kernel.org/r/20230826221915.846937-4-dmitry.baryshkov@linaro.org Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2023-09-19arm64: dts: qcom: sdm845-mtp: specify wifi variantDmitry Baryshkov
Specify the variant for the WiFi BDF file, "Qualcomm_sdm845mtp" to ease distinguishing from other (possible) devices using the same board id. For the reference: ath10k_snoc 18800000.wifi: qmi chip_id 0x30214 chip_family 0x4001 board_id 0x3f soc_id 0x40030001 ath10k_snoc 18800000.wifi: qmi fw_version 0x2009856b fw_build_timestamp 2018-07-19 12:28 fw_build_id QC_IMAGE_VERSION_STRING=WLAN.HL.2.0-01387-QCAHLSWMTPLZ-1 ath10k_snoc 18800000.wifi: failed to fetch board data for bus=snoc,qmi-board-id=3f,qmi-chip-id=30214,variant=Qualcomm_sdm845mtp from ath10k/WCN3990/hw1.0/board-2.bin ath10k_snoc 18800000.wifi: wcn3990 hw1.0 target 0x00000008 chip_id 0x00000000 sub 0000:0000 ath10k_snoc 18800000.wifi: kconfig debug 1 debugfs 0 tracing 0 dfs 0 testmode 0 ath10k_snoc 18800000.wifi: firmware ver api 5 features wowlan,mgmt-tx-by-reference,non-bmi crc32 b3d4b790 ath10k_snoc 18800000.wifi: htt-ver 3.53 wmi-op 4 htt-op 3 cal file max-sta 32 raw 0 hwcrypto 1 ath10k_snoc 18800000.wifi: invalid MAC address; choosing random Cc: Kalle Valo <kvalo@kernel.org> Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> Link: https://lore.kernel.org/r/20230826221915.846937-3-dmitry.baryshkov@linaro.org Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2023-09-19arm64: dts: qcom: sdm845-mtp: fix WiFi configurationDmitry Baryshkov
Enable the host-cap-8bit quirk on this device. It is required for the WiFi to function properly. Fixes: 022bccb840b7 ("arm64: dts: sdm845: Add WCN3990 WLAN module device node") Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> Link: https://lore.kernel.org/r/20230826221915.846937-2-dmitry.baryshkov@linaro.org Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2023-09-19arm64: dts: qcom: sm8350-hdk: add pmr735a regulatorsDmitry Baryshkov
The SM8350 HDK uses pmr735a to supply some of the voltages (e.g. to WiFi/BT chip). Declare corresponding regulators together with voltage boundaries. Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org> Link: https://lore.kernel.org/r/20230825214550.1650938-3-dmitry.baryshkov@linaro.org Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2023-09-19arm64: dts: qcom: sm8350-hdk: add missing PMICsDmitry Baryshkov
Include configuration for several PMICs presend on the board. Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org> Link: https://lore.kernel.org/r/20230825214550.1650938-2-dmitry.baryshkov@linaro.org Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2023-09-19arm64: dts: qcom: sm8350: fix pinctrl for UART18Dmitry Baryshkov
On sm8350 QUP18 uses GPIO 68/69, not 58/59. Fix correponding UART18 pinconf configuraion. Fixes: 98374e6925b8 ("arm64: dts: qcom: sm8350: Set up WRAP2 QUPs") Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org> Link: https://lore.kernel.org/r/20230825214550.1650938-1-dmitry.baryshkov@linaro.org Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2023-09-19ARM: dts: qcom-sdx55: switch PCIe QMP PHY to new style of bindingsDmitry Baryshkov
Change the PCIe QMP PHY to use newer style of QMP PHY bindings (single resource region, no per-PHY subnodes). Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org> Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> Link: https://lore.kernel.org/r/20230820142035.89903-19-dmitry.baryshkov@linaro.org Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2023-09-19arm64: dts: qcom: sdm845-tama: Add camera GPIO regulatorsKonrad Dybcio
Like on many other platforms, Tama devices utilize lots of GPIO- enabled regulators for the camera sensors. Define them in the DT. Signed-off-by: Konrad Dybcio <konrad.dybcio@linaro.org> Link: https://lore.kernel.org/r/20230824-topic-tama_gpio-v1-3-014e9d198dce@linaro.org Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2023-09-19arm64: dts: qcom: sdm845-tama: Add GPIO line names for PMIC GPIOsKonrad Dybcio
Sony ever so graciously provides GPIO line names in their downstream kernel (though sometimes they are not 100% accurate and you can judge that by simply looking at them and with what drivers they are used). Add these to the Akari, Apollo & Akatsuki DTS-es to better document the hardware. pm8005 and pm8998 config is common for all three boards. Apollo has VIB_LDO_EN (replacing NC) on PMI8998_GPIO_5 Akari and Akatsuki have WLC_EN_N (replacing NC) on PMI8998_GPIO_8 Akari additionally has RSVD(WLC_EN_N) (replacing) on PMI8998_GPIO_11 which sounds a bit like a forgot-to-update-documentation, but maybe it differs between SKUs.. Time will tell, when we get to enabling the wireless charger. Signed-off-by: Konrad Dybcio <konrad.dybcio@linaro.org> Link: https://lore.kernel.org/r/20230824-topic-tama_gpio-v1-2-014e9d198dce@linaro.org Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2023-09-19arm64: dts: qcom: sdm845-tama: Add GPIO line names for TLMMKonrad Dybcio
Sony ever so graciously provides GPIO line names in their downstream kernel (though sometimes they are not 100% accurate and you can judge that by simply looking at them and with what drivers they are used). Add these to the Akari, Apollo & Akatsuki DTS-es to better document the hardware. Apollo can be considered the 'base configuration'. Akari brings WLC_INT_N on GPIO_31 over that. Akatsuki & Akari diff: < "NC", > "SAMD_RSTEN_N", < "NC", > "MASTER_RST_N", < "NC", > "DISP_ERR_FG", < "NC", > "SAMD_BOOTL_PIN", < "NC", < "NC", < "NC", /* GPIO_60 */ > "SDM_SWD_CLK", > "SDM_SWD_DAT", > "SAMD_RST", /* GPIO_60 */ < "NC", > "MODE_SEL2", < "NC", > "NFC_ESE_PWR_REQ", < "NC", > "TS_VDDIO_EN", Which makes sense, as Akari and Akatsuki have a wireless charger and Akatsuki also additionally has a super-high-end-complex-for-the-time Samsung OLED display, as opposed to LCDs on the other Tama devices. Signed-off-by: Konrad Dybcio <konrad.dybcio@linaro.org> Link: https://lore.kernel.org/r/20230824-topic-tama_gpio-v1-1-014e9d198dce@linaro.org Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2023-09-19arm64: dts: qcom: Add support for the Xiaomi SM7125 platformDavid Wronek
There are 6 Xiaomi smartphones with the SM7125 SoC: - POCO M2 Pro (gram) - Redmi Note 9S (curtana) - Redmi Note 9 Pro (Global, joyeuse) - Redmi Note 9 Pro (India, curtana) - Redmi Note 9 Pro Max (excalibur) - Redmi Note 10 Lite (curtana) These devices share a common board design (a.k.a miatoll) with only a few differences. Add support for the common board, as well as support for the global Redmi Note 9 Pro. Signed-off-by: David Wronek <davidwronek@gmail.com> Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org> Link: https://lore.kernel.org/r/20230824091737.75813-5-davidwronek@gmail.com Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2023-09-19arm64: dts: qcom: Add SM7125 device treeDavid Wronek
The Snapdragon 720G (sm7125) is software-wise very similar to the Snapdragon 7c with minor differences in clock speeds and as added here, it uses the Kryo 465 instead of Kryo 468. Signed-off-by: David Wronek <davidwronek@gmail.com> Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org> Link: https://lore.kernel.org/r/20230824091737.75813-4-davidwronek@gmail.com Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2023-09-19arm64: dts: qcom: pm6150: Add resin and rtc nodesDavid Wronek
Add support for the RTC which is the same as on other PMICs and add the resin child node to the PM6150 PON device, both disabled by default. Signed-off-by: David Wronek <davidwronek@gmail.com> Tested-by: Nikita Travkin <nikita@trvn.ru> Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org> Link: https://lore.kernel.org/r/20230824091737.75813-3-davidwronek@gmail.com Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2023-09-19dt-bindings: arm: qcom: Document SM7125 and xiaomi,joyeuse boardDavid Wronek
Document the xiaomi,joyeuse board based on the Qualcomm SM7125 SoC. Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Signed-off-by: David Wronek <davidwronek@gmail.com> Link: https://lore.kernel.org/r/20230824091737.75813-2-davidwronek@gmail.com Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2023-09-19arm64: dts: qcom: sc7180: Add sku_id and board id for lazor/limozeenSheng-Liang Pan
SKU ID 10: Lazor LTE+Wifi, no-esim (Strapped 0 X 0) SKU ID 15: Limozeen LTE+Wifi, TS, no esim (Strapped 1 X 0) SKU ID 18: Limozeen LTE+Wifi, no TS, no esim (Strapped X 0 0) Even though the "no esim" boards are strapped differently than ones that have an esim, the esim isn't represented in the device tree so the same device tree can be used for LTE w/ esim and LTE w/out esim. add BRD_ID(0, Z, 0) = 10 for new board with ALC5682i-VS Signed-off-by: Sheng-Liang Pan <sheng-liang.pan@quanta.corp-partner.google.com> Reviewed-by: Douglas Anderson <dianders@chromium.org> Link: https://lore.kernel.org/r/20230823151005.v6.2.I8f20fdfe34a2e8a38373bbd65587754b324f3dcb@changeid Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2023-09-19dt-bindings: arm: qcom: add sc7180-lazor board bindingsSheng-Liang Pan
Introduce more sc7180-lazor sku and board version configuration, add no-eSIM SKU 10 for Lazor, no-eSIM SKU 15 and 18 for Limozeen, add new board version 10 for audio codec ALC5682i-VS. Signed-off-by: Sheng-Liang Pan <sheng-liang.pan@quanta.corp-partner.google.com> Reviewed-by: Douglas Anderson <dianders@chromium.org> Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Link: https://lore.kernel.org/r/20230823151005.v6.1.I26e017b00a341e7a5a2e94a83596923713408817@changeid Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2023-09-19arm64: dts: qcom: sm8450: switch PCIe QMP PHY to new style of bindingsDmitry Baryshkov
Change the PCIe QMP PHY to use newer style of QMP PHY bindings (single resource region, no per-PHY subnodes). As a part of this conversion also change the "refgen" name to more correct "rchng". Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org> Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> Link: https://lore.kernel.org/r/20230820142035.89903-18-dmitry.baryshkov@linaro.org Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2023-09-19arm64: dts: qcom: sm8250: switch PCIe QMP PHY to new style of bindingsDmitry Baryshkov
Change the PCIe QMP PHY to use newer style of QMP PHY bindings (single resource region, no per-PHY subnodes). Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org> Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> Link: https://lore.kernel.org/r/20230820142035.89903-17-dmitry.baryshkov@linaro.org Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2023-09-19arm64: dts: qcom: sm8150: switch PCIe QMP PHY to new style of bindingsDmitry Baryshkov
Change the PCIe QMP PHY to use newer style of QMP PHY bindings (single resource region, no per-PHY subnodes). As a part of this conversion also add the missing "ref" clock to the PCIe PHY devices. Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org> Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> Link: https://lore.kernel.org/r/20230820142035.89903-16-dmitry.baryshkov@linaro.org Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2023-09-19arm64: dts: qcom: sm8150: add ref clock to PCIe PHYsDmitry Baryshkov
Follow the rest of the platforms and add "ref" clocks to both PCIe PHYs found on the Qualcomm SM8150 platform. Fixes: a1c86c680533 ("arm64: dts: qcom: sm8150: Add PCIe nodes") Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> Link: https://lore.kernel.org/r/20230820142035.89903-15-dmitry.baryshkov@linaro.org Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2023-09-19arm64: dts: qcom: sdm845: switch PCIe QMP PHY to new style of bindingsDmitry Baryshkov
Change the PCIe QMP PHY to use newer style of QMP PHY bindings (single resource region, no per-PHY subnodes). Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org> Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> Link: https://lore.kernel.org/r/20230820142035.89903-14-dmitry.baryshkov@linaro.org Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2023-09-19arm64: dts: qcom: sc8180x: switch PCIe QMP PHY to new style of bindingsDmitry Baryshkov
Change the PCIe QMP PHY to use newer style of QMP PHY bindings (single resource region, no per-PHY subnodes). While we are at it, rename PHY nodes to `phy@`. Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> Link: https://lore.kernel.org/r/20230820142035.89903-13-dmitry.baryshkov@linaro.org Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2023-09-19arm64: dts: qcom: sc7280: switch PCIe QMP PHY to new style of bindingsDmitry Baryshkov
Change the PCIe QMP PHY to use newer style of QMP PHY bindings (single resource region, no per-PHY subnodes). Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> Link: https://lore.kernel.org/r/20230820142035.89903-12-dmitry.baryshkov@linaro.org Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2023-09-19arm64: dts: qcom: msm8998: switch PCIe QMP PHY to new style of bindingsDmitry Baryshkov
Change the PCIe QMP PHY to use newer style of QMP PHY bindings (single resource region, no per-PHY subnodes). Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org> Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> Link: https://lore.kernel.org/r/20230820142035.89903-11-dmitry.baryshkov@linaro.org Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2023-09-19arm64: dts: qcom: ipq8074: switch PCIe QMP PHY to new style of bindingsDmitry Baryshkov
Change the PCIe QMP PHY to use newer style of QMP PHY bindings (single resource region, no per-PHY subnodes). Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> Link: https://lore.kernel.org/r/20230820142035.89903-10-dmitry.baryshkov@linaro.org Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2023-09-19arm64: dts: qcom: ipq6018: switch PCIe QMP PHY to new style of bindingsDmitry Baryshkov
Change the PCIe QMP PHY to use newer style of QMP PHY bindings (single resource region, no per-PHY subnodes). Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org> Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> Link: https://lore.kernel.org/r/20230820142035.89903-9-dmitry.baryshkov@linaro.org Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2023-09-19arm64: dts: qcom: sc7280: drop incorrect EUD port on SoC sideKrzysztof Kozlowski
Qualcomm Embedded USB Debugger (EUD) second port should point to Type-C USB connector. Such connector was defined directly in root node of sc7280.dtsi which is clearly wrong. SC7280 is a chip, so physically it does not have USB Type-C port. The connector is usually accessible through some USB switch or controller. Doug Anderson said that he wasn't ever able to use EUD on Herobrine boards, probably because of invalid or missing DTS description - DTS is saying EUD is on usb_2 node, which is connected to a USB Hub, not to the Type-C port. Correct the EUD/USB connector topology by removing the top-level fake USB connector and EUD port pointing to it, and disabling the incomplete EUD device node. This fixes also dtbs_check warnings: sc7280-herobrine-crd.dtb: connector: ports:port@0: 'reg' is a required property Link: https://lore.kernel.org/all/CAD=FV=Xt26=rBf99mzkAuwwtb2f-jnKtnHaEhXnthz0a5zke4Q@mail.gmail.com/ Fixes: 9ee402ccfeb1 ("arm64: dts: qcom: sc7280: Fix EUD dt node syntax") Cc: Souradeep Chowdhury <quic_schowdhu@quicinc.com> Cc: Bhupesh Sharma <bhupesh.sharma@linaro.org> Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Reviewed-by: Douglas Anderson <dianders@chromium.org> Link: https://lore.kernel.org/r/20230820075626.22600-1-krzysztof.kozlowski@linaro.org Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2023-09-19arm64: dts: qcom: sdm670: Fix pdc mappingKonrad Dybcio
As pointed out by Richard, I missed a non-continuity in one of the ranges. Fix it. Reported-by: Richard Acayan <mailingradian@gmail.com> Fixes: b51ee205dc4f ("arm64: dts: qcom: sdm670: Add PDC") Signed-off-by: Konrad Dybcio <konrad.dybcio@linaro.org> Acked-by: Richard Acayan <mailingradian@gmail.com> Link: https://lore.kernel.org/r/20230818-topic-670_pdc_fix-v1-1-1ba025041de7@linaro.org Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2023-09-19arm64: dts: qcom: Use QCOM_SCM_VMID defines for qcom,vmidLuca Weiss
Since we have those defines available in a header, let's use them everywhere where qcom,vmid property is used. Signed-off-by: Luca Weiss <luca.weiss@fairphone.com> Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org> Reviewed-by: Bryan O'Donoghue <bryan.odonoghue@linaro.org> Link: https://lore.kernel.org/r/20230818-qcom-vmid-defines-v1-1-45b610c96b13@fairphone.com Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2023-09-19arm64: dts: qcom: sa8775p-ride: Describe sgmii_phy1 irqAndrew Halaney
There's an irq hooked up, so let's describe it. Prior to commit 9757300d2750 ("pinctrl: qcom: Add intr_target_width field to support increased number of interrupt targets") one would not see the IRQ fire, despite some (invasive) debugging showing that the GPIO was in fact asserted, resulting in the interface staying down. Now that the IRQ is properly routed we can describe it. Signed-off-by: Andrew Halaney <ahalaney@redhat.com> Reviewed-by: Bartosz Golaszewski <bartosz.golaszewski@linaro.org> Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org> Link: https://lore.kernel.org/r/20230817213815.638189-3-ahalaney@redhat.com Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2023-09-19arm64: dts: qcom: sa8775p-ride: Describe sgmii_phy0 irqAndrew Halaney
There's an irq hooked up, so let's describe it. Prior to commit 9757300d2750 ("pinctrl: qcom: Add intr_target_width field to support increased number of interrupt targets") one would not see the IRQ fire, despite some (invasive) debugging showing that the GPIO was in fact asserted, resulting in the interface staying down. Now that the IRQ is properly routed we can describe it. Signed-off-by: Andrew Halaney <ahalaney@redhat.com> Reviewed-by: Bartosz Golaszewski <bartosz.golaszewski@linaro.org> Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org> Link: https://lore.kernel.org/r/20230817213815.638189-2-ahalaney@redhat.com Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2023-09-19arm64: dts: qcom: qrb5165-rb5: enable DP altmodeDmitry Baryshkov
Add displayport altmode declaration to the Type-C controller node to enable DP altmode negotiation. Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> Link: https://lore.kernel.org/r/20230817145940.9887-5-dmitry.baryshkov@linaro.org Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2023-09-19arm64: dts: qcom: qrb5165-rb5: enable displayport controllerDmitry Baryshkov
Enable the onboard displayport controller, connect it to QMP PHY. Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org> Link: https://lore.kernel.org/r/20230817145940.9887-4-dmitry.baryshkov@linaro.org Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2023-09-19arm64: dts: qcom: qrb5165-rb5: add onboard USB-C redriverDmitry Baryshkov
Add the nb7vpq904m, onboard USB-C redriver / retimer. Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> Reviewed-by: Bryan O'Donoghue <bryan.odonoghue@linaro.org> Link: https://lore.kernel.org/r/20230817145940.9887-3-dmitry.baryshkov@linaro.org Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2023-09-19arm64: dts: qcom: sm8250: Add DisplayPort device nodeDmitry Baryshkov
Declare the displayport controller present on the Qualcomm SM8250 SoC. Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> Link: https://lore.kernel.org/r/20230817145940.9887-2-dmitry.baryshkov@linaro.org Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2023-09-19arm64: dts: qcom: qrb5165-rb5: Switch on TCPM orientation-switch for ↵Bryan O'Donoghue
usb_1_qmpphy Switch on USB orientation-switching for usb_1_qmp via TCPM. Detecting the orientation switch is required to get the PHY to reset and bring-up the PHY with the CC lines set to the appropriate lane. Signed-off-by: Bryan O'Donoghue <bryan.odonoghue@linaro.org> Link: https://lore.kernel.org/r/20230816115151.501736-8-bryan.odonoghue@linaro.org Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2023-09-19arm64: dts: qcom: qrb5165-rb5: Switch on TCPM usb-role-switching for usb_1Bryan O'Donoghue
Switch on usb-role-switching for usb_1 via TCPM. We need to declare usb-role-switch in &usb_1 and associate with the remote-endpoint in TCPM which provides the necessary signal. Signed-off-by: Bryan O'Donoghue <bryan.odonoghue@linaro.org> Link: https://lore.kernel.org/r/20230816115151.501736-7-bryan.odonoghue@linaro.org Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2023-09-19arm64: dts: qcom: qrb5165-rb5: Switch on basic TCPMBryan O'Donoghue
Switch on TCPM for the RB5. Here we declare as a source only not a sink since qrb5165 doesn't support powering exclusively from the type-c port. Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org> Signed-off-by: Bryan O'Donoghue <bryan.odonoghue@linaro.org> Link: https://lore.kernel.org/r/20230816115151.501736-6-bryan.odonoghue@linaro.org Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2023-09-19arm64: dts: qcom: qrb5165-rb5: Switch on Type-C VBUS boostBryan O'Donoghue
Switch on VBUS for the Type-C port. We need to support a higher amperage than the bootloader set 2 Amps. Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org> Signed-off-by: Bryan O'Donoghue <bryan.odonoghue@linaro.org> Link: https://lore.kernel.org/r/20230816115151.501736-5-bryan.odonoghue@linaro.org Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2023-09-19arm64: dts: qcom: pm8150b: Add a TCPM descriptionBryan O'Donoghue
Type-C port management functionality lives inside of the PMIC block on pm8150b. The Type-C port management logic controls orientation detection, vbus/vconn sense and to send/receive Type-C Power Domain messages. Signed-off-by: Bryan O'Donoghue <bryan.odonoghue@linaro.org> Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org> Link: https://lore.kernel.org/r/20230816115151.501736-4-bryan.odonoghue@linaro.org Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2023-09-19arm64: dts: qcom: sm8250: Define ports for qmpphy orientation-switchingBryan O'Donoghue
ports for orientation switching input and output. The individual board dts files will instantiate port@0, port@1 and/or port@2 depending on the supported feature-set. Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org> Signed-off-by: Bryan O'Donoghue <bryan.odonoghue@linaro.org> Link: https://lore.kernel.org/r/20230816115151.501736-3-bryan.odonoghue@linaro.org Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2023-09-19arm64: dts: qcom: sc7180: Reorganize trogdor rt5682 audio codec dtsDouglas Anderson
It was asserted that the "/delete-property/ VBAT-supply;" that we needed to do in the rt5682s dts fragment was ugly. Let's change up all the trogdor device trees to make it explicit which version of "rt5682" we have and avoid the need for the "delete-property". As a side effect, this nicely gets rid of the need for a delete-node in coachz, which doesn't use "rt5682" at all. A few notes: - This doesn't get rid of every "/delete-node/" in trogdor, just the one that was used for rt5682s. - Though we no longer have any "/delete-node/", we do still override the "model" in the "sound" node in one case (in pompom) since that uses the "2mic" sound setup. This is validated to produce the same result (other than a few properties being reordered) when taking the dtbs generated by the kernel build and then doing: for dtb in *trogdor*.dtb; do dtc -I dtb -O dts $dtb -o out/$dtb.dts; done Suggested-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Signed-off-by: Douglas Anderson <dianders@chromium.org> Reviewed-by: Sheng-Liang Pan <sheng-liang.pan@quanta.corp-partner.google.com> Link: https://lore.kernel.org/r/20230816112143.2.I29a5a330b6994afca81871f74bbacaf55b155937@changeid Signed-off-by: Bjorn Andersson <andersson@kernel.org>
generated by cgit (git 2.34.1) at 2025-09-21 07:00:45 +0000