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2020-05-28Merge tag 'drivers_soc_for_5.8' of ↵Arnd Bergmann
git://git.kernel.org/pub/scm/linux/kernel/git/ssantosh/linux-keystone into arm/drivers soc: ARM TI update for v5.8 - Platform chipid driver support and associated dts doc update - Sparse warning fix in Navigator driver * tag 'drivers_soc_for_5.8' of git://git.kernel.org/pub/scm/linux/kernel/git/ssantosh/linux-keystone: drivers: soc: ti: knav_qmss_queue: Make knav_gp_range_ops static soc: ti: add k3 platforms chipid module driver dt-bindings: soc: ti: add binding for k3 platforms chipid module Link: https://lore.kernel.org/r/1590638489-12023-1-git-send-email-santosh.shilimkar@oracle.com Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2020-05-28staging: tegra-video: fix V4L2 dependencyArnd Bergmann
Rather than using a dependency on VIDEO_V4L2, this driver uses "select", which fails when other dependencies are missing: WARNING: unmet direct dependencies detected for VIDEO_V4L2 Depends on [n]: MEDIA_SUPPORT [=y] && (I2C [=y] || I2C [=y]=n) && VIDEO_DEV [=n] Selected by [y]: - VIDEO_TEGRA [=y] && STAGING [=y] && STAGING_MEDIA [=y] && MEDIA_SUPPORT [=y] && TEGRA_HOST1X [=y] (plus an endless stream of link errors for other drivers that depend on VIDEO_V4L2 but are now lacking their dependencies) Link: https://lore.kernel.org/r/20200527221327.3339232-1-arnd@arndb.de Fixes: 3d8a97eabef0 ("media: tegra-video: Add Tegra210 Video input driver") Reviewed-by: Mauro Carvalho Chehab <mchehab+huawei@kernel.org> Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2020-05-28Merge tag 'soc-fsl-next-v5.8' of ↵Arnd Bergmann
git://git.kernel.org/pub/scm/linux/kernel/git/leo/linux into arm/drivers NXP/FSL SoC driver updates for v5.8 DPAA2 DPIO driver - Prefer the CPU affined DPIO QUICC Engine drivers - Replace one-element array and use struct_size() helper Cleanups in various drivers * tag 'soc-fsl-next-v5.8' of git://git.kernel.org/pub/scm/linux/kernel/git/leo/linux: soc: fsl: dpio: Remove unused inline function qbman_write_eqcr_am_rt_register soc: fsl: qe: clean up an indentation issue soc: fsl: dpio: Prefer the CPU affine DPIO soc: fsl: qbman: Remove unused inline function qm_eqcr_get_ci_stashing soc: fsl: qe: Replace one-element array and use struct_size() helper treewide: Replace zero-length array with flexible-array Link: https://lore.kernel.org/r/20200527215740.9279-1-leoyang.li@nxp.com Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2020-05-28tee: fix crypto selectArnd Bergmann
When selecting a crypto cipher, we also need to select the subsystem itself: WARNING: unmet direct dependencies detected for CRYPTO_SHA1 Depends on [m]: CRYPTO [=m] Selected by [y]: - TEE [=y] && (HAVE_ARM_SMCCC [=n] || COMPILE_TEST [=y] || CPU_SUP_AMD [=y]) Selected by [m]: - CRYPTO_DEV_QAT [=m] && CRYPTO [=m] && CRYPTO_HW [=y] - CRYPTO_DEV_MEDIATEK [=m] && CRYPTO [=m] && CRYPTO_HW [=y] && (ARM && ARCH_MEDIATEK || COMPILE_TEST [=y]) - CRYPTO_DEV_SAFEXCEL [=m] && CRYPTO [=m] && CRYPTO_HW [=y] && (OF [=y] || PCI [=y] || COMPILE_TEST [=y]) && HAS_IOMEM [=y] - CRYPTO_DEV_CCREE [=m] && CRYPTO [=m] && CRYPTO_HW [=y] && OF [=y] && HAS_DMA [=y] - CRYPTO_DEV_SP_CCP [=y] && CRYPTO [=m] && CRYPTO_HW [=y] && CRYPTO_DEV_CCP [=y] && CRYPTO_DEV_CCP_DD [=m] && DMADEVICES [=y] Link: https://lore.kernel.org/r/20200527133924.724819-1-arnd@arndb.de Fixes: e33bcbab16d1 ("tee: add support for session's client UUID generation") Signed-off-by: Arnd Bergmann <arnd@arndb.de> Reviewed-by: Vesa Jääskeläinen <vesa.jaaskelainen@vaisala.com> Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2020-05-27drivers: soc: ti: knav_qmss_queue: Make knav_gp_range_ops staticSamuel Zou
Fix the following sparse warning: drivers/soc/ti/knav_qmss_queue.c:412:23: warning: symbol 'knav_gp_range_ops' was not declared. The knav_acc_firmwares has only call site within knav_qmss_queue.c It should be static Fixes: 41f93af900a2 ("soc: ti: add Keystone Navigator QMSS driver") Reported-by: Hulk Robot <hulkci@huawei.com> Signed-off-by: Samuel Zou <zou_wei@huawei.com> Signed-off-by: Santosh Shilimkar <santosh.shilimkar@oracle.com>
2020-05-27soc: ti: add k3 platforms chipid module driverGrygorii Strashko
The Texas Instruments K3 Multicore SoC platforms have chipid module which is represented by CTRLMMR_xxx_JTAGID register and contains information about SoC id and revision. Bits: 31-28 VARIANT Device variant 27-12 PARTNO Part number 11-1 MFG Indicates TI as manufacturer (0x17) 1 Always 1 This patch adds corresponding driver to identify the TI K3 SoC family and revision, and registers this information with the SoC bus. It is available under /sys/devices/soc0/ for user space, and can be checked, where needed, in Kernel using soc_device_match(). Identification is done by: - checking MFG to be TI ID - retrieving Device variant (revision) - retrieving Part number and convert it to the family - retrieving machine from DT "/model" Example J721E: # cat /sys/devices/soc0/{machine,family,revision} Texas Instruments K3 J721E SoC J721E SR1.0 Example AM65x: # cat /sys/devices/soc0/{machine,family,revision} Texas Instruments AM654 Base Board AM65X SR1.0 Cc: Arnd Bergmann <arnd@arndb.de> Signed-off-by: Grygorii Strashko <grygorii.strashko@ti.com> Reviewed-by: Lokesh Vutla <lokeshvutla@ti.com> Reviewed-by: Tero Kristo <t-kristo@ti.com> Signed-off-by: Santosh Shilimkar <santosh.shilimkar@oracle.com>
2020-05-27dt-bindings: soc: ti: add binding for k3 platforms chipid moduleGrygorii Strashko
Add DT binding for Texas Instruments K3 Multicore SoC platforms chipid module which is represented by CTRLMMR_xxx_JTAGID register and contains information about SoC id and revision. Signed-off-by: Grygorii Strashko <grygorii.strashko@ti.com> Reviewed-by: Lokesh Vutla <lokeshvutla@ti.com> Reviewed-by: Tero Kristo <t-kristo@ti.com> Signed-off-by: Santosh Shilimkar <santosh.shilimkar@oracle.com>
2020-05-26Merge tag 'hisi-drivers-for-5.8' of git://github.com/hisilicon/linux-hisi ↵Arnd Bergmann
into arm/drivers ARM64: hisi: SoC driver updates for 5.8 - Generate consistent behaviour for logic_pio by defining and using generic _inX() and _outX() in asm-generic/io.h which have per-arch overrideable barriers. * tag 'hisi-drivers-for-5.8' of git://github.com/hisilicon/linux-hisi: logic_pio: Use _inX() and _outX() logic_pio: Improve macro argument name io: Provide _inX() and _outX()
2020-05-26Merge tag 'imx-drivers-5.8' of ↵Arnd Bergmann
git://git.kernel.org/pub/scm/linux/kernel/git/shawnguo/linux into arm/drivers i.MX drivers update for 5.8: - Optimize imx-scu driver to use one TX and one RX instead of four for talking to SCU. - Fix one possible message header corruption where the response is longer than the request. - Move System Control defines into dt-bindings header, so that DT can use them as well. - A couple of small fixups. * tag 'imx-drivers-5.8' of git://git.kernel.org/pub/scm/linux/kernel/git/shawnguo/linux: firmware: imx: scu: Fix possible memory leak in imx_scu_probe() dt-bindings: firmware: imx: Add more system controls and PM clock types dt-bindings: firmware: imx: Move system control into dt-binding headfile firmware: imx: scu: Fix corruption of header firmware: imx-scu: Support one TX and one RX soc: imx8m: No need to put node when of_find_compatible_node() failed Link: https://lore.kernel.org/r/20200523032516.11016-1-shawnguo@kernel.org Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2020-05-25Merge tag 'tegra-for-5.8-soc-v2' of ↵Arnd Bergmann
git://git.kernel.org/pub/scm/linux/kernel/git/tegra/linux into arm/drivers soc/tegra: Changes for v5.8-rc1 Enables Tegra210, Tegra186 and Tegra194 to be woken from suspend by the PMIC and exports a bit more information about SoCs via sysfs. * tag 'tegra-for-5.8-soc-v2' of git://git.kernel.org/pub/scm/linux/kernel/git/tegra/linux: soc/tegra: pmc: Enable PMIC wake event on Tegra210 soc: tegra: Fix tegra_pmc_get_suspend_mode definition soc/tegra: pmc: Enable PMIC wake event on Tegra194 soc/tegra: pmc: Select GENERIC_PINCONF soc/tegra: fuse: Update the SoC revision attribute to display a name soc/tegra: fuse: Trivial clean-up of tegra_init_revision() soc/tegra: fuse: Add custom SoC attributes soc/tegra: pmc: Enable PMIC wake event on Tegra186 Link: https://lore.kernel.org/r/20200522142846.2376224-2-thierry.reding@gmail.com Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2020-05-25Merge tag 'tegra-for-5.8-media' of ↵Arnd Bergmann
git://git.kernel.org/pub/scm/linux/kernel/git/tegra/linux into arm/drivers media: tegra: Changes for v5.8-rc1 This contains a V4L2 video capture driver for Tegra210. * tag 'tegra-for-5.8-media' of git://git.kernel.org/pub/scm/linux/kernel/git/tegra/linux: media: tegra-video: Do not enable COMPILE_TEST MAINTAINERS: correct path in TEGRA VIDEO DRIVER media: tegra-video: Make tegra210_video_formats static MAINTAINERS: Add Tegra Video driver section media: tegra-video: Add Tegra210 Video input driver dt-bindings: i2c: tegra: Document Tegra210 VI I2C dt-bindings: tegra: Add VI and CSI bindings dt-bindings: cpufreq: Add binding for NVIDIA Tegra20/30 dt-bindings: memory: tegra: Add external memory controller binding for Tegra210 dt-bindings: clock: tegra: Remove PMC clock IDs dt-bindings: clock: tegra: Add clock ID for CSI TPG clock Link: https://lore.kernel.org/r/20200515145311.1580134-7-thierry.reding@gmail.com Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2020-05-25Merge tag 'tegra-for-5.8-of' of ↵Arnd Bergmann
git://git.kernel.org/pub/scm/linux/kernel/git/tegra/linux into arm/drivers of: Changes for v5.8-rc1 These changes add support for multiple reserved-memory regions per device. * tag 'tegra-for-5.8-of' of git://git.kernel.org/pub/scm/linux/kernel/git/tegra/linux: of: Make <linux/of_reserved_mem.h> self-contained of: reserved-memory: Support multiple regions per device of: reserved-memory: Support lookup of regions by name Link: https://lore.kernel.org/r/20200515145311.1580134-5-thierry.reding@gmail.com Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2020-05-25Merge tag 'tegra-for-5.8-cpuidle' of ↵Arnd Bergmann
git://git.kernel.org/pub/scm/linux/kernel/git/tegra/linux into arm/drivers cpuidle: Changes for v5.8-rc1 These changes add support for cluster power-down on Tegra30. * tag 'tegra-for-5.8-cpuidle' of git://git.kernel.org/pub/scm/linux/kernel/git/tegra/linux: cpuidle: tegra: Support CPU cluster power-down state on Tegra30 ARM: tegra: Do not fully reinitialize L2 on resume ARM: tegra: Initialize r0 register for firmware wake-up Link: https://lore.kernel.org/r/20200515145311.1580134-3-thierry.reding@gmail.com Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2020-05-25Merge tag 'tegra-for-5.8-cpufreq' of ↵Arnd Bergmann
git://git.kernel.org/pub/scm/linux/kernel/git/tegra/linux into arm/drivers cpufreq: Changes for v5.8-rc1 This change move Tegra20 and Tegra30 to the generic DT CPU frequency scaling driver. * tag 'tegra-for-5.8-cpufreq' of git://git.kernel.org/pub/scm/linux/kernel/git/tegra/linux: cpufreq: tegra20: Use generic cpufreq-dt driver (Tegra30 supported now) Link: https://lore.kernel.org/r/20200515145311.1580134-2-thierry.reding@gmail.com Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2020-05-25Merge tag 'samsung-drivers-5.8' of ↵Arnd Bergmann
git://git.kernel.org/pub/scm/linux/kernel/git/krzk/linux into arm/drivers Samsung SoC drivers changes for v5.8 Fix and minor cleanup of Exynos5422 DMC (Dynamic Memory Controller) driver. * tag 'samsung-drivers-5.8' of git://git.kernel.org/pub/scm/linux/kernel/git/krzk/linux: memory: samsung: exynos5422-dmc: Reduce protected code area in IRQ handler memory: samsung: exynos5422-dmc: Fix tFAW timings alignment Link: https://lore.kernel.org/r/20200519070111.6265-1-krzk@kernel.org Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2020-05-25Merge tag 'qcom-drivers-for-5.8' of ↵Arnd Bergmann
git://git.kernel.org/pub/scm/linux/kernel/git/qcom/linux into arm/drivers Qualcomm driver updates for v5.8 This contains a large set of cleanups, bug fixes, general improvements and documentation fixes for the RPMH driver. It adds a debugfs mechanism for inspecting Command DB. Socinfo got the "soc_id" attribute defines and definitions for a various variants of MSM8939. RPMH, RPMPD and RPMHPD where made possible to build as modules, but RPMH had to be reverted due to a compilation issue when tracing is enabled. RPMHPD gained power-domains for the SM8250 voltage corners. The SCM driver gained fixes for two build warnings and the SMP2P had an unnecessary error print removed. * tag 'qcom-drivers-for-5.8' of git://git.kernel.org/pub/scm/linux/kernel/git/qcom/linux: (42 commits) Revert "soc: qcom: rpmh: Allow RPMH driver to be loaded as a module" soc: qcom: rpmh-rsc: Remove the pm_lock soc: qcom: rpmh-rsc: Simplify locking by eliminating the per-TCS lock kernel/cpu_pm: Fix uninitted local in cpu_pm soc: qcom: rpmh-rsc: We aren't notified of our own failure w/ NOTIFY_BAD soc: qcom: rpmh-rsc: Correctly ignore CPU_CLUSTER_PM notifications firmware: qcom_scm-legacy: Replace zero-length array with flexible-array soc: qcom: rpmh-rsc: Timeout after 1 second in write_tcs_reg_sync() soc: qcom: rpmh-rsc: Factor "tcs_reg_addr" and "tcs_cmd_addr" calculation soc: qcom: socinfo: add msm8936/39 and apq8036/39 soc ids soc: qcom: aoss: Add SM8250 compatible soc: qcom: pdr: Remove impossible error condition soc: qcom: rpmh: Dirt can only make you dirtier, not cleaner soc: qcom: rpmhpd: Add SM8250 power domains firmware: qcom_scm: fix bogous abuse of dma-direct internals dt-bindings: soc: qcom: apr: Use generic node names for APR services firmware: qcom_scm: Remove unneeded conversion to bool soc: qcom: cmd-db: Properly endian swap the slv_id for debugfs soc: qcom: cmd-db: Use 5 digits for printing address soc: qcom: cmd-db: Cast sizeof() to int to silence field width warning ... Link: https://lore.kernel.org/r/20200519052533.1250024-1-bjorn.andersson@linaro.org Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2020-05-25Merge tag 'v5.7-next-soc.2' of ↵Arnd Bergmann
git://git.kernel.org/pub/scm/linux/kernel/git/matthias.bgg/linux into arm/drivers - make mmsys kconfig entry to depend on ARCH_MEDIATEK instead of a specific SoC - move clock driver to bind against the new mmsys driver (mt2712, mt2701, mt8183, mt6797 and mt6779) * tag 'v5.7-next-soc.2' of git://git.kernel.org/pub/scm/linux/kernel/git/matthias.bgg/linux: clk/soc: mediatek: mt6779: Bind clock driver from platform device clk/soc: mediatek: mt6797: Bind clock driver from platform device clk/soc: mediatek: mt8183: Bind clock driver from platform device clk / soc: mediatek: Bind clock and gpu driver for mt2701 clk / soc: mediatek: Bind clock and gpu driver for mt2712 soc: mediatek: Enable mmsys driver by default if Mediatek arch is selected Link: https://lore.kernel.org/r/d2eb19f4-589a-89c1-02ad-9f19a6cfb09a@gmail.com Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2020-05-25Merge tag 'tee-login-for-5.8' of ↵Arnd Bergmann
git://git.linaro.org/people/jens.wiklander/linux-tee into arm/drivers Adds utility function in TEE subsystem for client UUID generation. This function is also used in the optee driver. * tag 'tee-login-for-5.8' of git://git.linaro.org/people/jens.wiklander/linux-tee: tee: optee: Add support for session login client UUID generation tee: add support for session's client UUID generation Link: https://lore.kernel.org/r/20200512131243.GA10028@jade Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2020-05-25Merge tag 'reset-for-v5.8' of git://git.pengutronix.de/pza/linux into ↵Arnd Bergmann
arm/drivers Reset controller updates for v5.8 This tag adds support for i.MX8MP and i.MX8MN SoCs to the i.MX7 reset controller driver, extends the Hi6220 reset driver to support the AO reset controller used to bring the Mali450 GPU out of reset, and adds a define for the internal DAC reset line on Amlogic GXL SoCs. * tag 'reset-for-v5.8' of git://git.pengutronix.de/pza/linux: reset: hi6220: Add support for AO reset controller reset: imx7: Add support for i.MX8MP SoC dt-bindings: reset: imx7: Document usage on i.MX8MP SoC dt-bindings: reset: imx7: Add support for i.MX8MN dt-bindings: reset: meson: add gxl internal dac reset Link: https://lore.kernel.org/r/20200515143844.GA17201@pengutronix.de Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2020-05-25Merge tag 'amlogic-drivers' of ↵Arnd Bergmann
git://git.kernel.org/pub/scm/linux/kernel/git/khilman/linux-amlogic into arm/drivers soc: amlogic: driver updates for v5.8 - support GX SoCs in the EE power-controller driver * tag 'amlogic-drivers' of git://git.kernel.org/pub/scm/linux/kernel/git/khilman/linux-amlogic: soc: amlogic: meson-ee-pwrc: add support for the Meson GX SoCs soc: amlogic: meson-ee-pwrc: add support for Meson8/Meson8b/Meson8m2 dt-bindings: power: meson-ee-pwrc: add support for the Meson GX SoCs dt-bindings: power: meson-ee-pwrc: add support for Meson8/8b/8m2 Link: https://lore.kernel.org/r/5ec6f570.1c69fb81.a3753.711b@mx.google.com Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2020-05-25Merge tag 'tee-smatch-for-5.8' of ↵Arnd Bergmann
git://git.linaro.org/people/jens.wiklander/linux-tee into arm/drivers tee: remove unnecessary NULL check in tee_shm_alloc() * tag 'tee-smatch-for-5.8' of git://git.linaro.org/people/jens.wiklander/linux-tee: tee: remove unnecessary NULL check in tee_shm_alloc() Link: https://lore.kernel.org/r/20200504181333.GA11018@jade Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2020-05-25Merge tag 'v5.7-next-soc' of ↵Arnd Bergmann
git://git.kernel.org/pub/scm/linux/kernel/git/matthias.bgg/linux into arm/drivers Refactor the mmsys to reflect that it's a clock driver and the entry point for the DRM subsystem. Replace clk-provider.h include with of_clk.h for mach-mediatek * tag 'v5.7-next-soc' of git://git.kernel.org/pub/scm/linux/kernel/git/matthias.bgg/linux: ARM: mediatek: Replace <linux/clk-provider.h> by <linux/of_clk.h> soc: mediatek: Missing platform_device_unregister() on error in mtk_mmsys_probe() soc: mediatek: mmsys: Drop <linux/clk-provider.h> soc / drm: mediatek: Fix mediatek-drm device probing soc / drm: mediatek: Move routing control to mmsys device clk / soc: mediatek: Move mt8173 MMSYS to platform driver dt-bindings: mediatek: Update mmsys binding to reflect it is a system controller drm/mediatek: Omit warning on probe defers Link: https://lore.kernel.org/r/2cf27d33-59c6-023b-9993-57a2639824ea@gmail.com Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2020-05-25Merge tag 'tegra-for-5.8-firmware-v2' of ↵Arnd Bergmann
git://git.kernel.org/pub/scm/linux/kernel/git/tegra/linux into arm/drivers firmware: tegra: Changes for v5.8-rc1 This contains a change that makes the BPMP driver a regular driver, which fixes some weird suspend/resume ordering issues. Another fix is also included to implement another way of enabling the L2 cache after LP2 suspend. * tag 'tegra-for-5.8-firmware-v2' of git://git.kernel.org/pub/scm/linux/kernel/git/tegra/linux: firmware: tegra: Defer BPMP probe if shared memory not available firmware: tf: Different way of L2 cache enabling after LP2 suspend firmware: tegra: Make BPMP a regular driver Link: https://lore.kernel.org/r/20200515145311.1580134-6-thierry.reding@gmail.com Link: https://lore.kernel.org/r/20200522142846.2376224-1-thierry.reding@gmail.com Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2020-05-25Merge tag 'renesas-drivers-for-v5.8-tag2' of ↵Arnd Bergmann
git://git.kernel.org/pub/scm/linux/kernel/git/geert/renesas-devel into arm/drivers Renesas driver updates for v5.8 (take two) - Add the main config option for the RZ/G1H SoC. * tag 'renesas-drivers-for-v5.8-tag2' of git://git.kernel.org/pub/scm/linux/kernel/git/geert/renesas-devel: soc: renesas: Add Renesas R8A7742 config option Link: https://lore.kernel.org/r/20200515100547.14671-5-geert+renesas@glider.be Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2020-05-25Merge tag 'tee-subsys-for-5.8' of ↵Arnd Bergmann
git://git.linaro.org/people/jens.wiklander/linux-tee into arm/drivers TEE subsystem work - Reserve GlobalPlatform implementation defined logon method range - Add support to register kernel memory with TEE to allow TEE bus drivers to register memory references. * tag 'tee-subsys-for-5.8' of git://git.linaro.org/people/jens.wiklander/linux-tee: tee: add private login method for kernel clients tee: enable support to register kernel memory Link: https://lore.kernel.org/r/20200504181049.GA10860@jade Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2020-05-25Merge tag 'renesas-drivers-for-v5.8-tag1' of ↵Arnd Bergmann
git://git.kernel.org/pub/scm/linux/kernel/git/geert/renesas-devel into arm/drivers Renesas driver updates for v5.8 - Add System Controller (SYSC) and Reset (RST) support for the new RZ/G1H (R8A7742) SoC. * tag 'renesas-drivers-for-v5.8-tag1' of git://git.kernel.org/pub/scm/linux/kernel/git/geert/renesas-devel: soc: renesas: rcar-rst: Add support for RZ/G1H soc: renesas: rcar-sysc: Add R8A7742 support clk: renesas: Add r8a7742 CPG Core Clock Definitions dt-bindings: power: rcar-sysc: Add r8a7742 power domain index macros Link: https://lore.kernel.org/r/20200430084849.1457-5-geert+renesas@glider.be Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2020-05-25Merge tag 'scmi-updates-5.8' of ↵Arnd Bergmann
git://git.kernel.org/pub/scm/linux/kernel/git/sudeep.holla/linux into arm/drivers ARM SCMI/SCPI updates for v5.8 1. Addition of ARM SMC/HVC as SCMI transport type with required abstraction already in place 2. Initial infrastructure support to add SCMI notifications from platform to agents 3. Miscellaneous fix adding header include guards * tag 'scmi-updates-5.8' of git://git.kernel.org/pub/scm/linux/kernel/git/sudeep.holla/linux: firmware: arm_scmi: fix psci dependency firmware: arm_scmi: Fix return error code in smc_send_message firmware: arm_scmi: Fix handling of unexpected delayed responses firmware: arm_scmi: Clear channel for delayed responses firmware: arm_scmi: Clear channel on reception of unexpected responses firmware: arm_scmi: Rename .clear_notification() transport_ops firmware: arm_scmi: Add support for notifications message processing firmware: arm_scmi: Add notifications support in transport layer firmware: arm_scmi: Update protocol commands and notification list firmware: arm_scmi: Add receive buffer support for notifications firmware: arm_scpi: Add include guard to linux/scpi_protocol.h firmware: arm_scmi: Add include guard to linux/scmi_protocol.h firmware: arm_scmi: Drop checking for shmem property in parent node firmware: arm_scmi: Check shmem property for channel availablity firmware: arm_scmi: Drop empty stub for smc_mark_txdone firmware: arm_scmi: Make mutex channel specific firmware: arm_scmi: Add smc/hvc transport dt-bindings: arm: Add smc/hvc transport for SCMI Link: https://lore.kernel.org/r/20200512110357.GA26454@bogus Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2020-05-22soc: fsl: dpio: Remove unused inline function qbman_write_eqcr_am_rt_registerYueHaibing
There's no callers in-tree anymore since commit 3b2abda7d28c ("soc: fsl: dpio: Replace QMAN array mode with ring mode enqueue") Signed-off-by: YueHaibing <yuehaibing@huawei.com> Signed-off-by: Li Yang <leoyang.li@nxp.com>
2020-05-22soc: fsl: qe: clean up an indentation issueColin Ian King
There is a statement that not indented correctly, remove the extraneous space. Signed-off-by: Colin Ian King <colin.king@canonical.com> Signed-off-by: Li Yang <leoyang.li@nxp.com>
2020-05-22soc: fsl: dpio: Prefer the CPU affine DPIORoy Pledge
Use the cpu affine DPIO unless there isn't one which can happen if less DPIOs than cores are assign to the kernel. Signed-off-by: Roy Pledge <roy.pledge@nxp.com> Signed-off-by: Ioana Ciornei <ioana.ciornei@nxp.com> Signed-off-by: Li Yang <leoyang.li@nxp.com>
2020-05-22soc: fsl: qbman: Remove unused inline function qm_eqcr_get_ci_stashingYueHaibing
There's no callers in-tree anymore. Signed-off-by: YueHaibing <yuehaibing@huawei.com> Signed-off-by: Li Yang <leoyang.li@nxp.com>
2020-05-22soc: fsl: qe: Replace one-element array and use struct_size() helperGustavo A. R. Silva
The current codebase makes use of one-element arrays in the following form: struct something { int length; u8 data[1]; }; struct something *instance; instance = kmalloc(sizeof(*instance) + size, GFP_KERNEL); instance->length = size; memcpy(instance->data, source, size); but the preferred mechanism to declare variable-length types such as these ones is a flexible array member[1][2], introduced in C99: struct foo { int stuff; struct boo array[]; }; By making use of the mechanism above, we will get a compiler warning in case the flexible array does not occur last in the structure, which will help us prevent some kind of undefined behavior bugs from being inadvertently introduced[3] to the codebase from now on. So, replace the one-element array with a flexible-array member. Also, make use of the new struct_size() helper to properly calculate the size of struct qe_firmware. This issue was found with the help of Coccinelle and, audited and fixed _manually_. [1] https://gcc.gnu.org/onlinedocs/gcc/Zero-Length.html [2] https://github.com/KSPP/linux/issues/21 [3] commit 76497732932f ("cxgb3/l2t: Fix undefined behaviour") Signed-off-by: Gustavo A. R. Silva <gustavoars@kernel.org> Reviewed-by: Qiang Zhao <qiang.zhao@nxp.com> Signed-off-by: Li Yang <leoyang.li@nxp.com>
2020-05-22treewide: Replace zero-length array with flexible-arrayGustavo A. R. Silva
The current codebase makes use of the zero-length array language extension to the C90 standard, but the preferred mechanism to declare variable-length types such as these ones is a flexible array member[1][2], introduced in C99: struct foo { int stuff; struct boo array[]; }; By making use of the mechanism above, we will get a compiler warning in case the flexible array does not occur last in the structure, which will help us prevent some kind of undefined behavior bugs from being inadvertently introduced[3] to the codebase from now on. Also, notice that, dynamic memory allocations won't be affected by this change: "Flexible array members have incomplete type, and so the sizeof operator may not be applied. As a quirk of the original implementation of zero-length arrays, sizeof evaluates to zero."[1] sizeof(flexible-array-member) triggers a warning because flexible array members have incomplete type[1]. There are some instances of code in which the sizeof operator is being incorrectly/erroneously applied to zero-length arrays and the result is zero. Such instances may be hiding some bugs. So, this work (flexible-array member conversions) will also help to get completely rid of those sorts of issues. This issue was found with the help of Coccinelle. [1] https://gcc.gnu.org/onlinedocs/gcc/Zero-Length.html [2] https://github.com/KSPP/linux/issues/21 [3] commit 76497732932f ("cxgb3/l2t: Fix undefined behaviour") Signed-off-by: Gustavo A. R. Silva <gustavoars@kernel.org> Signed-off-by: Li Yang <leoyang.li@nxp.com>
2020-05-22firmware: tegra: Defer BPMP probe if shared memory not availableJon Hunter
Since commit 93d2e4322aa7 ("of: platform: Batch fwnode parsing when adding all top level devices") was added, the probing of the Tegra SRAM device has occurred later in the boot sequence, after the BPMP has been probed. The BPMP uses sections of the SRAM for shared memory and if the BPMP is probed before the SRAM then it fails to probe and never tries again. This is causing a boot failure on Tegra186 and Tegra194. Fix this by allowing the probe of the BPMP to be deferred if the SRAM is not available yet. Signed-off-by: Jon Hunter <jonathanh@nvidia.com> Signed-off-by: Thierry Reding <treding@nvidia.com>
2020-05-22soc/tegra: pmc: Enable PMIC wake event on Tegra210Jon Hunter
The PMIC wake event can be used to bring the system out of suspend based on certain events happening on the PMIC (such as an RTC alarm). Signed-off-by: Jon Hunter <jonathanh@nvidia.com> Signed-off-by: Thierry Reding <treding@nvidia.com>
2020-05-20clk/soc: mediatek: mt6779: Bind clock driver from platform deviceMatthias Brugger
The mmsys driver is now the top level entry point for the multimedia system (mmsys), we bind the clock driver by creating a platform device. We also bind the MediaTek DRM driver which is not yet implement and therefor will errror out for now. Signed-off-by: Matthias Brugger <matthias.bgg@gmail.com> Reviewed-by: Chun-Kuang Hu <chunkuang.hu@kernel.org> Acked-by: Stephen Boyd <sboyd@kernel.org> Link: https://lore.kernel.org/r/20200518113156.25009-3-matthias.bgg@kernel.org Signed-off-by: Matthias Brugger <matthias.bgg@gmail.com>
2020-05-20clk/soc: mediatek: mt6797: Bind clock driver from platform deviceMatthias Brugger
The mmsys driver is now the top level entry point for the multimedia system (mmsys), we bind the clock driver by creating a platform device. We also bind the MediaTek DRM driver which is not yet implement and therefor will errror out for now. Signed-off-by: Matthias Brugger <matthias.bgg@gmail.com> Reviewed-by: Chun-Kuang Hu <chunkuang.hu@kernel.org> Acked-by: Stephen Boyd <sboyd@kernel.org> Link: https://lore.kernel.org/r/20200518113156.25009-2-matthias.bgg@kernel.org Signed-off-by: Matthias Brugger <matthias.bgg@gmail.com>
2020-05-20clk/soc: mediatek: mt8183: Bind clock driver from platform deviceMatthias Brugger
The mmsys driver is now the top level entry point for the multimedia system (mmsys), we bind the clock driver by creating a platform device. We also bind the MediaTek DRM driver which is not yet implement and therefor will errror out for now. Signed-off-by: Matthias Brugger <matthias.bgg@gmail.com> Reviewed-by: Chun-Kuang Hu <chunkuang.hu@kernel.org> Acked-by: Stephen Boyd <sboyd@kernel.org> Link: https://lore.kernel.org/r/20200518113156.25009-1-matthias.bgg@kernel.org Signed-off-by: Matthias Brugger <matthias.bgg@gmail.com>
2020-05-20clk / soc: mediatek: Bind clock and gpu driver for mt2701Enric Balletbo i Serra
Now that the mmsys driver is the top-level entry point for the multimedia subsystem, we could bind the clock and the gpu driver on those devices that is expected to work, so the drm driver is intantiated by the mmsys driver and display, hopefully, working again. Signed-off-by: Enric Balletbo i Serra <enric.balletbo@collabora.com> Reviewed-by: Chun-Kuang Hu <chunkuang.hu@kernel.org> Acked-by: Stephen Boyd <sboyd@kernel.org> Link: https://lore.kernel.org/r/20200401201736.2980433-3-enric.balletbo@collabora.com Signed-off-by: Matthias Brugger <matthias.bgg@gmail.com>
2020-05-20clk / soc: mediatek: Bind clock and gpu driver for mt2712Enric Balletbo i Serra
Now that the mmsys driver is the top-level entry point for the multimedia subsystem, we could bind the clock and the gpu driver on those devices that is expected to work, so the drm driver is intantiated by the mmsys driver and display, hopefully, working again on those devices. Signed-off-by: Enric Balletbo i Serra <enric.balletbo@collabora.com> Reviewed-by: Chun-Kuang Hu <chunkuang.hu@kernel.org> Acked-by: Stephen Boyd <sboyd@kernel.org> Link: https://lore.kernel.org/r/20200401201736.2980433-2-enric.balletbo@collabora.com Signed-off-by: Matthias Brugger <matthias.bgg@gmail.com>
2020-05-20soc: mediatek: Enable mmsys driver by default if Mediatek arch is selectedEnric Balletbo i Serra
The mmsys driver supports only MT8173 device for now, but like other system controllers is an important piece for other Mediatek devices. Actually it depends on the mt8173 clock specific driver but that dependency is not real as it can build without the clock driver. Instead of depends on a specific model, make the driver depends on the generic ARCH_MEDIATEK and enable by default so other Mediatek devices can start using it without flood the Kconfig. Signed-off-by: Enric Balletbo i Serra <enric.balletbo@collabora.com> Tested-by: Hsin-Yi Wang <hsinyi@chromium.org> Link: https://lore.kernel.org/r/20200401201736.2980433-1-enric.balletbo@collabora.com Signed-off-by: Matthias Brugger <matthias.bgg@gmail.com>
2020-05-20firmware: imx: scu: Fix possible memory leak in imx_scu_probe()Wei Yongjun
'chan_name' is malloced in imx_scu_probe() and should be freed before leaving from the error handling cases, otherwise it will cause memory leak. Fixes: edbee095fafb ("firmware: imx: add SCU firmware driver support") Signed-off-by: Wei Yongjun <weiyongjun1@huawei.com> Reviewed-by: Dong Aisheng <aisheng.dong@nxp.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2020-05-19soc: amlogic: meson-ee-pwrc: add support for the Meson GX SoCsMartin Blumenstingl
Add support for the Meson GX SoCs to the meson-ee-pwrc driver. The power domains on the GX SoCs are very similar to G12A. The only known differences so far are: - The GX SoCs do not have the HHI_VPU_MEM_PD_REG2 register (for the VPU power-domain) - The GX SoCs have an additional reset line called "dvin" Signed-off-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com> Signed-off-by: Kevin Hilman <khilman@baylibre.com> Reviewed-by: Neil Armstrong <narmstrong@baylibre.com> Link: https://lore.kernel.org/r/20200515204709.1505498-5-martin.blumenstingl@googlemail.com
2020-05-19soc: amlogic: meson-ee-pwrc: add support for Meson8/Meson8b/Meson8m2Martin Blumenstingl
This adds support for the power domains on Meson8/Meson8b/Meson8m2. Meson8 doesn't use any reset lines while Meson8b and Meson8m2 use the same set of reset lines (which is different from the newer SoCs). Add dedicated compatible strings for Meson8, Meson8b and Meson8m2 to support these differences. Notable differences between Meson8 and G12A are: - there is no HHI_VPU_MEM_PD_REG2 on the 32-bit SoCs - the Meson8b datasheet describes an "audio DSP memory" power domain which is used for the hardware audio decoder - the "amlogic,ao-sysctrl" only includes the power management related registers on the 32-bit SoCs, meaning the for example the AO_RTI_GEN_PWR_SLEEP0 register is at offset (0x2 << 2) rather than (0x3a << 2). As result of this (0x38 << 2) is subtracted from the register offsets, which is the start of the power management related registers. Signed-off-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com> Signed-off-by: Kevin Hilman <khilman@baylibre.com> Link: https://lore.kernel.org/r/20200515204709.1505498-4-martin.blumenstingl@googlemail.com
2020-05-19dt-bindings: power: meson-ee-pwrc: add support for the Meson GX SoCsMartin Blumenstingl
The power domains on the GX SoCs are very similar to G12A. The only known differences so far are: - The GX SoCs do not have the HHI_VPU_MEM_PD_REG2 register (for the VPU power-domain) - The GX SoCs have an additional reset line called "dvin" Add a new compatible string and adjust the reset line expectations for these SoCs. Signed-off-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com> Signed-off-by: Kevin Hilman <khilman@baylibre.com> Reviewed-by: Rob Herring <robh@kernel.org> Link: https://lore.kernel.org/r/20200515204709.1505498-3-martin.blumenstingl@googlemail.com
2020-05-19dt-bindings: power: meson-ee-pwrc: add support for Meson8/8b/8m2Martin Blumenstingl
The power domains on the 32-bit Meson8/Meson8b/Meson8m2 SoCs are very similar to what G12A still uses. The (known) differences are: - Meson8 doesn't use any reset lines at all - Meson8b and Meson8m2 use the same reset lines, which are different from what the 64-bit SoCs use - there is no "vapb" clock on the older SoCs - amlogic,ao-sysctrl cannot point to the whole AO sysctrl region but only the power management related registers Add a new compatible string and adjust clock and reset line expectations for each SoC. Signed-off-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com> Signed-off-by: Kevin Hilman <khilman@baylibre.com> Reviewed-by: Rob Herring <robh@kernel.org> Link: https://lore.kernel.org/r/20200515204709.1505498-2-martin.blumenstingl@googlemail.com
2020-05-17Revert "soc: qcom: rpmh: Allow RPMH driver to be loaded as a module"Bjorn Andersson
Attempting to compile rpmh-rsc.c as a module with TRACING enabled causes a build error as no _rcuidle function is generated for tracepoints when CONFIG_MODULE is set. Attempts has been made, but no resolution has been agreed upon, so lets revert this commit for now. This reverts commit 1d3c6f86fd3f8b88c707f56d8c3f94e014b40e83. Reported-by: Stephen Rothwell <sfr@canb.auug.org.au> Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
2020-05-15soc: qcom: rpmh-rsc: Remove the pm_lockDouglas Anderson
It has been postulated that the pm_lock is bad for performance because a CPU currently running rpmh_flush() could block other CPUs from coming out of idle. Similarly CPUs coming out of / going into idle all need to contend with each other for the spinlock just to update the variable tracking who's in PM. Let's optimize this a bit. Specifically: - Use a count rather than a bitmask. This is faster to access and also means we can use the atomic_inc_return() function to really detect who the last one to enter PM was. - Accept that it's OK if we race and are doing the flush (because we think we're last) while another CPU is coming out of idle. As long as we block that CPU if/when it tries to do an active-only transfer we're OK. Signed-off-by: Douglas Anderson <dianders@chromium.org> Reviewed-by: Stephen Boyd <swboyd@chromium.org> Link: https://lore.kernel.org/r/20200504104917.v6.5.I295cb72bc5334a2af80313cbe97cb5c9dcb1442c@changeid Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
2020-05-15soc: qcom: rpmh-rsc: Simplify locking by eliminating the per-TCS lockDouglas Anderson
The rpmh-rsc code had both a driver-level lock (sometimes referred to in comments as drv->lock) and a lock per-TCS. The idea was supposed to be that there would be times where you could get by with just locking a TCS lock and therefor other RPMH users wouldn't be blocked. The above didn't work out so well. Looking at tcs_write() the bigger drv->lock was held for most of the function anyway. Only the __tcs_buffer_write() and __tcs_set_trigger() calls were called without holding the drv->lock. It actually turns out that in tcs_write() we don't need to hold the drv->lock for those function calls anyway even if the per-TCS lock isn't there anymore. From the newly added comments in the code, this is because: - We marked "tcs_in_use" under lock. - Once "tcs_in_use" has been marked nobody else could be writing to these registers until the interrupt goes off. - The interrupt can't go off until we trigger w/ the last line of __tcs_set_trigger(). Thus, from a tcs_write() point of view, the per-TCS lock was useless. Looking at rpmh_rsc_write_ctrl_data(), only the per-TCS lock was held. It turns out, though, that this function already needs to be called with the equivalent of the drv->lock held anyway (we either need to hold drv->lock as we will in a future patch or we need to know no other CPUs could be running as happens today). Specifically rpmh_rsc_write_ctrl_data() might be writing to a TCS that has been borrowed for writing an active transation but it never checks this. Let's eliminate this extra overhead and avoid possible AB BA locking headaches. Suggested-by: Maulik Shah <mkshah@codeaurora.org> Signed-off-by: Douglas Anderson <dianders@chromium.org> Reviewed-by: Stephen Boyd <swboyd@chromium.org> Link: https://lore.kernel.org/r/20200504104917.v6.4.Ib8dccfdb10bf6b1fb1d600ca1c21d9c0db1ef746@changeid Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
2020-05-15kernel/cpu_pm: Fix uninitted local in cpu_pmDouglas Anderson
cpu_pm_notify() is basically a wrapper of notifier_call_chain(). notifier_call_chain() doesn't initialize *nr_calls to 0 before it starts incrementing it--presumably it's up to the callers to do this. Unfortunately the callers of cpu_pm_notify() don't init *nr_calls. This potentially means you could get too many or two few calls to CPU_PM_ENTER_FAILED or CPU_CLUSTER_PM_ENTER_FAILED depending on the luck of the stack. Let's fix this. Fixes: ab10023e0088 ("cpu_pm: Add cpu power management notifiers") Cc: stable@vger.kernel.org Cc: Rafael J. Wysocki <rafael.j.wysocki@intel.com> Reviewed-by: Stephen Boyd <swboyd@chromium.org> Reviewed-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org> Signed-off-by: Douglas Anderson <dianders@chromium.org> Link: https://lore.kernel.org/r/20200504104917.v6.3.I2d44fc0053d019f239527a4e5829416714b7e299@changeid Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>