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2025-05-16rcutorture: Perform more frequent testing of ->gpwrapJoel Fernandes
Currently, the ->gpwrap is not tested (at all per my testing) due to the requirement of a large delta between a CPU's rdp->gp_seq and its node's rnp->gpseq. This results in no testing of ->gpwrap being set. This patch by default adds 5 minutes of testing with ->gpwrap forced by lowering the delta between rdp->gp_seq and rnp->gp_seq to just 8 GPs. All of this is configurable, including the active time for the setting and a full testing cycle. By default, the first 25 minutes of a test will have the _default_ behavior there is right now (ULONG_MAX / 4) delta. Then for 5 minutes, we switch to a smaller delta causing 1-2 wraps in 5 minutes. I believe this is reasonable since we at least add a little bit of testing for usecases where ->gpwrap is set. [ Apply fix for Dan Carpenter's bug report on init path cleanup. ] [ Apply kernel doc warning fix from Akira Yokosawa. ] Tested-by: Paul E. McKenney <paulmck@kernel.org> Signed-off-by: Joel Fernandes <joelagnelf@nvidia.com>
2025-05-16torture: Add testing of RCU's Rust bindings to torture.shPaul E. McKenney
This commit adds a --do-rcu-rust parameter to torture.sh, which invokes a rust_doctests_kernel kunit run. Note that kunit wants a clean source tree, so this runs "make mrproper", which might come as a surprise to some users. Should there be a --mrproper parameter to torture.sh to make the user explicitly ask for it? Co-developed-by: Boqun Feng <boqun.feng@gmail.com> Signed-off-by: Boqun Feng <boqun.feng@gmail.com> Signed-off-by: Paul E. McKenney <paulmck@kernel.org> Signed-off-by: Joel Fernandes <joelagnelf@nvidia.com>
2025-05-16torture: Add --do-{,no-}normal to torture.shPaul E. McKenney
Right now, torture.sh runs normal runs unconditionally, which can be slow and thus annoying when you only want to test --kcsan or --kasan runs. This commit therefore adds a --do-normal argument so that "--kcsan --do-no-kasan --do-no-normal" runs only KCSAN runs. Note that specifying "--do-no-kasan --do-no-kcsan --do-no-normal" gets normal runs, so you should not try to use this as a synonym for --do-none. Signed-off-by: Paul E. McKenney <paulmck@kernel.org> Signed-off-by: Joel Fernandes <joelagnelf@nvidia.com>
2025-05-16checkpatch: Deprecate srcu_read_lock_lite() and srcu_read_unlock_lite()Paul E. McKenney
Uses of srcu_read_lock_lite() and srcu_read_unlock_lite() are better served by the new srcu_read_lock_fast() and srcu_read_unlock_fast() APIs. As in srcu_read_lock_lite() and srcu_read_unlock_lite() would never have happened had I thought a bit harder a few months ago. Therefore, mark them deprecated. Signed-off-by: Paul E. McKenney <paulmck@kernel.org> Signed-off-by: Joel Fernandes <joelagnelf@nvidia.com>
2025-05-16rcutorture: Comment invocations of tick_dep_set_task()Paul E. McKenney
The rcu_torture_reader() and rcu_torture_fwd_prog_cr() functions run CPU-bound for extended periods of time (tens or even hundreds of milliseconds), so they invoke tick_dep_set_task() and tick_dep_clear_task() to ensure that the scheduling-clock tick helps move grace periods forward. So why doesn't rcu_torture_fwd_prog_nr() also invoke tick_dep_set_task() and tick_dep_clear_task()? Because the point of this function is to test RCU's ability to (eventually) force grace periods forward even when the tick has been disabled during long CPU-bound kernel execution. Signed-off-by: Paul E. McKenney <paulmck@kernel.org> Signed-off-by: Joel Fernandes <joelagnelf@nvidia.com>
2025-05-16blk-mq: add a copyright notice to blk-mq-dma.cChristoph Hellwig
blk-mq-dma.c was split from blk-merge.c which has no copyright notice, but except for some boilerplate code and comments left from the old version this is all my code, so add my copyright. Signed-off-by: Christoph Hellwig <hch@lst.de> Link: https://lore.kernel.org/r/20250513071433.836797-2-hch@lst.de Signed-off-by: Jens Axboe <axboe@kernel.dk>
2025-05-16blk-mq: move the DMA mapping code to a separate fileChristoph Hellwig
While working on the new DMA API I kept getting annoyed how it was placed right in the middle of the bio splitting code in blk-merge.c. Split it out into a separate file. Signed-off-by: Christoph Hellwig <hch@lst.de> Link: https://lore.kernel.org/r/20250513071433.836797-1-hch@lst.de Signed-off-by: Jens Axboe <axboe@kernel.dk>
2025-05-16rcu/nocb: Add Safe checks for access offloaded rdpZqiang
For built with CONFIG_PROVE_RCU=y and CONFIG_PREEMPT_RT=y kernels, Disable BH does not change the SOFTIRQ corresponding bits in preempt_count(), but change current->softirq_disable_cnt, this resulted in the following splat: WARNING: suspicious RCU usage kernel/rcu/tree_plugin.h:36 Unsafe read of RCU_NOCB offloaded state! stack backtrace: CPU: 0 UID: 0 PID: 22 Comm: rcuc/0 Call Trace: [ 0.407907] <TASK> [ 0.407910] dump_stack_lvl+0xbb/0xd0 [ 0.407917] dump_stack+0x14/0x20 [ 0.407920] lockdep_rcu_suspicious+0x133/0x210 [ 0.407932] rcu_rdp_is_offloaded+0x1c3/0x270 [ 0.407939] rcu_core+0x471/0x900 [ 0.407942] ? lockdep_hardirqs_on+0xd5/0x160 [ 0.407954] rcu_cpu_kthread+0x25f/0x870 [ 0.407959] ? __pfx_rcu_cpu_kthread+0x10/0x10 [ 0.407966] smpboot_thread_fn+0x34c/0xa50 [ 0.407970] ? trace_preempt_on+0x54/0x120 [ 0.407977] ? __pfx_smpboot_thread_fn+0x10/0x10 [ 0.407982] kthread+0x40e/0x840 [ 0.407990] ? __pfx_kthread+0x10/0x10 [ 0.407994] ? rt_spin_unlock+0x4e/0xb0 [ 0.407997] ? rt_spin_unlock+0x4e/0xb0 [ 0.408000] ? __pfx_kthread+0x10/0x10 [ 0.408006] ? __pfx_kthread+0x10/0x10 [ 0.408011] ret_from_fork+0x40/0x70 [ 0.408013] ? __pfx_kthread+0x10/0x10 [ 0.408018] ret_from_fork_asm+0x1a/0x30 [ 0.408042] </TASK> Currently, triggering an rdp offloaded state change need the corresponding rdp's CPU goes offline, and at this time the rcuc kthreads has already in parking state. this means the corresponding rcuc kthreads can safely read offloaded state of rdp while it's corresponding cpu is online. This commit therefore add softirq_count() check for Preempt-RT kernels. Suggested-by: Joel Fernandes <joelagnelf@nvidia.com> Reviewed-by: Frederic Weisbecker <frederic@kernel.org> Signed-off-by: Zqiang <qiang.zhang1211@gmail.com> Signed-off-by: Joel Fernandes <joelagnelf@nvidia.com>
2025-05-16rcuscale: using kcalloc() to relpace kmalloc()Su Hui
It's safer to using kcalloc() because it can prevent overflow problem. Reviewed-by: Paul E. McKenney <paulmck@kernel.org> Signed-off-by: Su Hui <suhui@nfschina.com> Signed-off-by: Joel Fernandes <joelagnelf@nvidia.com>
2025-05-16doc/RCU/listRCU: refine example code for eliminating stale dataWei Yang
This patch adjust the example code with following two purpose: * reduce the confusion on not releasing e->lock * emphasize e is valid and not stale with e->lock held Signed-off-by: Wei Yang <richard.weiyang@gmail.com> CC: Boqun Feng <boqun.feng@gmail.com> CC: Alan Huang <mmpgouride@gmail.com> Reviewed-by: Alan Huang <mmpgouride@gmail.com> Link: https://lore.kernel.org/r/20250218005047.27258-1-richard.weiyang@gmail.com Signed-off-by: Boqun Feng <boqun.feng@gmail.com> Signed-off-by: Joel Fernandes <joelagnelf@nvidia.com>
2025-05-16doc: Update LWN RCU API links in whatisRCU.rstPaul E. McKenney
This commit adds the 2024 LWN RCU API article set. Signed-off-by: Paul E. McKenney <paulmck@kernel.org> Signed-off-by: Joel Fernandes <joelagnelf@nvidia.com>
2025-05-16Revert "rcu/nocb: Fix rcuog wake-up from offline softirq"Frederic Weisbecker
This reverts commit f7345ccc62a4b880cf76458db5f320725f28e400. swake_up_one_online() has been removed because hrtimers can now assign a proper online target to hrtimers queued from offline CPUs. Therefore remove the related hackery. Link: https://lore.kernel.org/all/20241231170712.149394-4-frederic@kernel.org/ Reviewed-by: Usama Arif <usamaarif642@gmail.com> Reviewed-by: Joel Fernandes <joelagnelf@nvidia.com> Signed-off-by: Frederic Weisbecker <frederic@kernel.org> Signed-off-by: Joel Fernandes <joelagnelf@nvidia.com>
2025-05-16rust: sync: rcu: Mark Guard methods as inlineI Hsin Cheng
Currently the implementation of "Guard" methods are basically wrappers around rcu's function within kernel. Building the kernel with llvm 18.1.8 on x86_64 machine will generate the following symbols: $ nm vmlinux | grep ' _R'.*Guard | rustfilt ffffffff817b6c90 T <kernel::sync::rcu::Guard>::new ffffffff817b6cb0 T <kernel::sync::rcu::Guard>::unlock ffffffff817b6cd0 T <kernel::sync::rcu::Guard as core::ops::drop::Drop>::drop ffffffff817b6c90 T <kernel::sync::rcu::Guard as core::default::Default>::default These Rust symbols are basically wrappers around functions "rcu_read_lock" and "rcu_read_unlock". Marking them as inline can reduce the generation of these symbols, and saves the size of code generation for 132 bytes. $ ./scripts/bloat-o-meter vmlinux_old vmlinux_new (Output is demangled for readability) add/remove: 0/10 grow/shrink: 0/1 up/down: 0/-132 (-132) Function old new delta rust_driver_pci::SampleDriver::probe 1041 1034 -7 kernel::sync::rcu::Guard::default 9 - -9 kernel::sync::rcu::Guard::drop 9 - -9 kernel::sync::rcu::read_lock 9 - -9 kernel::sync::rcu::Guard::unlock 9 - -9 kernel::sync::rcu::Guard::new 9 - -9 __pfx__kernel::sync::rcu::Guard::default 16 - -16 __pfx__kernel::sync::rcu::Guard::drop 16 - -16 __pfx__kernel::sync::rcu::read_lock 16 - -16 __pfx__kernel::sync::rcu::Guard::unlock 16 - -16 __pfx__kernel::sync::rcu::Guard::new 16 - -16 Total: Before=23365955, After=23365823, chg -0.00% Link: https://github.com/Rust-for-Linux/linux/issues/1145 Signed-off-by: I Hsin Cheng <richard120310@gmail.com> Reviewed-by: Joel Fernandes <joelagnelf@nvidia.com> Reviewed-by: Benno Lossin <benno.lossin@proton.me> Reviewed-by: Charalampos Mitrodimas <charmitro@posteo.net> Acked-by: Miguel Ojeda <ojeda@kernel.org> Signed-off-by: Joel Fernandes <joelagnelf@nvidia.com>
2025-05-16rcu/cpu_stall_cputime: fix the hardirq count for x86 architectureYongliang Gao
When counting the number of hardirqs in the x86 architecture, it is essential to add arch_irq_stat_cpu to ensure accuracy. For example, a CPU loop within the rcu_read_lock function. Before: [ 70.910184] rcu: INFO: rcu_preempt self-detected stall on CPU [ 70.910436] rcu: 3-....: (4999 ticks this GP) idle=*** [ 70.910711] rcu: hardirqs softirqs csw/system [ 70.910870] rcu: number: 0 657 0 [ 70.911024] rcu: cputime: 0 0 2498 ==> 2498(ms) [ 70.911278] rcu: (t=5001 jiffies g=3677 q=29 ncpus=8) After: [ 68.046132] rcu: INFO: rcu_preempt self-detected stall on CPU [ 68.046354] rcu: 2-....: (4999 ticks this GP) idle=*** [ 68.046628] rcu: hardirqs softirqs csw/system [ 68.046793] rcu: number: 2498 663 0 [ 68.046951] rcu: cputime: 0 0 2496 ==> 2496(ms) [ 68.047244] rcu: (t=5000 jiffies g=3825 q=4 ncpus=8) Fixes: be42f00b73a0 ("rcu: Add RCU stall diagnosis information") Reported-by: kernel test robot <lkp@intel.com> Closes: https://lore.kernel.org/oe-kbuild-all/202501090842.SfI6QPGS-lkp@intel.com/ Signed-off-by: Yongliang Gao <leonylgao@tencent.com> Reviewed-by: Neeraj Upadhyay <Neeraj.Upadhyay@amd.com> Link: https://lore.kernel.org/r/20250216084109.3109837-1-leonylgao@gmail.com Signed-off-by: Boqun Feng <boqun.feng@gmail.com> Signed-off-by: Joel Fernandes <joelagnelf@nvidia.com>
2025-05-16rcu: Remove swake_up_one_online() bandaidFrederic Weisbecker
It's now ok to perform a wake-up from an offline CPU because the resulting armed scheduler bandwidth hrtimers are now correctly targeted by hrtimer infrastructure. Remove the obsolete hackerry. Link: https://lore.kernel.org/all/20241231170712.149394-3-frederic@kernel.org/ Reviewed-by: Usama Arif <usamaarif642@gmail.com> Reviewed-by: Joel Fernandes <joelagnelf@nvidia.com> Signed-off-by: Frederic Weisbecker <frederic@kernel.org> Signed-off-by: Joel Fernandes <joelagnelf@nvidia.com>
2025-05-16MAINTAINERS: Update Zqiang's email addressZqiang
This patch updates Zqiang's email address to qiang.zhang@linux.dev. Signed-off-by: Zqiang <qiang.zhang1211@gmail.com> Acked-by: Joel Fernandes <joelagnelf@nvidia.com> Signed-off-by: Joel Fernandes <joelagnelf@nvidia.com>
2025-05-16Merge tag 'asoc-fix-v6.15-rc6' of ↵Takashi Iwai
https://git.kernel.org/pub/scm/linux/kernel/git/broonie/sound into for-linus ASoC: Fixes for v6.15 A collection of driver specific fixes that built up over the past few weeks, plus one core patch which fixes handling of topology files where some DAI names are substrings of others.
2025-05-16MAINTAINERS: Add reviewers for fs/resctrlJames Morse
resctrl has existed for quite a while as a filesystem interface private to arch/x86. To allow other architectures to support the same user interface for similar hardware features, it has been moved to /fs/. Add those with a vested interest in the common code as reviewers. Signed-off-by: James Morse <james.morse@arm.com> Signed-off-by: Borislav Petkov (AMD) <bp@alien8.de> Acked-by: Reinette Chatre <reinette.chatre@intel.com> Acked-by: Dave Martin <Dave.Martin@arm.com> Tested-by: Fenghua Yu <fenghuay@nvidia.com> Tested-by: Tony Luck <tony.luck@intel.com> Link: https://lore.kernel.org/20250515165855.31452-26-james.morse@arm.com
2025-05-16x86,fs/resctrl: Move the resctrl filesystem code to live in /fs/resctrlJames Morse
Resctrl is a filesystem interface to hardware that provides cache allocation policy and bandwidth control for groups of tasks or CPUs. To support more than one architecture, resctrl needs to live in /fs/. Move the code that is concerned with the filesystem interface to /fs/resctrl. Signed-off-by: James Morse <james.morse@arm.com> Signed-off-by: Borislav Petkov (AMD) <bp@alien8.de> Reviewed-by: Reinette Chatre <reinette.chatre@intel.com> Reviewed-by: Fenghua Yu <fenghuay@nvidia.com> Tested-by: Fenghua Yu <fenghuay@nvidia.com> Tested-by: Tony Luck <tony.luck@intel.com> Link: https://lore.kernel.org/20250515165855.31452-25-james.morse@arm.com
2025-05-16x86/resctrl: Always initialise rid field in rdt_resources_all[]James Morse
x86 has an array, rdt_resources_all[], of all possible resources. The for-each-resource walkers depend on the rid field of all resources being initialised. If the array ever grows due to another architecture adding a resource type that is not defined on x86, the for-each-resources walkers will loop forever. Initialise all the rid values in resctrl_arch_late_init() before any for-each-resource walker can be called. Signed-off-by: James Morse <james.morse@arm.com> Signed-off-by: Borislav Petkov (AMD) <bp@alien8.de> Reviewed-by: Reinette Chatre <reinette.chatre@intel.com> Reviewed-by: Fenghua Yu <fenghuay@nvidia.com> Tested-by: Fenghua Yu <fenghuay@nvidia.com> Tested-by: Babu Moger <babu.moger@amd.com> Tested-by: Shaopeng Tan <tan.shaopeng@jp.fujitsu.com> Tested-by: Tony Luck <tony.luck@intel.com> Link: https://lore.kernel.org/20250515165855.31452-24-james.morse@arm.com
2025-05-16x86/resctrl: Relax some asm #includesDave Martin
checkpatch.pl identifies some direct #includes of asm headers that can be satisfied by including the corresponding <linux/...> header instead. Fix them. No intentional functional change. Signed-off-by: Dave Martin <Dave.Martin@arm.com> Signed-off-by: James Morse <james.morse@arm.com> Signed-off-by: Borislav Petkov (AMD) <bp@alien8.de> Reviewed-by: Reinette Chatre <reinette.chatre@intel.com> Reviewed-by: Fenghua Yu <fenghuay@nvidia.com> Tested-by: Fenghua Yu <fenghuay@nvidia.com> Tested-by: Peter Newman <peternewman@google.com> Tested-by: Shaopeng Tan <tan.shaopeng@jp.fujitsu.com> Tested-by: Amit Singh Tomar <amitsinght@marvell.com> # arm64 Tested-by: Shanker Donthineni <sdonthineni@nvidia.com> # arm64 Tested-by: Babu Moger <babu.moger@amd.com> Tested-by: Tony Luck <tony.luck@intel.com> Link: https://lore.kernel.org/20250515165855.31452-23-james.morse@arm.com
2025-05-16x86/resctrl: Prefer alloc(sizeof(*foo)) idiom in rdt_init_fs_context()Dave Martin
rdt_init_fs_context() sizes a typed allocation using an explicit sizeof(type) expression, which checkpatch.pl complains about. Since this code is about to be factored out and made generic, this is a good opportunity to fix the code to size the allocation based on the target pointer instead, to reduce the chance of future mis- maintenance. Fix it. No functional change. Signed-off-by: Dave Martin <Dave.Martin@arm.com> Signed-off-by: James Morse <james.morse@arm.com> Signed-off-by: Borislav Petkov (AMD) <bp@alien8.de> Reviewed-by: Fenghua Yu <fenghuay@nvidia.com> Reviewed-by: Reinette Chatre <reinette.chatre@intel.com> Tested-by: Fenghua Yu <fenghuay@nvidia.com> Tested-by: Peter Newman <peternewman@google.com> Tested-by: Shaopeng Tan <tan.shaopeng@jp.fujitsu.com> Tested-by: Amit Singh Tomar <amitsinght@marvell.com> # arm64 Tested-by: Shanker Donthineni <sdonthineni@nvidia.com> # arm64 Tested-by: Babu Moger <babu.moger@amd.com> Tested-by: Tony Luck <tony.luck@intel.com> Link: https://lore.kernel.org/20250515165855.31452-22-james.morse@arm.com
2025-05-16x86/resctrl: Squelch whitespace anomalies in resctrl core codeDave Martin
checkpatch.pl complains about some whitespace anomalies in the resctrl core code. This doesn't matter, but since this code is about to be factored out and made generic, this is a good opportunity to fix these issues and so reduce future checkpatch fuzz. Fix them. No functional change. Signed-off-by: Dave Martin <Dave.Martin@arm.com> Signed-off-by: James Morse <james.morse@arm.com> Signed-off-by: Borislav Petkov (AMD) <bp@alien8.de> Reviewed-by: Fenghua Yu <fenghuay@nvidia.com> Reviewed-by: Reinette Chatre <reinette.chatre@intel.com> Tested-by: Fenghua Yu <fenghuay@nvidia.com> Tested-by: Peter Newman <peternewman@google.com> Tested-by: Shaopeng Tan <tan.shaopeng@jp.fujitsu.com> Tested-by: Amit Singh Tomar <amitsinght@marvell.com> # arm64 Tested-by: Shanker Donthineni <sdonthineni@nvidia.com> # arm64 Tested-by: Babu Moger <babu.moger@amd.com> Tested-by: Tony Luck <tony.luck@intel.com> Link: https://lore.kernel.org/20250515165855.31452-21-james.morse@arm.com
2025-05-16clocksource/drivers/renesas-ostm: Unconditionally enable reprobe supportLad Prabhakar
Previously, the OSTM driver's platform probe path was only enabled for selected SoCs (e.g., RZ/G2L and RZ/V2H) due to issues on RZ/Ax (ARM32) SoCs, which encountered IRQ conflicts like: /soc/timer@e803b000: used for clock events genirq: Flags mismatch irq 16. 00215201 (timer@e803c000) vs. 00215201 (timer@e803c000) Failed to request irq 16 for /soc/timer@e803c000 renesas_ostm e803c000.timer: probe with driver renesas_ostm failed with error -16 These issues have since been resolved by commit 37385c0772a4 ("clocksource/drivers/renesas-ostm: Avoid reprobe after successful early probe"), which prevents reprobe on successfully initialized early timers. With this fix in place, there is no longer a need to restrict platform probing based on SoC-specific configs. This change unconditionally enables reprobe support for all SoCs, simplifying the logic and avoiding the need to update the configuration for every new Renesas SoC with OSTM. Additionally, the `ostm_of_table` is now marked with `__maybe_unused` to fix a build warning when `CONFIG_OF` is disabled. RZ/A1 and RZ/A2 remain unaffected with this change. Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com> Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be> Tested-by: Geert Uytterhoeven <geert+renesas@glider.be> Link: https://lore.kernel.org/r/20250515182207.329176-3-prabhakar.mahadev-lad.rj@bp.renesas.com Signed-off-by: Daniel Lezcano <daniel.lezcano@linaro.org>
2025-05-16dt-bindings: timer: renesas,ostm: Document RZ/V2N (R9A09G056) supportLad Prabhakar
Document support for the Renesas OS Timer (OSTM) found on the Renesas RZ/V2N (R9A09G056) SoC. The OSTM IP on RZ/V2N is identical to that on other RZ families, so no driver changes are required as `renesas,ostm` will be used as fallback compatible. Also update the bindings to require the "resets" property for RZ/V2N by inverting the logic: all SoCs except RZ/A1 and RZ/A2 now require the "resets" property. Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com> Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be> Acked-by: Conor Dooley <conor.dooley@microchip.com> Link: https://lore.kernel.org/r/20250515182207.329176-2-prabhakar.mahadev-lad.rj@bp.renesas.com Signed-off-by: Daniel Lezcano <daniel.lezcano@linaro.org>
2025-05-16x86/resctrl: Move pseudo lock prototypes to include/linux/resctrl.hJames Morse
The resctrl pseudo-lock feature allows an architecture to allocate data into particular cache portions, which are then treated as reserved to avoid that data ever being evicted. Setting this up is deeply architecture specific as it involves disabling prefetchers etc. It is not possible to support this kind of feature on arm64. Risc-V is assumed to be the same. The prototypes for the architecture code were added to x86's asm/resctrl.h, with other architectures able to provide stubs for their architecture. This forces other architectures to provide identical stubs. Move the prototypes and stubs to linux/resctrl.h, and switch between them using the existing Kconfig symbol. Signed-off-by: James Morse <james.morse@arm.com> Signed-off-by: Borislav Petkov (AMD) <bp@alien8.de> Reviewed-by: Reinette Chatre <reinette.chatre@intel.com> Reviewed-by: Fenghua Yu <fenghuay@nvidia.com> Tested-by: Fenghua Yu <fenghuay@nvidia.com> Tested-by: Babu Moger <babu.moger@amd.com> Tested-by: Shaopeng Tan <tan.shaopeng@jp.fujitsu.com> Tested-by: Tony Luck <tony.luck@intel.com> Link: https://lore.kernel.org/20250515165855.31452-20-james.morse@arm.com
2025-05-16x86/resctrl: Fix types in resctrl_arch_mon_ctx_{alloc,free}() stubsJames Morse
resctrl_arch_mon_ctx_alloc() and resctrl_arch_mon_ctx_free() take an enum resctrl_event_id that is already defined in resctrl_types.h to be accessible to asm/resctrl.h. The x86 stubs take an int. Fix that. Signed-off-by: James Morse <james.morse@arm.com> Signed-off-by: Borislav Petkov (AMD) <bp@alien8.de> Reviewed-by: Reinette Chatre <reinette.chatre@intel.com> Reviewed-by: Fenghua Yu <fenghuay@nvidia.com> Tested-by: Fenghua Yu <fenghuay@nvidia.com> Tested-by: Babu Moger <babu.moger@amd.com> Tested-by: Shaopeng Tan <tan.shaopeng@jp.fujitsu.com> Tested-by: Tony Luck <tony.luck@intel.com> Link: https://lore.kernel.org/20250515165855.31452-19-james.morse@arm.com
2025-05-16x86/resctrl: Move enum resctrl_event_id to resctrl.hJames Morse
resctrl_types.h contains common types and constants to enable architectures to use these types in their definitions within asm/resctrl.h. enum resctrl_event_id was placed in resctrl_types.h for resctrl_arch_get_cdp_enabled() and resctrl_arch_set_cdp_enabled(), but these two functions are no longer inlined by any architecture. Move enum resctrl_event_id to resctrl.h. Signed-off-by: James Morse <james.morse@arm.com> Signed-off-by: Borislav Petkov (AMD) <bp@alien8.de> Reviewed-by: Reinette Chatre <reinette.chatre@intel.com> Reviewed-by: Fenghua Yu <fenghuay@nvidia.com> Tested-by: Fenghua Yu <fenghuay@nvidia.com> Tested-by: Babu Moger <babu.moger@amd.com> Tested-by: Shaopeng Tan <tan.shaopeng@jp.fujitsu.com> Tested-by: Tony Luck <tony.luck@intel.com> Link: https://lore.kernel.org/20250515165855.31452-18-james.morse@arm.com
2025-05-16x86/resctrl: Move the filesystem bits to headers visible to fs/resctrlJames Morse
Once the filesystem parts of resctrl move to fs/resctrl, it cannot rely on definitions in x86's internal.h. Move definitions in internal.h that need to be shared between the filesystem and architecture code to header files that fs/resctrl can include. Doing this separately means the filesystem code only moves between files of the same name, instead of having these changes mixed in too. Co-developed-by: Dave Martin <Dave.Martin@arm.com> Signed-off-by: Dave Martin <Dave.Martin@arm.com> Signed-off-by: James Morse <james.morse@arm.com> Signed-off-by: Borislav Petkov (AMD) <bp@alien8.de> Reviewed-by: Shaopeng Tan <tan.shaopeng@jp.fujitsu.com> Reviewed-by: Tony Luck <tony.luck@intel.com> Reviewed-by: Fenghua Yu <fenghuay@nvidia.com> Reviewed-by: Reinette Chatre <reinette.chatre@intel.com> Tested-by: Fenghua Yu <fenghuay@nvidia.com> Tested-by: Carl Worth <carl@os.amperecomputing.com> # arm64 Tested-by: Shaopeng Tan <tan.shaopeng@jp.fujitsu.com> Tested-by: Peter Newman <peternewman@google.com> Tested-by: Amit Singh Tomar <amitsinght@marvell.com> # arm64 Tested-by: Shanker Donthineni <sdonthineni@nvidia.com> # arm64 Tested-by: Babu Moger <babu.moger@amd.com> Tested-by: Tony Luck <tony.luck@intel.com> Link: https://lore.kernel.org/20250515165855.31452-17-james.morse@arm.com
2025-05-16ALSA: hda/realtek - restore auto-mute mode for Dell Chrome platformKailang Yang
This board need to shutdown Class-D amp to avoid EMI issue. Restore the Auto-Mute mode item will off pin control when Auto-mute mode was enable. Signed-off-by: Kailang Yang <kailang@realtek.com> Links: https://lore.kernel.org/ee8bbe5236464c369719d96269ba8ef8@realtek.com Signed-off-by: Takashi Iwai <tiwai@suse.de>
2025-05-16x86/mm: Remove duplicated word in warning messageLukas Bulwahn
Commit bbeb69ce3013 ("x86/mm: Remove CONFIG_HIGHMEM64G support") introduces a new warning message MSG_HIGHMEM_TRIMMED, which accidentally introduces a duplicated 'for for' in the warning message. Remove this duplicated word. This was noticed while reviewing for references to obsolete kernel build config options. Fixes: bbeb69ce3013 ("x86/mm: Remove CONFIG_HIGHMEM64G support") Signed-off-by: Lukas Bulwahn <lukas.bulwahn@redhat.com> Signed-off-by: Ingo Molnar <mingo@kernel.org> Cc: Andy Lutomirski <luto@kernel.org> Cc: Arnd Bergmann <arnd@arndb.de> Cc: Dave Hansen <dave.hansen@linux.intel.com> Cc: H. Peter Anvin <hpa@zytor.com> Cc: Peter Zijlstra <peterz@infradead.org> Cc: kernel-janitors@vger.kernel.org Link: https://lore.kernel.org/r/20250516090810.556623-1-lukas.bulwahn@redhat.com
2025-05-16dt-bindings: timer: Convert marvell,armada-370-timer to DT schemaRob Herring (Arm)
Convert the Marvell Armada 37x/380/XP Timer binding to DT schema format. Update the compatible entries to match what is in use. "marvell,armada-380-timer" in particular was missing. Signed-off-by: Rob Herring (Arm) <robh@kernel.org> Reviewed-by: Andrew Lunn <andrew@lunn.ch> Link: https://lore.kernel.org/r/20250506022301.2588282-1-robh@kernel.org Signed-off-by: Daniel Lezcano <daniel.lezcano@linaro.org>
2025-05-16dt-bindings: timer: Convert ti,keystone-timer to DT schemaRob Herring (Arm)
Convert the TI Keystone Timer binding to DT schema format. It's a straight-forward conversion. Signed-off-by: Rob Herring (Arm) <robh@kernel.org> Link: https://lore.kernel.org/r/20250506022330.2589598-1-robh@kernel.org Signed-off-by: Daniel Lezcano <daniel.lezcano@linaro.org>
2025-05-16dt-bindings: timer: Convert st,spear-timer to DT schemaRob Herring (Arm)
Convert the ST SPEAr Timer binding to DT schema format. It's a straight-forward conversion. Signed-off-by: Rob Herring (Arm) <robh@kernel.org> Link: https://lore.kernel.org/r/20250506022326.2589389-1-robh@kernel.org Signed-off-by: Daniel Lezcano <daniel.lezcano@linaro.org>
2025-05-16dt-bindings: timer: Convert socionext,milbeaut-timer to DT schemaRob Herring (Arm)
Convert the Socionext Milbeaut Timer binding to DT schema format. It's a straight-forward conversion. Signed-off-by: Rob Herring (Arm) <robh@kernel.org> Link: https://lore.kernel.org/r/20250506022322.2589193-1-robh@kernel.org Signed-off-by: Daniel Lezcano <daniel.lezcano@linaro.org>
2025-05-16dt-bindings: timer: Convert snps,arc-timer to DT schemaRob Herring (Arm)
Convert the Synopsys ARC Local Timer binding to DT schema format. It's a straight-forward conversion. Signed-off-by: Rob Herring (Arm) <robh@kernel.org> Link: https://lore.kernel.org/r/20250506022317.2589010-1-robh@kernel.org Signed-off-by: Daniel Lezcano <daniel.lezcano@linaro.org>
2025-05-16dt-bindings: timer: Convert snps,archs-rtc to DT schemaRob Herring (Arm)
Convert the Synopsys ARC HS RTC Timer binding to DT schema format. It's a straight-forward conversion. Signed-off-by: Rob Herring (Arm) <robh@kernel.org> Link: https://lore.kernel.org/r/20250506022313.2588796-1-robh@kernel.org Signed-off-by: Daniel Lezcano <daniel.lezcano@linaro.org>
2025-05-16dt-bindings: timer: Convert snps,archs-gfrc to DT schemaRob Herring (Arm)
Convert the Synopsys ARC HS 64-bit Timer binding to DT schema format. It's a straight-forward conversion. Signed-off-by: Rob Herring (Arm) <robh@kernel.org> Link: https://lore.kernel.org/r/20250506022309.2588605-1-robh@kernel.org Signed-off-by: Daniel Lezcano <daniel.lezcano@linaro.org>
2025-05-16dt-bindings: timer: Convert lsi,zevio-timer to DT schemaRob Herring (Arm)
Convert the TI NSPIRE Timer binding to DT schema format. It's a straight-forward conversion. Signed-off-by: Rob Herring (Arm) <robh@kernel.org> Link: https://lore.kernel.org/r/20250506022257.2588136-1-robh@kernel.org Signed-off-by: Daniel Lezcano <daniel.lezcano@linaro.org>
2025-05-16dt-bindings: timer: Convert jcore,pit to DT schemaRob Herring (Arm)
Convert the J-Core PIT Timer binding to DT schema format. It's a straight-forward conversion. Since the 'reg' entries are based on number of cores, we can't put constraints on it. Signed-off-by: Rob Herring (Arm) <robh@kernel.org> Link: https://lore.kernel.org/r/20250506022253.2587999-1-robh@kernel.org Signed-off-by: Daniel Lezcano <daniel.lezcano@linaro.org>
2025-05-16dt-bindings: timer: Convert img,pistachio-gptimer to DT schemaRob Herring (Arm)
Convert the ImgTec Pistachio Timer binding to DT schema format. It's a straight-forward conversion. Signed-off-by: Rob Herring (Arm) <robh@kernel.org> Link: https://lore.kernel.org/r/20250506022249.2587839-1-robh@kernel.org Signed-off-by: Daniel Lezcano <daniel.lezcano@linaro.org>
2025-05-16dt-bindings: timer: Convert ezchip,nps400-timer to DT schemaRob Herring (Arm)
Convert the EZChip NPS400 Timer bindings to DT schema format. It's a straight-forward conversion. The 2 bindings only differ in compatible and one required property, so the schemas can be combined. Signed-off-by: Rob Herring (Arm) <robh@kernel.org> Link: https://lore.kernel.org/r/20250506022237.2587355-1-robh@kernel.org Signed-off-by: Daniel Lezcano <daniel.lezcano@linaro.org>
2025-05-16dt-bindings: timer: Convert cirrus,clps711x-timer to DT schemaRob Herring (Arm)
Convert the Cirrus CLPS711x timer binding to DT schema format. It's a straight-forward conversion. Drop the aliases node and second example which aren't relevant. Signed-off-by: Rob Herring (Arm) <robh@kernel.org> Link: https://lore.kernel.org/r/20250506022215.2586595-1-robh@kernel.org Signed-off-by: Daniel Lezcano <daniel.lezcano@linaro.org>
2025-05-16dt-bindings: timer: Convert altr,timer-1.0 to DT schemaRob Herring (Arm)
Convert the Altera Timer binding to DT schema format. It's a straight-forward conversion. Signed-off-by: Rob Herring (Arm) <robh@kernel.org> Link: https://lore.kernel.org/r/20250506022202.2586157-1-robh@kernel.org Signed-off-by: Daniel Lezcano <daniel.lezcano@linaro.org>
2025-05-16dt-bindings: timer: Add ESWIN EIC7700 CLINTDarshan Prajapati
Add compatible string for ESWIN EIC7700 CLINT. Signed-off-by: Darshan Prajapati <darshan.prajapati@einfochips.com> Reviewed-by: Samuel Holland <samuel.holland@sifive.com> Signed-off-by: Pinkesh Vaghela <pinkesh.vaghela@einfochips.com> Acked-by: Conor Dooley <conor.dooley@microchip.com> Link: https://lore.kernel.org/r/20250410152519.1358964-9-pinkesh.vaghela@einfochips.com Signed-off-by: Daniel Lezcano <daniel.lezcano@linaro.org>
2025-05-16clocksource/drivers: Add EcoNet Timer HPT driverCaleb James DeLisle
Introduce a clocksource driver for the so-called high-precision timer (HPT) in the EcoNet EN751221 and EN751627 MIPS SoCs. It's a 32 bit upward-counting one-shot timer which relies on the crystal so it is unaffected by CPU power mode. On MIPS 34K devices (single core) there is one timer, and on 1004K devices (dual core) there are two. Each timer has two sets of count/compare registers so that there is one for each of the VPEs on the core. Because each core has 2 VPEs, register selection takes the CPU number / 2 for the timer corrisponding to the core, then CPU number % 2 for the register corrisponding to the VPE. These timers use a percpu-devid IRQ to route interrupts to the VPE which set the event. Signed-off-by: Caleb James DeLisle <cjd@cjdns.fr> Link: https://lore.kernel.org/r/20250507134500.390547-3-cjd@cjdns.fr Signed-off-by: Daniel Lezcano <daniel.lezcano@linaro.org>
2025-05-16dt-bindings: timer: Add EcoNet EN751221 "HPT" CPU TimerCaleb James DeLisle
Add device tree bindings for the so-called high-precision timer (HPT) in the EcoNet EN751221 SoC. Signed-off-by: Caleb James DeLisle <cjd@cjdns.fr> Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Link: https://lore.kernel.org/r/20250507134500.390547-2-cjd@cjdns.fr Signed-off-by: Daniel Lezcano <daniel.lezcano@linaro.org>
2025-05-16dt-bindings: timer: Convert arm,mps2-timer to DT schemaRob Herring (Arm)
Convert the Arm MPS2 Timer binding to DT schema format. It's a straight-forward conversion. Signed-off-by: Rob Herring (Arm) <robh@kernel.org> Reviewed-by: Liviu Dudau <liviu.dudau@arm.com> Link: https://lore.kernel.org/r/20250506022210.2586404-1-robh@kernel.org Signed-off-by: Daniel Lezcano <daniel.lezcano@linaro.org>
2025-05-16dt-bindings: timer: Add Sophgo SG2044 ACLINT timerInochi Amaoto
Like SG2042, SG2044 implements an enhanced ACLINT, so add necessary compatible string for SG2044 SoC. Signed-off-by: Inochi Amaoto <inochiama@gmail.com> Acked-by: Rob Herring (Arm) <robh@kernel.org> Link: https://lore.kernel.org/r/20250413223507.46480-3-inochiama@gmail.com Signed-off-by: Daniel Lezcano <daniel.lezcano@linaro.org>
2025-05-16dt-bindings: timer: Convert cnxt,cx92755-timer to DT schemaRob Herring (Arm)
Convert the Conexant Digicolor SoCs Timer binding to DT schema format. It's a straight-forward conversion. Signed-off-by: Rob Herring (Arm) <robh@kernel.org> Acked-by: Baruch Siach <baruch@tkos.co.il> Link: https://lore.kernel.org/r/20250506022232.2587186-1-robh@kernel.org Signed-off-by: Daniel Lezcano <daniel.lezcano@linaro.org>