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2022-09-28rust: add C helpersMiguel Ojeda
Introduces the source file that will contain forwarders to C macros and inlined functions. Initially this only contains a single helper, but will gain more as more functionality is added to the `kernel` crate in the future. Reviewed-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org> Co-developed-by: Alex Gaynor <alex.gaynor@gmail.com> Signed-off-by: Alex Gaynor <alex.gaynor@gmail.com> Co-developed-by: Geoffrey Thomas <geofft@ldpreload.com> Signed-off-by: Geoffrey Thomas <geofft@ldpreload.com> Co-developed-by: Wedson Almeida Filho <wedsonaf@google.com> Signed-off-by: Wedson Almeida Filho <wedsonaf@google.com> Co-developed-by: Sven Van Asbroeck <thesven73@gmail.com> Signed-off-by: Sven Van Asbroeck <thesven73@gmail.com> Co-developed-by: Gary Guo <gary@garyguo.net> Signed-off-by: Gary Guo <gary@garyguo.net> Co-developed-by: Boqun Feng <boqun.feng@gmail.com> Signed-off-by: Boqun Feng <boqun.feng@gmail.com> Co-developed-by: Maciej Falkowski <m.falkowski@samsung.com> Signed-off-by: Maciej Falkowski <m.falkowski@samsung.com> Co-developed-by: Wei Liu <wei.liu@kernel.org> Signed-off-by: Wei Liu <wei.liu@kernel.org> Signed-off-by: Miguel Ojeda <ojeda@kernel.org>
2022-09-28kallsyms: increase maximum kernel symbol length to 512Miguel Ojeda
Rust symbols can become quite long due to namespacing introduced by modules, types, traits, generics, etc. For instance, the following code: pub mod my_module { pub struct MyType; pub struct MyGenericType<T>(T); pub trait MyTrait { fn my_method() -> u32; } impl MyTrait for MyGenericType<MyType> { fn my_method() -> u32 { 42 } } } generates a symbol of length 96 when using the upcoming v0 mangling scheme: _RNvXNtCshGpAVYOtgW1_7example9my_moduleINtB2_13MyGenericTypeNtB2_6MyTypeENtB2_7MyTrait9my_method At the moment, Rust symbols may reach up to 300 in length. Setting 512 as the maximum seems like a reasonable choice to keep some headroom. Reviewed-by: Kees Cook <keescook@chromium.org> Reviewed-by: Petr Mladek <pmladek@suse.com> Reviewed-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org> Co-developed-by: Alex Gaynor <alex.gaynor@gmail.com> Signed-off-by: Alex Gaynor <alex.gaynor@gmail.com> Co-developed-by: Wedson Almeida Filho <wedsonaf@google.com> Signed-off-by: Wedson Almeida Filho <wedsonaf@google.com> Co-developed-by: Gary Guo <gary@garyguo.net> Signed-off-by: Gary Guo <gary@garyguo.net> Co-developed-by: Boqun Feng <boqun.feng@gmail.com> Signed-off-by: Boqun Feng <boqun.feng@gmail.com> Signed-off-by: Miguel Ojeda <ojeda@kernel.org>
2022-09-28kallsyms: support "big" kernel symbolsMiguel Ojeda
Rust symbols can become quite long due to namespacing introduced by modules, types, traits, generics, etc. Increasing to 255 is not enough in some cases, therefore introduce longer lengths to the symbol table. In order to avoid increasing all lengths to 2 bytes (since most of them are small, including many Rust ones), use ULEB128 to keep smaller symbols in 1 byte, with the rest in 2 bytes. Reviewed-by: Kees Cook <keescook@chromium.org> Reviewed-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org> Co-developed-by: Alex Gaynor <alex.gaynor@gmail.com> Signed-off-by: Alex Gaynor <alex.gaynor@gmail.com> Co-developed-by: Wedson Almeida Filho <wedsonaf@google.com> Signed-off-by: Wedson Almeida Filho <wedsonaf@google.com> Co-developed-by: Gary Guo <gary@garyguo.net> Signed-off-by: Gary Guo <gary@garyguo.net> Co-developed-by: Boqun Feng <boqun.feng@gmail.com> Signed-off-by: Boqun Feng <boqun.feng@gmail.com> Co-developed-by: Matthew Wilcox <willy@infradead.org> Signed-off-by: Matthew Wilcox <willy@infradead.org> Signed-off-by: Miguel Ojeda <ojeda@kernel.org>
2022-09-28kallsyms: add static relationship between `KSYM_NAME_LEN{,_BUFFER}`Miguel Ojeda
This adds a static assert to ensure `KSYM_NAME_LEN_BUFFER` gets updated when `KSYM_NAME_LEN` changes. The relationship used is one that keeps the new size (512+1) close to the original buffer size (500). Reviewed-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org> Co-developed-by: Boqun Feng <boqun.feng@gmail.com> Signed-off-by: Boqun Feng <boqun.feng@gmail.com> Signed-off-by: Miguel Ojeda <ojeda@kernel.org>
2022-09-28kallsyms: avoid hardcoding buffer sizeBoqun Feng
This introduces `KSYM_NAME_LEN_BUFFER` in place of the previously hardcoded size of the input buffer. It will also make it easier to update the size in a single place in a later patch. Reviewed-by: Kees Cook <keescook@chromium.org> Reviewed-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org> Signed-off-by: Boqun Feng <boqun.feng@gmail.com> Co-developed-by: Miguel Ojeda <ojeda@kernel.org> Signed-off-by: Miguel Ojeda <ojeda@kernel.org>
2022-09-28kallsyms: use `ARRAY_SIZE` instead of hardcoded sizeBoqun Feng
This removes one place where the `500` constant is hardcoded. Reviewed-by: Kees Cook <keescook@chromium.org> Reviewed-by: Geert Stappers <stappers@stappers.nl> Reviewed-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org> Signed-off-by: Boqun Feng <boqun.feng@gmail.com> Co-developed-by: Miguel Ojeda <ojeda@kernel.org> Signed-off-by: Miguel Ojeda <ojeda@kernel.org>
2022-09-28wifi: rtw89: 8852b: configure DLE memPing-Ke Shih
Configure DLE (data link engine) memory size for operating modes. Signed-off-by: Ping-Ke Shih <pkshih@realtek.com> Signed-off-by: Kalle Valo <kvalo@kernel.org> Link: https://lore.kernel.org/r/20220927062611.30484-10-pkshih@realtek.com
2022-09-28wifi: rtw89: check DLE FIFO size with reserved sizePing-Ke Shih
For SCC mode, some FIFO are reserved, so compare the quantity after minus the reserved size. Signed-off-by: Ping-Ke Shih <pkshih@realtek.com> Signed-off-by: Kalle Valo <kvalo@kernel.org> Link: https://lore.kernel.org/r/20220927062611.30484-9-pkshih@realtek.com
2022-09-28wifi: rtw89: mac: correct register of report IMRPing-Ke Shih
The register of report IMR is chip specific, so add a field to strut to correct them. Signed-off-by: Ping-Ke Shih <pkshih@realtek.com> Signed-off-by: Kalle Valo <kvalo@kernel.org> Link: https://lore.kernel.org/r/20220927062611.30484-8-pkshih@realtek.com
2022-09-28wifi: rtw89: pci: set power cut closed for 8852bePing-Ke Shih
Entering LPS with PCIe APHY power cut closed would cause PCIe link issue. To avoid the combinational issue, keep PCIe APHY power cut always on. Signed-off-by: Ping-Ke Shih <pkshih@realtek.com> Signed-off-by: Kalle Valo <kvalo@kernel.org> Link: https://lore.kernel.org/r/20220927062611.30484-7-pkshih@realtek.com
2022-09-28wifi: rtw89: pci: add to do PCI auto calibrationPing-Ke Shih
8852be needs this with n times calibration to correct hardware clock. Signed-off-by: Ping-Ke Shih <pkshih@realtek.com> Signed-off-by: Kalle Valo <kvalo@kernel.org> Link: https://lore.kernel.org/r/20220927062611.30484-6-pkshih@realtek.com
2022-09-28wifi: rtw89: 8852b: implement chip_ops::{enable,disable}_bb_rfPing-Ke Shih
Implement to power on/off BB and RF via MAC registers. Add return type of chip_ops::disable_bb_rf, because it could fail to disable. Also, correct naming of register 0x0200 used by the ops as well. Signed-off-by: Ping-Ke Shih <pkshih@realtek.com> Signed-off-by: Kalle Valo <kvalo@kernel.org> Link: https://lore.kernel.org/r/20220927062611.30484-5-pkshih@realtek.com
2022-09-28wifi: rtw89: add DMA busy checking bits to chip infoPing-Ke Shih
8852B has less DMA channels, so its checking bits are different from other chips. Signed-off-by: Ping-Ke Shih <pkshih@realtek.com> Signed-off-by: Kalle Valo <kvalo@kernel.org> Link: https://lore.kernel.org/r/20220927062611.30484-4-pkshih@realtek.com
2022-09-28wifi: rtw89: mac: define DMA channel mask to avoid unsupported channelsPing-Ke Shih
Six channels are unsupported by 8852b, so mask them out to prevent to access undefined registers in this chip. Signed-off-by: Ping-Ke Shih <pkshih@realtek.com> Signed-off-by: Kalle Valo <kvalo@kernel.org> Link: https://lore.kernel.org/r/20220927062611.30484-3-pkshih@realtek.com
2022-09-28wifi: rtw89: pci: mask out unsupported TX channelsPing-Ke Shih
8852BE doesn't support some TX channels, so mask them out, or it access undefined registers. Signed-off-by: Ping-Ke Shih <pkshih@realtek.com> Signed-off-by: Kalle Valo <kvalo@kernel.org> Link: https://lore.kernel.org/r/20220927062611.30484-2-pkshih@realtek.com
2022-09-28iwlegacy: Replace zero-length arrays with DECLARE_FLEX_ARRAY() helperGustavo A. R. Silva
Zero-length arrays are deprecated and we are moving towards adopting C99 flexible-array members, instead. So, replace zero-length arrays declarations in anonymous union with the new DECLARE_FLEX_ARRAY() helper macro. This helper allows for flexible-array members in unions. Link: https://github.com/KSPP/linux/issues/193 Link: https://github.com/KSPP/linux/issues/223 Link: https://gcc.gnu.org/onlinedocs/gcc/Zero-Length.html Signed-off-by: Gustavo A. R. Silva <gustavoars@kernel.org> Reviewed-by: Kees Cook <keescook@chromium.org> Signed-off-by: Kalle Valo <kvalo@kernel.org> Link: https://lore.kernel.org/r/YzIvzc0jsYLigO8a@work
2022-09-28ipw2x00: Replace zero-length array with DECLARE_FLEX_ARRAY() helperGustavo A. R. Silva
Zero-length arrays are deprecated and we are moving towards adopting C99 flexible-array members, instead. So, replace zero-length arrays declarations in anonymous union with the new DECLARE_FLEX_ARRAY() helper macro. This helper allows for flexible-array members in unions. Link: https://github.com/KSPP/linux/issues/193 Link: https://github.com/KSPP/linux/issues/220 Link: https://gcc.gnu.org/onlinedocs/gcc/Zero-Length.html Signed-off-by: Gustavo A. R. Silva <gustavoars@kernel.org> Reviewed-by: Kees Cook <keescook@chromium.org> Signed-off-by: Kalle Valo <kvalo@kernel.org> Link: https://lore.kernel.org/r/YzIeULWc17XSIglv@work
2022-09-28wifi: iwlwifi: Track scan_cmd allocation size explicitlyKees Cook
In preparation for reducing the use of ksize(), explicitly track the size of scan_cmd allocations. This also allows for noticing if the scan size changes unexpectedly. Note that using ksize() was already incorrect here, in the sense that ksize() would not match the actual allocation size, which would trigger future run-time allocation bounds checking. (In other words, memset() may know how large scan_cmd was allocated for, but ksize() will return the upper bounds of the actually allocated memory, causing a run-time warning about an overflow.) Cc: Gregory Greenman <gregory.greenman@intel.com> Cc: Kalle Valo <kvalo@kernel.org> Cc: "David S. Miller" <davem@davemloft.net> Cc: Eric Dumazet <edumazet@google.com> Cc: Jakub Kicinski <kuba@kernel.org> Cc: Paolo Abeni <pabeni@redhat.com> Cc: Luca Coelho <luciano.coelho@intel.com> Cc: Johannes Berg <johannes.berg@intel.com> Cc: Emmanuel Grumbach <emmanuel.grumbach@intel.com> Cc: Miri Korenblit <miriam.rachel.korenblit@intel.com> Cc: Ilan Peer <ilan.peer@intel.com> Cc: linux-wireless@vger.kernel.org Cc: netdev@vger.kernel.org Signed-off-by: Kees Cook <keescook@chromium.org> Signed-off-by: Kalle Valo <kvalo@kernel.org> Link: https://lore.kernel.org/r/20220923220853.3302056-1-keescook@chromium.org
2022-09-28Merge tag 'amd-drm-next-6.1-2022-09-23' of ↵Dave Airlie
https://gitlab.freedesktop.org/agd5f/linux into drm-next amd-drm-next-6.1-2022-09-23: amdgpu: - SDMA fix - Add new firmware types to debugfs/IOCTL version queries - Misc spelling and grammar fixes - Misc code cleanups - DCN 3.2.x fixes - DCN 3.1.x fixes - CS cleanup - Gang submit support - Clang fixes - Non-DC audio fix - GPUVM locking fixes - Vega10 PWN fan speed fix amdkgd: - MQD manager cleanup - Misc spelling and grammar fixes UAPI: - Add new firmware types to the FW version query IOCTL Signed-off-by: Dave Airlie <airlied@redhat.com> From: Alex Deucher <alexander.deucher@amd.com> Link: https://patchwork.freedesktop.org/patch/msgid/20220923215729.6061-1-alexander.deucher@amd.com
2022-09-28Merge tag 'drm-misc-next-2022-09-23' of ↵Dave Airlie
git://anongit.freedesktop.org/drm/drm-misc into drm-next drm-misc-next for 6.1: UAPI Changes: Cross-subsystem Changes: - dma-buf: Improve signaling when debugging Core Changes: - Backlight handling improvements - format-helper: Add drm_fb_build_fourcc_list() - fourcc: Kunit tests improvements - modes: Add DRM_MODE_INIT() macro - plane: Remove drm_plane_init(), Allocate planes with drm_universal_plane_alloc() - plane-helper: Add drm_plane_helper_atomic_check() - probe-helper: Add drm_connector_helper_get_modes_fixed() and drm_crtc_helper_mode_valid_fixed() - tests: Conversion to parametrized tests, test name consistency Driver Changes: - amdgpu: Fix for a VRAM eviction issue - ast: Resolution handling improvements - mediatek: small code improvements for DP - omap: Refcounting fix, small improvements - rockchip: RK3568 support, Gamma support for RK3399 - sun4i: Build failure fix when !OF - udl: Multiple fixes here and there - vc4: HDMI hotplug handling improvements - vkms: Warning fix Signed-off-by: Dave Airlie <airlied@redhat.com> From: Maxime Ripard <maxime@cerno.tech> Link: https://patchwork.freedesktop.org/patch/msgid/20220923073943.d43tne5hni3iknlv@houat
2022-09-28ARM: config: aspeed_g5: Enable PECIJoel Stanley
Intel systems use PECI, so provide build coverage for the driver stack. Signed-off-by: Joel Stanley <joel@jms.id.au>
2022-09-28ARM: configs: aspeed_g4: Remove appended DTB and ATAGJoel Stanley
These machines boot using FIT and have done so since support was merged, so neither option is used. Signed-off-by: Joel Stanley <joel@jms.id.au>
2022-09-28ARM: configs: aspeed: Refresh defconfigsJoel Stanley
Remove the unused CONFIG_BLK_DEV_BSG option. Signed-off-by: Joel Stanley <joel@jms.id.au>
2022-09-28ARM: config: aspeed: Enable namespacesJoel Stanley
Used by OpenBMC due to systemd. Signed-off-by: Joel Stanley <joel@jms.id.au>
2022-09-28ARM: configs: aspeed_g4: Enable IPV6 optionsJoel Stanley
Match the aspeed_g5 defconfig and what is used in OpenBMC. Signed-off-by: Joel Stanley <joel@jms.id.au>
2022-09-28ARM: configs: aspeed_g4: Enable OCC and NBD driversJoel Stanley
These are used by OpenBMC machines such as palmetto. Signed-off-by: Joel Stanley <joel@jms.id.au>
2022-09-28ARM: configs: aspeed_g5: Enable MCTP stackJoel Stanley
Enable the MCTP core along with the serial and i2c drivers. Signed-off-by: Joel Stanley <joel@jms.id.au>
2022-09-28ARM: configs: aspeed_g5: Add PL2303 USB serial driverJoel Stanley
Used by P10 machines. Signed-off-by: Joel Stanley <joel@jms.id.au>
2022-09-28ARM: configs: aspeed_g5: Add TPM TIS I2C driverJoel Stanley
It is used by the rainier and other p10bmc machines. Signed-off-by: Joel Stanley <joel@jms.id.au>
2022-09-28ARM: configs: aspeed_g5: Add mp5023 driverJoel Stanley
Signed-off-by: Joel Stanley <joel@jms.id.au>
2022-09-28ARM: configs: aspeed: Add support for USB flash drivesAdriana Kobylak
Add support to detect USB flash drives and create the /dev/sd* devices. Also add support for vfat to support USB drives formatted as FAT32. This support will be used to enable firmware updates via USB flash drives where the firmware image is stored in the USB drive and it's plugged into the BMC USB port. Signed-off-by: Adriana Kobylak <anoo@us.ibm.com> Tested-by: Adriana Kobylak <anoo@us.ibm.com> Link: https://lore.kernel.org/r/20211112202931.2379145-1-anoo@linux.ibm.com Signed-off-by: Joel Stanley <joel@jms.id.au>
2022-09-28ARM: dts: aspeed: ast2600-evb-a1: Add compatibleJoel Stanley
The AST2600 EVB A1 is an AST2600 EVB. Signed-off-by: Joel Stanley <joel@jms.id.au>
2022-09-28ARM: dts: aspeed: ast2600evb: Fix compatible stringJoel Stanley
The AST2600 EVB is not an A1. Signed-off-by: Joel Stanley <joel@jms.id.au>
2022-09-28ARM: dts: aspeed: ast2600-evb: Enable Quad SPI RX tranfersCédric Le Goater
Now that the pinctrl definitions of the ast2600 SoC have been fixed, see commit 925fbe1f7eb6 ("dt-bindings: pinctrl: aspeed-g6: add FWQSPI function/group"), it is safe to activate QSPI on the ast2600 evb. Cc: Chin-Ting Kuo <chin-ting_kuo@aspeedtech.com> Tested-by: Jae Hyun Yoo <quic_jaehyoo@quicinc.com> Signed-off-by: Cédric Le Goater <clg@kaod.org> Link: https://lore.kernel.org/r/20220603073705.1624351-1-clg@kaod.org Signed-off-by: Joel Stanley <joel@jms.id.au>
2022-09-28ARM: dts: aspeed-g6: Enable more UART controllersKen Chen
Setup the configuration of UART6, UART7, UART8, and UART9 in aspeed-g6.dtsi. Signed-off-by: Ken Chen <j220584470k@gmail.com> Link: https://lore.kernel.org/r/20220805090957.470434-1-j220584470k@gmail.com Signed-off-by: Joel Stanley <joel@jms.id.au>
2022-09-28ARM: dts: aspeed: yosemitev2: Disable the EEPROM driverKarthikeyan Pasupathi
Removed NIC EEPROM driver IPMB-12 channel and enabled it as generic i2c EEPROM. Signed-off-by: Karthikeyan Pasupathi <pkarthikeyan1509@gmail.com> Link: https://lore.kernel.org/r/20220914115307.GA339@hcl-ThinkPad-T495 Signed-off-by: Joel Stanley <joel@jms.id.au>
2022-09-28ARM: dts: aspeed: Add AMD DaytonaX BMCKonstantin Aladyshev
Add initial version of device tree for the BMC in the AMD DaytonaX platform. AMD DaytonaX platform is a customer reference board (CRB) with an Aspeed ast2500 BMC manufactured by AMD. Signed-off-by: Konstantin Aladyshev <aladyshev22@gmail.com> Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Link: https://lore.kernel.org/r/20220921210950.10568-3-aladyshev22@gmail.com Signed-off-by: Joel Stanley <joel@jms.id.au>
2022-09-28dt-bindings: arm: aspeed: document AMD DaytonaXKonstantin Aladyshev
Document AMD DaytonaX board compatible. Signed-off-by: Konstantin Aladyshev <aladyshev22@gmail.com> Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Link: https://lore.kernel.org/r/20220921210950.10568-2-aladyshev22@gmail.com Signed-off-by: Joel Stanley <joel@jms.id.au>
2022-09-28ARM: dts: aspeed: Yosemite V2: Enable OCP debug cardKarthikeyan Pasupathi
Added IPMB-13 channel for Debug Card communication which improves the readability of the machine and makes it easier to debug the server and it will display some pieces of information about the server like "system info", "Critical sensors" and "critical sel". Signed-off-by: Karthikeyan Pasupathi <pkarthikeyan1509@gmail.com> Reviewed-by: Patrick Williams <patrick@stwcx.xyz> Link: https://lore.kernel.org/r/20220926124313.GA8400@hcl-ThinkPad-T495 Signed-off-by: Joel Stanley <joel@jms.id.au>
2022-09-28ARM: dts: aspeed: mtjade: Remove gpio-keys entriesQuan Nguyen
Remove the gpio-keys entries from the Ampere's Mt. Jade BMC device tree. The user space applications are going to change from using libevdev to libgpiod. Signed-off-by: Quan Nguyen <quan@os.amperecomputing.com> Link: https://lore.kernel.org/r/20220915080828.2894070-1-quan@os.amperecomputing.com Signed-off-by: Joel Stanley <joel@jms.id.au>
2022-09-28ARM: dts: aspeed: Add device tree for Ampere's Mt. Mitchell BMCQuan Nguyen
The Mt. Mitchell BMC is an ASPEED AST2600-based BMC for the Mt. Mitchell hardware reference platform with AmpereOne(TM) processor. Signed-off-by: Quan Nguyen <quan@os.amperecomputing.com> Signed-off-by: Phong Vo <phong@os.amperecomputing.com> Signed-off-by: Thang Q. Nguyen <thang@os.amperecomputing.com> Reviewed-by: Joel Stanley <joel@jms.id.au> Link: https://lore.kernel.org/r/20220817071539.176110-3-quan@os.amperecomputing.com Signed-off-by: Joel Stanley <joel@jms.id.au>
2022-09-28dt-bindings: arm: aspeed: document Ampere Mt.Mitchell BMC compatiblesQuan Nguyen
Document Ampere Mt.Mitchell BMC board compatible. Signed-off-by: Quan Nguyen <quan@os.amperecomputing.com> Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Link: https://lore.kernel.org/r/20220817071539.176110-2-quan@os.amperecomputing.com Signed-off-by: Joel Stanley <joel@jms.id.au>
2022-09-27mlxsw: core_acl_flex_actions: Split memcpy() of struct flow_action_cookie ↵Kees Cook
flexible array To work around a misbehavior of the compiler's ability to see into composite flexible array structs (as detailed in the coming memcpy() hardening series[1]), split the memcpy() of the header and the payload so no false positive run-time overflow warning will be generated. [1] https://lore.kernel.org/linux-hardening/20220901065914.1417829-2-keescook@chromium.org Cc: Ido Schimmel <idosch@nvidia.com> Signed-off-by: Kees Cook <keescook@chromium.org> Reviewed-by: Gustavo A. R. Silva <gustavoars@kernel.org> Reviewed-by: Petr Machata <petrm@nvidia.com> Link: https://lore.kernel.org/r/20220927004033.1942992-1-keescook@chromium.org Signed-off-by: Jakub Kicinski <kuba@kernel.org>
2022-09-27Merge branch 'net-ipa-generalized-register-definitions'Jakub Kicinski
Alex Elder says: ==================== net: ipa: generalized register definitions This series is quite a bit bigger than what I normally like to send, and I apologize for that. I would like it to get incorporated in its entirety this week if possible, and splitting up the series carries a small risk that wouldn't happen. Each IPA register has a defined offset, and in most cases, a set of masks that define the width and position of fields within the register. Most registers currently use the same offset for all versions of IPA. Usually fields within registers are also the same across many versions. Offsets and fields like this are defined using preprocessor constants. When a register has a different offset for different versions of IPA, an inline function is used to determine its offset. And in places where a field differs between versions, an inline function is used to determine how a value is encoded within the field, depending on IPA version. Starting with IPA version 5.0, the number of IPA endpoints supported is greater than 32. As a consequence, *many* IPA register offsets differ considerably from prior versions. This increase in endpoints also requires a lot of field sizes and/or positions to change (such as those that contain an endpoint ID). Defining these things with constants is no longer simple, and rather than fill the code with one-off functions to define offsets and encode field values, this series puts in place a new way of defining IPA registers and their fields. Note that this series creates this new scheme, but does not add IPA v5.0+ support. An enumerated type will now define a unique ID for each IPA register. Each defined register will have a structure that contains its offset and its name (a printable string). Each version of IPA will have an array of these register structures, indexed by register ID. Some "parameterized" registers are duplicated (this is not new). For example, each endpoint has an INIT_HDR register, and the offset of a given endpoint's INIT_HDR register is dependent on the endpoint number (the parameter). In such cases, the register's "stride" is defined as the distance between two of these registers. If a register contains fields, each field will have a unique ID that's used as an index into an array of field masks defined for the register. The register structure also defines the number of entries in this field array. When a register is to be used in code, its register structure will be fetched using function ipa_reg(). Other functions are then used to determine the register's offset, or to encode a value into one of the register's fields, and so on. Each version of IPA defines the set of registers that are available, including all fields for these registers. The array of defined registers is set up at probe time based on the IPA version, and it is associated with the main IPA structure. ==================== Link: https://lore.kernel.org/r/20220926220931.3261749-1-elder@linaro.org Signed-off-by: Jakub Kicinski <kuba@kernel.org>
2022-09-27net: ipa: define remaining IPA register fieldsAlex Elder
Define the fields for the ENDP_INIT_DEAGGR, ENDP_INIT_RSRC_GRP, ENDP_INIT_SEQ, ENDP_STATUS, and ENDP_FILTER_ROUTER_HSH_CFG, and IPA_IRQ_UC IPA registers for all supported IPA versions. Create enumerated types to identify fields for these IPA registers. Use IPA_REG_FIELDS() and IPA_REG_STRIDE_FIELDS() to specify the field mask values defined for these registers, for each supported version of IPA. Use ipa_reg_encode() and ipa_reg_bit() to build up the values to be written to these registers, remove an inline function and all the *_FMASK symbols that are now no longer used. Signed-off-by: Alex Elder <elder@linaro.org> Signed-off-by: Jakub Kicinski <kuba@kernel.org>
2022-09-27net: ipa: define more IPA endpoint register fieldsAlex Elder
Define the fields for the ENDP_INIT_MODE, ENDP_INIT_AGGR, ENDP_INIT_HOL_BLOCK_EN, and ENDP_INIT_HOL_BLOCK_TIMER IPA registers for all supported IPA versions. Create enumerated types to identify fields for these IPA registers. Use IPA_REG_STRIDE_FIELDS() to specify the field mask values defined for these registers, for each supported version of IPA. Change aggr_time_limit_encode() and hol_block_timer_encode() so they take an ipa_reg pointer, and use those register's fields to compute their encoded results. Have aggr_time_limit_encode() take an IPA pointer rather than version, to match hol_block_timer_encode(). Use ipa_reg_encode(), ipa_reg_bit(), and ipa_reg_field_max() to manipulate values to be written to these registers, remove the definitions of the various inline functions and *_FMASK symbols that are now no longer used. Signed-off-by: Alex Elder <elder@linaro.org> Signed-off-by: Jakub Kicinski <kuba@kernel.org>
2022-09-27net: ipa: define some IPA endpoint register fieldsAlex Elder
Define the fields for the ENDP_INIT_CTRL, ENDP_INIT_CFG, ENDP_INIT_NAT, ENDP_INIT_HDR, and ENDP_INIT_HDR_EXT IPA registers for all supported IPA versions. Create enumerated types to identify fields for these IPA registers. Use IPA_REG_STRIDE_FIELDS() to specify the field mask values defined for these registers, for each supported version of IPA. Move ipa_header_size_encoded() and ipa_metadata_offset_encoded() out of "ipa_reg.h" and into "ipa_endpoint.c". Change them so they take an additional ipa_reg structure argument, and use ipa_reg_encode() to encode the parts of the header size and offset prior to writing to the register. Change their names to be verbs rather than nouns. Use ipa_reg_encode(), ipa_reg_bit, and ipa_reg_field_max() to manipulate values to be written to these registers, remove the definition of the no-longer-used *_FMASK symbols. Signed-off-by: Alex Elder <elder@linaro.org> Signed-off-by: Jakub Kicinski <kuba@kernel.org>
2022-09-27net: ipa: define resource group/type IPA register fieldsAlex Elder
Define the fields for the {SRC,DST}_RSRC_GRP_{01,23,45,67}_RSRC_TYPE IPA registers for all supported IPA versions. Create enumerated types to identify fields for these IPA registers. Use IPA_REG_STRIDE_FIELDS() to specify the field mask values defined for these registers, for each supported version of IPA. Use ipa_reg_encode() to build up the values to be written to these registers. Remove the definition of the no-longer-used *_FMASK symbols. Signed-off-by: Alex Elder <elder@linaro.org> Signed-off-by: Jakub Kicinski <kuba@kernel.org>
2022-09-27net: ipa: define even more IPA register fieldsAlex Elder
Define the fields for the FLAVOR_0, IDLE_INDICATION_CFG, QTIME_TIMESTAMP_CFG, TIMERS_XO_CLK_DIV_CFG and TIMERS_PULSE_GRAN_CFG IPA registers for all supported IPA versions. Create enumerated types to identify fields for these IPA registers. Use IPA_REG_FIELDS() to specify the field mask values defined for these registers, for each supported version of IPA. Use ipa_reg_bit() and ipa_reg_encode() to build up the values to be written to these registers. Use ipa_reg_decode() to extract field values from the FLAVOR_0 register. Remove the definition of the no-longer-used *_FMASK symbols. Signed-off-by: Alex Elder <elder@linaro.org> Signed-off-by: Jakub Kicinski <kuba@kernel.org>
2022-09-27net: ipa: define more IPA register fieldsAlex Elder
Define the fields for the LOCAL_PKT_PROC_CNTXT, COUNTER_CFG, and IPA_TX_CFG IPA registers for all supported IPA versions. Create enumerated types to identify fields for these IPA registers. Use IPA_REG_FIELDS() to specify the field mask values defined for these registers, for each supported version of IPA. Use ipa_reg_bit() and ipa_reg_encode() to build up the values to be written to these registers. Remove the definition of the *_FMASK symbols as well as proc_cntxt_base_addr_encoded(), because they are no longer needed. Signed-off-by: Alex Elder <elder@linaro.org> Signed-off-by: Jakub Kicinski <kuba@kernel.org>
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