summaryrefslogtreecommitdiff
AgeCommit message (Collapse)Author
2020-05-18arm64: dts: qcom: sc7180: Fix ETMv4 power management patchBjorn Andersson
The lack of unique context in '0f1decaa83b7 ("arm64: dts: qcom: sc7180: Support ETMv4 power management")' caused the patch to be applied off-by-one. Move the "arm,coresight-loses-context-with-cpu" properties down one node, so that it applies to the ETMs and not the replicator. Reported-by: Sai Prakash Ranjan <saiprakash.ranjan@codeaurora.org> Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
2020-05-18arm64: dts: juno: Fix SCPI shared mem node nameAndre Przywara
The SRAM DT binding requires child nodes to use a certain node name scheme. Change the naming from scp-shmem to scp-sram to comply with that. Link: https://lore.kernel.org/r/20200513103016.130417-19-andre.przywara@arm.com Signed-off-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Sudeep Holla <sudeep.holla@arm.com>
2020-05-18arm64: dts: vexpress: Fix VExpress LED namesAndre Przywara
The common LED binding wants the LED node names to start with led- and then have just a single number. Changing the naming for the 8 user LEDs from using user<x> to led-<x>. Also there is no default-trigger named "mmc0" in the kernel, so use the more generic "disk-activity". Link: https://lore.kernel.org/r/20200513103016.130417-18-andre.przywara@arm.com Signed-off-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Sudeep Holla <sudeep.holla@arm.com>
2020-05-18arm64: dts: juno: Fix GPU interrupt orderAndre Przywara
The Mali binding insists on the GPU interrupts to be in ordered as: job, mmu, gpu. Sort the GPU interrupts and interrupt-names properties accordingly. Link: https://lore.kernel.org/r/20200513103016.130417-17-andre.przywara@arm.com Signed-off-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Sudeep Holla <sudeep.holla@arm.com>
2020-05-18arm64: dts: fvp/juno: Fix bus node namesAndre Przywara
Most Arm Ltd. boards are employing a layered bus structure, to map the hardware design (SoC, motherboard, IOFPGA) and structure the DTs. The "simple-bus" nodes only allow a limited set of node names. Switch to use *-bus to be binding compliant. This relies on a pending dt-schema.git fix for now: https://github.com/devicetree-org/dt-schema/pull/38 Link: https://lore.kernel.org/r/20200513103016.130417-16-andre.przywara@arm.com Signed-off-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Sudeep Holla <sudeep.holla@arm.com>
2020-05-18arm64: dts: fvp: Fix SMMU DT nodeAndre Przywara
The SMMU name in the RevC FVP DT file was not fully binding compliant. Adjust the node name to match the binding's list of allowed names, also shuffle the order of the interrupts to comply with the expected order. Link: https://lore.kernel.org/r/20200513103016.130417-15-andre.przywara@arm.com Signed-off-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Sudeep Holla <sudeep.holla@arm.com>
2020-05-18arm64: dts: fvp/juno: Fix serial node namesAndre Przywara
The UARTs for all Arm Ltd. boards were using "uart" as their node name stub. Replace that with the required "serial" string, to comply with the PL011 DT binding. Link: https://lore.kernel.org/r/20200513103016.130417-14-andre.przywara@arm.com Signed-off-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Sudeep Holla <sudeep.holla@arm.com>
2020-05-18arm64: dts: juno: Use proper DT node name for USBAndre Przywara
The EHCI/OCHI DT binding requires to use "usb" as the node name stub. Replace the existing name with "usb" to comply with the binding. Link: https://lore.kernel.org/r/20200513103016.130417-13-andre.przywara@arm.com Signed-off-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Sudeep Holla <sudeep.holla@arm.com>
2020-05-18ARM: dts: at91: sama5d2_xplained: Add aliases for the dedicated I2C IPsTudor Ambarus
The sama5d2 SoC has two dedicated I2C IPs that are enabled on sama5d2_xplained. Add alias for the i2c devices to not rely on probe order for the i2c device numbering. Signed-off-by: Tudor Ambarus <tudor.ambarus@microchip.com> Link: https://lore.kernel.org/r/20200518114802.253660-1-tudor.ambarus@microchip.com Signed-off-by: Alexandre Belloni <alexandre.belloni@bootlin.com>
2020-05-17ARM: dts: ux500: Add touchscreen to the SkomerLinus Walleij
This adds touchscreen support to the Ux500 Samsung GT-S7710 "Skomer" mobile phone. Signed-off-by: Linus Walleij <linus.walleij@linaro.org> Link: https://lore.kernel.org/r/20200516212913.485365-1-linus.walleij@linaro.org
2020-05-17arm64: dts: fvp: Fix ITS node names and #msi-cellsAndre Przywara
The GIC ITS nodes in the fastmodel DTS files were not fully binding compliant. Use one of the allowed node names, also add the required #msi-cells property for the older model. Link: https://lore.kernel.org/r/20200513103016.130417-12-andre.przywara@arm.com Signed-off-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Sudeep Holla <sudeep.holla@arm.com>
2020-05-17arm64: dts: fvp: Fix GIC child nodesAndre Przywara
The GIC DT nodes for the fastmodels were not fully compliant with the DT binding, which has certain expectations about child nodes and their size and address cells values. Use smaller #address-cells and #size-cells values, as the binding requests, and adjust the reg properties accordingly. This requires adjusting the interrupt nexus nodes as well, as one field of the interrupt-map property depends on the GIC's address-size. Since the .dts files share interrupt nexus nodes across different interrupt controllers (GICv2 vs. GICv3), we need to use the only commonly allowed #address-size value of <1> for both. Link: https://lore.kernel.org/r/20200513103016.130417-11-andre.przywara@arm.com Signed-off-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Sudeep Holla <sudeep.holla@arm.com>
2020-05-17arm64: dts: juno: Fix GIC child nodesAndre Przywara
The GIC DT nodes for the Juno boards were not fully compliant with the DT binding, which has certain expectations about child nodes and their size and address cells values. Use smaller #address-cells and #size-cells values, as the binding requests, and adjust the reg properties accordingly. This requires adjusting the interrupt nexus nodes as well, as one field of the interrupt-map property depends on the GIC's address-size. Link: https://lore.kernel.org/r/20200513103016.130417-10-andre.przywara@arm.com Signed-off-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Sudeep Holla <sudeep.holla@arm.com>
2020-05-17arm64: dts: fvp: Fix GIC compatible namesAndre Przywara
The GIC DT binding only allows certain combinations of DT compatible strings. The somewhat awkward "arm,cortex-a15-gic", "arm,cortex-a9-gic" is not among those. Drop that combination of different "cortex" based strings used for the models, and replace it with the more useful combination including "arm,gic-400". Link: https://lore.kernel.org/r/20200513103016.130417-9-andre.przywara@arm.com Signed-off-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Sudeep Holla <sudeep.holla@arm.com>
2020-05-17arm64: dts: juno: Fix mem-timerAndre Przywara
The Juno's mem-timer DT node was not fully compliant with the DT binding, which has certain expectation about child nodes and their size and address cells values. Use a cell size of 1, as the binding requests, and spell out the ranges property to be binding compliant. Link: https://lore.kernel.org/r/20200513103016.130417-8-andre.przywara@arm.com Signed-off-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Sudeep Holla <sudeep.holla@arm.com>
2020-05-17arm64: dts: juno: Move fixed devices out of bus nodeAndre Przywara
The devicetree compiler complains when DT nodes without a reg property live inside a (simple) bus node: Warning (simple_bus_reg): Node /bus@8000000/v2m_refclk32khz missing or empty reg/ranges property Move the fixed clocks, the fixed regulator, and the gpio keys to the root node, since they do not depend on any busses. Link: https://lore.kernel.org/r/20200513103016.130417-7-andre.przywara@arm.com Signed-off-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Sudeep Holla <sudeep.holla@arm.com>
2020-05-17arm64: dts: fvp: Move fixed clocks out of bus nodeAndre Przywara
The devicetree compiler complains when DT nodes without a reg property live inside a (simple) bus node: Warning (simple_bus_reg): Node /bus@8000000/v2m_refclk32khz missing or empty reg/ranges property Move the fixed clocks to the root node, since they do not depend on any busses. Link: https://lore.kernel.org/r/20200513103016.130417-6-andre.przywara@arm.com Signed-off-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Sudeep Holla <sudeep.holla@arm.com>
2020-05-17arm64: dts: vexpress: Move fixed devices out of bus nodeAndre Przywara
The devicetree compiler complains when DT nodes without a reg property live inside a (simple) bus node: Warning (simple_bus_reg): Node /bus@8000000/motherboard-bus/refclk32khz missing or empty reg/ranges property Move the fixed clocks, the fixed regulator, the leds and the config bus subtree to the root node, since they do not depend on any busses. Link: https://lore.kernel.org/r/20200513103016.130417-5-andre.przywara@arm.com Signed-off-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Sudeep Holla <sudeep.holla@arm.com>
2020-05-17arm64: dts: armada-3720-turris-mox: fix SFP bindingMarek Behún
The sfp compatible should be 'sff,sfp', not 'sff,sfp+'. We used patched kernel where the latter was working. Fixes: 7109d817db2e ("arm64: dts: marvell: add DTS for Turris Mox") Signed-off-by: Marek Behún <marek.behun@nic.cz> Cc: Gregory CLEMENT <gregory.clement@bootlin.com> Signed-off-by: Gregory CLEMENT <gregory.clement@bootlin.com>
2020-05-17arm64: dts: fvp: Move fixed devices out of bus nodeAndre Przywara
The devicetree compiler complains when DT nodes without a reg property live inside a (simple) bus node: Warning (simple_bus_reg): Node /bus@8000000/motherboard-bus/v2m_refclk32khz missing or empty reg/ranges property Move the fixed clocks, the fixed regulator, and the config bus subtree to the root node, since they do not depend on any busses. Link: https://lore.kernel.org/r/20200513103016.130417-4-andre.przywara@arm.com Signed-off-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Sudeep Holla <sudeep.holla@arm.com>
2020-05-17arm64: dts: armada-3720-turris-mox: forbid SDR104 on SDIO for FCC purposesMarek Behún
Use sdhci-caps-mask to forbid SDR104 mode on the SDIO capable SDHCI controller. Without this the device cannot pass electromagnetic interference certifications. Fixes: 7109d817db2e ("arm64: dts: marvell: add DTS for Turris Mox") Signed-off-by: Marek Behún <marek.behun@nic.cz> Cc: Gregory CLEMENT <gregory.clement@bootlin.com> Signed-off-by: Gregory CLEMENT <gregory.clement@bootlin.com>
2020-05-17arm64: dts: fvp/juno: Fix node address fieldsAndre Przywara
The Arm Ltd. boards were using an outdated address convention in the DT node names, by separating the high from the low 32-bits of an address by a comma. Remove the comma from the node name suffix to be DT spec compliant. Link: https://lore.kernel.org/r/20200513103016.130417-3-andre.przywara@arm.com Signed-off-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Sudeep Holla <sudeep.holla@arm.com>
2020-05-17ARM: dts: kirkwood: ReadyNAS NV+v2: Add LCD panelBrian J. Tarricone
The NV+ v2 has a WH1602 LCD panel (which is just a rebranded HD44780), similar to the Netgear RN104, just with different GPIO assignments. Signed-off-by: Brian J. Tarricone <brian@tarricone.org> Reviewed-by: Andrew Lunn <andrew@lunn.ch> Signed-off-by: Gregory CLEMENT <gregory.clement@bootlin.com>
2020-05-17ARM: dts: kirkwood: Add Check Point L-50 boardPawel Dembicki
This patch adds dts for the Check Point L-50 from 600/1100 series routers. Specification: -CPU: Marvell Kirkwood 88F6821 1200MHz -RAM: 512MB -Flash: NAND 512MB -WiFi: mPCIe card based on Atheros AR9287 b/g/n -WAN: 1 Gigabit Port (Marvell 88E1116R PHY) -LAN: 9 Gigabit Ports (2x Marvell 88E6171(5+4)) -USB: 2x USB2.0 -Express card slot -SD card slot -Serial console: RJ-45 115200 8n1 -Unsupported DSL Reviewed-by: Andrew Lunn <andrew@lunn.ch> Signed-off-by: Pawel Dembicki <paweldembicki@gmail.com> Signed-off-by: Gregory CLEMENT <gregory.clement@bootlin.com>
2020-05-17ARM: dts: marvell: drop i2c timeout-ms propertyBaruch Siach
The timeout-ms property for i2c master nodes is undocumented, and as never been supported. Drop it. Signed-off-by: Baruch Siach <baruch@tkos.co.il> Reviewed-by: Andrew Lunn <andrew@lunn.ch> Signed-off-by: Gregory CLEMENT <gregory.clement@bootlin.com>
2020-05-17arm64: dts: add uDPU i2c bus recoveryRussell King
Signed-off-by: Russell King <rmk+kernel@armlinux.org.uk> Reviewed-by: Andrew Lunn <andrew@lunn.ch> Signed-off-by: Gregory CLEMENT <gregory.clement@bootlin.com>
2020-05-17arm64: dts: marvell: drop i2c timeout-ms propertyBaruch Siach
The timeout-ms property for i2c master nodes is undocumented, and as never been supported. Drop it. Signed-off-by: Baruch Siach <baruch@tkos.co.il> Reviewed-by: Andrew Lunn <andrew@lunn.ch> Signed-off-by: Gregory CLEMENT <gregory.clement@bootlin.com>
2020-05-17arm64: dts: marvell: armada-37xx: Move PCIe max-link-speed propertyPali Rohár
Move the max-link-speed property of the PCIe node from board specific device tree files to the generic armada-37xx.dtsi. Armada 37xx supports only PCIe gen2 speed so max-link-speed property should be in the generic armada-37xx.dtsi file. Signed-off-by: Pali Rohár <pali@kernel.org> Tested-by: Tomasz Maciej Nowak <tmn505@gmail.com> Acked-by: Thomas Petazzoni <thomas.petazzoni@bootlin.com> Signed-off-by: Gregory CLEMENT <gregory.clement@bootlin.com>
2020-05-17arm64: dts: marvell: armada-37xx: Move PCIe comphy handle propertyMarek Behún
Move the comphy handle property of the PCIe node from board specific device tree files (EspressoBin and Turris Mox) to the generic armada-37xx.dtsi. This is correct since this is the only possible PCIe PHY configuration on Armada 37xx, so when PCIe is enabled on any board, this handle is correct. Signed-off-by: Marek Behún <marek.behun@nic.cz> Tested-by: Tomasz Maciej Nowak <tmn505@gmail.com> Acked-by: Thomas Petazzoni <thomas.petazzoni@bootlin.com> Signed-off-by: Gregory CLEMENT <gregory.clement@bootlin.com>
2020-05-17arm64: dts: marvell: armada-37xx: Set pcie_reset_pin to gpio functionMarek Behún
We found out that we are unable to control the PERST# signal via the default pin dedicated to be PERST# pin (GPIO2[3] pin) on A3700 SOC when this pin is in EP_PCIE1_Resetn mode. There is a register in the PCIe register space called PERSTN_GPIO_EN (D0088004[3]), but changing the value of this register does not change the pin output when measuring with voltmeter. We do not know if this is a bug in the SOC, or if it works only when PCIe controller is in a certain state. Commit f4c7d053d7f7 ("PCI: aardvark: Wait for endpoint to be ready before training link") says that when this pin changes pinctrl mode from EP_PCIE1_Resetn to GPIO, the PERST# signal is asserted for a brief moment. So currently the situation is that on A3700 boards the PERST# signal is asserted in U-Boot (because the code in U-Boot issues reset via this pin via GPIO mode), and then in Linux by the obscure and undocumented mechanism described by the above mentioned commit. We want to issue PERST# signal in a known way, therefore this patch changes the pcie_reset_pin function from "pcie" to "gpio" and adds the reset-gpios property to the PCIe node in device tree files of EspressoBin and Armada 3720 Dev Board (Turris Mox device tree already has this property and uDPU does not have a PCIe port). Signed-off-by: Marek Behún <marek.behun@nic.cz> Cc: Remi Pommarel <repk@triplefau.lt> Tested-by: Tomasz Maciej Nowak <tmn505@gmail.com> Acked-by: Thomas Petazzoni <thomas.petazzoni@bootlin.com> Signed-off-by: Gregory CLEMENT <gregory.clement@bootlin.com>
2020-05-17arm64: dts: update SolidRun Armada 8040 phy interface typesRussell King
Update the SolidRun Armada 8040 platforms phy interface types from the old 10gbase-kr to the newer and more correct 10gbase-r. Signed-off-by: Russell King <rmk+kernel@armlinux.org.uk> Signed-off-by: Gregory CLEMENT <gregory.clement@bootlin.com>
2020-05-17arm64: dts: imx8mp: add "fsl,imx6sx-fec" compatible stringFugang Duan
Add "fsl,imx6sx-fec" compatible string for fec node, then i.MX8MP EVK ethernet function can work now. Signed-off-by: Fugang Duan <fugang.duan@nxp.com> Reviewed-by: Dong Aisheng <aisheng.dong@nxp.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2020-05-16arm: dts: mt2701: Add usb2 device nodesMin Guo
Add musb nodes and usb2 phy nodes for MT2701 Signed-off-by: Min Guo <min.guo@mediatek.com> Link: https://lore.kernel.org/r/20191211015446.11477-3-min.guo@mediatek.com Signed-off-by: Matthias Brugger <matthias.bgg@gmail.com>
2020-05-16dt-bindings: gpu: mali-utgard: add mediatek, mt7623-mali compatibleSean Wang
The MediaTek MT7623 SoC contains a Mali-450, so add a compatible for it and define its own vendor-specific properties. Signed-off-by: Sean Wang <sean.wang@mediatek.com> Signed-off-by: Ryder Lee <ryder.lee@mediatek.com> Reviewed-by: Rob Herring <robh@kernel.org> Link: https://lore.kernel.org/r/efeadefe3895bcadf1d2e9847b82206dd8c7ec35.1563867856.git.ryder.lee@mediatek.com [mb: move to yaml file] Signed-off-by: Matthias Brugger <matthias.bgg@gmail.com>
2020-05-16arm: dts: mt7623: add Mali-450 device nodeRyder Lee
Add a node for Mali-450. Signed-off-by: Sean Wang <sean.wang@mediatek.com> Signed-off-by: Ryder Lee <ryder.lee@mediatek.com> Link: https://lore.kernel.org/r/af7b5a2e00eb3a4b6262807c378e43afd5f74779.1563867856.git.ryder.lee@mediatek.com Signed-off-by: Matthias Brugger <matthias.bgg@gmail.com>
2020-05-16arm64: dts: mt8173: Add capacity-dmips-mhz attributesUlrich Hecht
Dhrystone benchmark on Acer Chromebook R13 CB5-312T: A72: 15698587 dps @ 1807 MHz A53: 7598784 dps @ 1703 MHz Signed-off-by: Ulrich Hecht <uli-qwV78thtvt0@public.gmane.org> Link: https://lore.kernel.org/r/1563529816-3992-1-git-send-email-uli@fpond.eu Signed-off-by: Matthias Brugger <matthias.bgg@gmail.com>
2020-05-16arm64: dts: mt2712: use non-empty ranges for usb-phyChunfeng Yun
Use non-empty ranges for usb-phy to make the layout of its registers clearer; Replace deprecated compatible by generic Signed-off-by: Chunfeng Yun <chunfeng.yun@mediatek.com> Signed-off-by: Matthias Brugger <matthias.bgg@gmail.com>
2020-05-16arm64: dts: mt8173: fix mdp aliases property nameHsin-Yi Wang
Fix warning: Warning (alias_paths): /aliases: aliases property name must include only lowercase and '-' Signed-off-by: Hsin-Yi Wang <hsinyi@chromium.org> Reviewed-by: Chun-Kuang Hu <chunkuang.hu@kernel.org> Link: https://lore.kernel.org/r/20200414030815.192104-1-hsinyi@chromium.org Signed-off-by: Matthias Brugger <matthias.bgg@gmail.com>
2020-05-16arm64: dts: mediatek: Switch to SPDX license identifier for MT6797 SoCManivannan Sadhasivam
Switch to SPDX license identifier for MT6797 SoC. Signed-off-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org> Link: https://lore.kernel.org/r/20200222162444.11590-5-manivannan.sadhasivam@linaro.org Signed-off-by: Matthias Brugger <matthias.bgg@gmail.com>
2020-05-16arm64: dts: mediatek: Enable I2C support for 96Boards X20 Development boardManivannan Sadhasivam
There are 7 I2C ports used on this board. Hence, enable all of them. Signed-off-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org> Link: https://lore.kernel.org/r/20200222162444.11590-4-manivannan.sadhasivam@linaro.org Signed-off-by: Matthias Brugger <matthias.bgg@gmail.com>
2020-05-16arm64: dts: mediatek: Add I2C support for MT6797 SoCManivannan Sadhasivam
Add I2C support for Mediatek MT6797 SoC. There are a total of 8 I2C controllers in this SoC (2 being shared) and they are same as the controllers present in MT6577 SoC. Hence, the driver support is added with DT fallback method. As per the datasheet, there are controllers with _imm prefix like i2c2_imm and i2c3_imm. These appears to be in different memory regions but sharing the same pins with i2c2 and i2c3 respectively. Since there is no clear evidence of what they really are, I've adapted the numbering/naming scheme from the downstream code by Mediatek. Signed-off-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org> Link: https://lore.kernel.org/r/20200222162444.11590-3-manivannan.sadhasivam@linaro.org Signed-off-by: Matthias Brugger <matthias.bgg@gmail.com>
2020-05-16dt-bindings: i2c: Document I2C controller binding for MT6797 SoCManivannan Sadhasivam
I2C controller driver for MT6577 SoC is reused for MT6797 SoC. Hence, document that in DT binding. Signed-off-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org> Acked-by: Rob Herring <robh@kernel.org> Acked-by: Wolfram Sang <wsa@kernel.org> Link: https://lore.kernel.org/r/20200222162444.11590-2-manivannan.sadhasivam@linaro.org Signed-off-by: Matthias Brugger <matthias.bgg@gmail.com>
2020-05-15arm64: dts: qcom: sc7180: Add A618 gpu dt blobSharat Masetty
This patch adds the required dt nodes and properties to enabled A618 GPU. Tested-by: Douglas Anderson <dianders@chromium.org> Reviewed-by: Douglas Anderson <dianders@chromium.org> Signed-off-by: Sharat Masetty <smasetty@codeaurora.org> Link: https://lore.kernel.org/r/1588329036-18732-1-git-send-email-smasetty@codeaurora.org Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
2020-05-15dt-bindings: arm-smmu: Add sc7180 compatible stringSharat Masetty
This patch simply adds a new compatible string for SC7180 platform. Reviewed-by: Douglas Anderson <dianders@chromium.org> Signed-off-by: Sharat Masetty <smasetty@codeaurora.org> Link: https://lore.kernel.org/r/1588329036-18732-2-git-send-email-smasetty@codeaurora.org Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
2020-05-15ARM: dts: at91: Configure I2C SCL gpio as open drainCodrin Ciubotariu
The SCL gpio pin used by I2C bus for recovery needs to be configured as open drain. Fixes: 455fec938bbb ("ARM: dts: at91: sama5d2: add i2c gpio pinctrl") Fixes: a4bd8da893a3 ("ARM: dts: at91: sama5d3: add i2c gpio pinctrl") Fixes: 8fb82f050cf6 ("ARM: dts: at91: sama5d4: add i2c gpio pinctrl") Signed-off-by: Codrin Ciubotariu <codrin.ciubotariu@microchip.com> Link: https://lore.kernel.org/r/20200515140001.287932-1-codrin.ciubotariu@microchip.com Signed-off-by: Alexandre Belloni <alexandre.belloni@bootlin.com>
2020-05-15arm64: dts: mt8173: fix cooling device rangeMichael Kao
When thermal reaches target temperature,it would be pinned to state 0 (max frequency and power). Fix the throttling range to no limit. Signed-off-by: Hsin-Yi Wang <hsinyi@chromium.org> Signed-off-by: Michael Kao <michael.kao@mediatek.com> Link: https://lore.kernel.org/r/20200424082340.4127-1-michael.kao@mediatek.com Signed-off-by: Matthias Brugger <matthias.bgg@gmail.com>
2020-05-15ARM: dts: at91: sama5d2_xplained: Describe the flx0 I2C functionTudor Ambarus
Users can choose which flexcom function to use. Describe the I2C Flexcom0 function. Add alias for the i2c2 node in order to not rely on probe order for the i2c device numbering. The sama5d2 SoC has two dedicated i2c buses and five flexcoms that can function as i2c. The i2c0 and i2c1 aliases are kept for the dedicated i2c buses, the i2c flexcom functions can be numbered in order starting from i2c2. Signed-off-by: Tudor Ambarus <tudor.ambarus@microchip.com> Link: https://lore.kernel.org/r/20200514050301.147442-16-tudor.ambarus@microchip.com Signed-off-by: Alexandre Belloni <alexandre.belloni@bootlin.com>
2020-05-15ARM: dts: at91: sama5d2_ptc_ek: Add comments to describe the aliasesTudor Ambarus
Indicate which i2c alias is for which connector on the board. Specify that serial0 is for DBGU. This eases tester's life. Signed-off-by: Tudor Ambarus <tudor.ambarus@microchip.com> Link: https://lore.kernel.org/r/20200514050301.147442-17-tudor.ambarus@microchip.com Signed-off-by: Alexandre Belloni <alexandre.belloni@bootlin.com>
2020-05-15ARM: dts: at91: sama5d2_xplained: Add alias for DBGUTudor Ambarus
The aliases should be defined in the board dts rather than in the SoC dtsi. Don't rely on the aliases defined in the SoC dtsi and define the alias for the Serial DBGU in the board dts file. sama5d2 boards use the "serial0" alias for the Serial DBGU, do the same for sama5d2_xplained. Signed-off-by: Tudor Ambarus <tudor.ambarus@microchip.com> Link: https://lore.kernel.org/r/20200514050301.147442-15-tudor.ambarus@microchip.com Signed-off-by: Alexandre Belloni <alexandre.belloni@bootlin.com>
2020-05-15ARM: dts: at91: sama5d2: Add missing flexcom definitionsTudor Ambarus
Describe all the flexcom functions for all the flexcom nodes. Signed-off-by: Tudor Ambarus <tudor.ambarus@microchip.com> Link: https://lore.kernel.org/r/20200514050301.147442-13-tudor.ambarus@microchip.com Signed-off-by: Alexandre Belloni <alexandre.belloni@bootlin.com>
generated by cgit (git 2.34.1) at 2025-09-19 04:54:17 +0000