summaryrefslogtreecommitdiff
AgeCommit message (Collapse)Author
2020-05-05ARM: dts: DRA72x: Add aliases for rproc nodesSuman Anna
Add aliases for all the 3 remote processor nodes common to all DRA72x/DRA71x/AM571x/AM570x boards. The aliases uses the stem "rproc", and are defined in the order of the most common processors on the DRA72x family. The ids are same as DRA74x except for the missing DSP2. The aliases can be overridden, if needed, in the respective derivative board dts files. Signed-off-by: Suman Anna <s-anna@ti.com> Signed-off-by: Tero Kristo <t-kristo@ti.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
2020-05-05ARM: dts: DRA74x: Add aliases for rproc nodesSuman Anna
Add aliases for all the IPU and DSP remoteproc processor nodes common to all DRA74x/DRA76x/AM572x/AM574x boards. The aliases uses the stem "rproc". The aliases are defined in the order of the most common processors on the DRA74x family. The aliases can be overridden, if needed, in the respective derivative board dts files. Signed-off-by: Suman Anna <s-anna@ti.com> Signed-off-by: Tero Kristo <t-kristo@ti.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
2020-05-05ARM: dts: DRA74x: Add DSP2 processor device nodeSuman Anna
The DRA7xx family of SoCs can contain upto two identical DSP processor subsystems. The second DSP processor subsystem is present only on the DRA74x/DRA76x variants. The processor device DT node has therefore been added in disabled state for this processor subsystem in the DRA74x specific DTS file. NOTE: 1. The node does not have any mailboxes, timers or CMA region assigned, they should be added in the respective board dts files. 2. The node should also be enabled as per the individual product configuration in the corresponding board dts files. Signed-off-by: Suman Anna <s-anna@ti.com> [t-kristo@ti.com: converted to support ti-sysc from legacy hwmod] Signed-off-by: Tero Kristo <t-kristo@ti.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
2020-05-05ARM: dts: DRA7: Add common IPU and DSP nodesSuman Anna
The DRA7xx family of SOCs have two IPUs and upto two DSP processor subsystems in general. The IPU processor subsystem contains dual-core ARM Cortex-M4 processors, while the DSP processor subsystem is based on the TI's standard TMS320C66x DSP CorePac core. The IPUs are very similar to those on OMAP5. Two IPUs and one DSP processor subsystems is the most common configuration. The processor device DT nodes have been added for these processor subsystems, with the internal memories added through 'reg' and 'reg-names' properties. The IPUs only have an L2 RAM, whereas the DSPs have L1P, L1D and L2 RAM memories. NOTE: 1. The nodes do not have any mailboxes, timers or CMA regions assigned, they should be added in the respective board dts files. 2. The nodes haven been disabled by default and the enabling of these nodes is also left to the respective board dts files. Signed-off-by: Suman Anna <s-anna@ti.com> [t-kristo@ti.com: convert to ti-sysc support from legacy hwmod] Signed-off-by: Tero Kristo <t-kristo@ti.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
2020-05-05ARM: dts: dra7: add timer_sys_ck entries for IPU/DSP timersTero Kristo
With this, the clocksource driver can setup the timers properly. Signed-off-by: Tero Kristo <t-kristo@ti.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
2020-05-05Merge branch 'omap-for-v5.8/dt-timer' into omap-for-v5.8/dtTony Lindgren
2020-05-05ARM: dts: Add 32KHz clock as default clock sourceLokesh Vutla
Clocksource to timer configured in pwm mode can be selected using the DT property ti,clock-source. There are few pwm timers which are not selecting the clock source and relying on default value in hardware or selected by driver. Instead of relying on default value, always select the clock source from DT. Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com> Reviewed-by: Suman Anna <s-anna@ti.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
2020-05-05arm64: dts: rockchip: Define the rockchip Video Decoder node on rk3399Boris Brezillon
RK3399 has a Video decoder, define the node in the dtsi. We also add the missing power-domain in mmu node and enable the block. Signed-off-by: Boris Brezillon <boris.brezillon@collabora.com> Signed-off-by: Ezequiel Garcia <ezequiel@collabora.com> Link: https://lore.kernel.org/r/20200403221345.16702-6-ezequiel@collabora.com Signed-off-by: Heiko Stuebner <heiko@sntech.de>
2020-05-05ARM: dts: stm32: Enable thermal sensor support on stm32mp15xx-dkxPascal Paillet
Enable STM32 Digital Thermal Sensor driver for stm32mp15xx-dkx boards. Signed-off-by: Pascal Paillet <p.paillet@st.com> Signed-off-by: Alexandre Torgue <alexandre.torgue@st.com>
2020-05-05ARM: dts: stm32: add sd-uhs properties in SD-card node for stm32mp157c-ed1Yann Gautier
The sdmmc1 peripheral is connected on SD-card on STM32MP1-ED1 board. Add the UHS features the controller is able to manage. Those features require a level shifter on the board, and the support of the voltage switch in driver, which is done in Linux v5.7. Signed-off-by: Ludovic Barre <ludovic.barre@st.com> Signed-off-by: Yann Gautier <yann.gautier@st.com> Signed-off-by: Alexandre Torgue <alexandre.torgue@st.com>
2020-05-05ARM: dts: ux500: samsung-skomer: Add magnetometerLinus Walleij
Add the ALPS magnetometer to the Skomer phone. Cc: Stephan Gerhold <stephan@gerhold.net> Cc: Nick Reitemeyer <nick.reitemeyer@web.de> Signed-off-by: Linus Walleij <linus.walleij@linaro.org> Link: https://lore.kernel.org/r/20200430150245.7935-2-linus.walleij@linaro.org
2020-05-05ARM: dts: ux500: samsung-golden: Add magnetometerNick Reitemeyer
Add the ALPS magnetometer to the Golden phone. Cc: Stephan Gerhold <stephan@gerhold.net> Signed-off-by: Nick Reitemeyer <nick.reitemeyer@web.de> Signed-off-by: Linus Walleij <linus.walleij@linaro.org> Link: https://lore.kernel.org/r/20200430150245.7935-1-linus.walleij@linaro.org
2020-05-05ARM: dts: r8a7742-iwg21d-q7: Add iWave G21D-Q7 board based on RZ/G1HLad Prabhakar
Add support for iWave RainboW-G21D-Qseven board based on RZ/G1H. Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com> Reviewed-by: Marian-Cristian Rotariu <marian-cristian.rotariu.rb@bp.renesas.com> Link: https://lore.kernel.org/r/1588542414-14826-11-git-send-email-prabhakar.mahadev-lad.rj@bp.renesas.com Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
2020-05-05ARM: dts: r8a7742-iwg21m: Add iWave RZ/G1H Qseven SOMLad Prabhakar
Add support for iWave RZ/G1H Qseven System On Module. Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com> Reviewed-by: Marian-Cristian Rotariu <marian-cristian.rotariu.rb@bp.renesas.com> Link: https://lore.kernel.org/r/1588542414-14826-10-git-send-email-prabhakar.mahadev-lad.rj@bp.renesas.com Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
2020-05-05ARM: dts: r8a7742: Initial SoC device treeLad Prabhakar
The initial R8A7742 SoC device tree including CPU[0-8], PMU, PFC, CPG, RST, SYSC, ICRAM[0-2], SCIFA2, MMC1, DMAC[0-1], GIC, PRR, timer and the required clock descriptions. Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com> Reviewed-by: Marian-Cristian Rotariu <marian-cristian.rotariu.rb@bp.renesas.com> Link: https://lore.kernel.org/r/1588542414-14826-7-git-send-email-prabhakar.mahadev-lad.rj@bp.renesas.com Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
2020-05-05Merge tag 'renesas-r8a7742-dt-binding-defs-tag' into renesas-arm-dt-for-v5.8Geert Uytterhoeven
Renesas RZ/G1H DT Binding Definitions Clock and Power Domain definitions for the Renesas RZ/G1H (R8A7742) SoC, shared by driver and DT source files.
2020-05-05ARM: dts: aspeed: Change KCS nodes to v2 bindingAndrew Jeffery
Fixes the following warnings for both g5 and g6 SoCs: arch/arm/boot/dts/aspeed-g5.dtsi:376.19-381.8: Warning (unit_address_vs_reg): /ahb/apb/lpc@1e789000/lpc-bmc@0/kcs1@0: node has a unit name, but no reg property Signed-off-by: Andrew Jeffery <andrew@aj.id.au> Signed-off-by: Joel Stanley <joel@jms.id.au>
2020-05-05ARM: dts: Aspeed: AST2600: Add XDMA PCI-E root control resetEddie James
The AST2600 XDMA engine requires the PCI-E root control reset be cleared as well, so add a phandle to that syscon reset. Signed-off-by: Eddie James <eajames@linux.ibm.com> Signed-off-by: Joel Stanley <joel@jms.id.au>
2020-05-05ARM: dts: aspeed: ast2600: Add XDMA EngineEddie James
Add a node for the XDMA engine with all the necessary information. Signed-off-by: Eddie James <eajames@linux.ibm.com> Reviewed-by: Andrew Jeffery <andrew@aj.id.au> Signed-off-by: Joel Stanley <joel@jms.id.au>
2020-05-05ARM: dts: aspeed: ast2500: Add XDMA EngineEddie James
Add a node for the XDMA engine with all the necessary information. Signed-off-by: Eddie James <eajames@linux.ibm.com> Reviewed-by: Andrew Jeffery <andrew@aj.id.au> Signed-off-by: Joel Stanley <joel@jms.id.au>
2020-05-05ARM: dts: aspeed: Adding Facebook Yosemite V2 BMCManikandan Elumalai
The Yosemite V2 is a facebook multi-node server platform that host four OCP server. The BMC in the Yosemite V2 platform based on AST2500 SoC. This patch adds linux device tree entry related to Yosemite V2 specific devices connected to BMC SoC. Signed-off-by: Manikandan Elumalai <manikandan.hcl.ers.epl@gmail.com> Acked-by: Andrew Jeffery <andrew@aj.id.au> Reviewed-by: Vijay Khemka <vkhemka@fb.com> Signed-off-by: Joel Stanley <joel@jms.id.au>
2020-05-05ARM: dts: aspeed: Add YADRO Nicole BMCAlexander Filippov
Nicole is an OpenPower machine with an Aspeed 2500 BMC SoC manufactured by YADRO. Signed-off-by: Alexander Filippov <a.filippov@yadro.com> Acked-by: Andrew Jeffery <andrew@aj.id.au> Reviewed-by: Patrick Williams <patrick@stwcx.xyz> Signed-off-by: Joel Stanley <joel@jms.id.au>
2020-05-05ARM: dts: aspeed: mihawk: add aliases for i2cBen Pai
Set the bus id for each mux channel to avoid switching channels multiple times Signed-off-by: Ben Pai <Ben_Pai@wistron.com> Signed-off-by: Joel Stanley <joel@jms.id.au>
2020-05-05ARM: dts: aspeed: tacoma: Add TPMEddie James
Add the Nuvoton NPCT75X to the appropriate i2c bus. Signed-off-by: Eddie James <eajames@linux.ibm.com> Signed-off-by: Joel Stanley <joel@jms.id.au>
2020-05-05ARM: dts: aspeed: tacoma: Enable the second VUARTAndrew Jeffery
Used by some POWER hypervisors. Signed-off-by: Andrew Jeffery <andrew@aj.id.au> Signed-off-by: Joel Stanley <joel@jms.id.au>
2020-05-05ARM: dts: aspeed: tacoma: Add iio-hwmon nodes for IIO devicesEddie James
Connect the BMP280 and DPS310 to the hwmon subsystem with iio-hwmon nodes. Signed-off-by: Eddie James <eajames@linux.ibm.com> Signed-off-by: Joel Stanley <joel@jms.id.au>
2020-05-05ARM: dts: aspeed: rainier: Add VGA reserved memory regionJoel Stanley
The BMC uses reserves the top 16MB of memory for the host to use for VGA or PCIe communication. Reviewed-by: Eddie James <eajames@linux.ibm.com> Signed-off-by: Joel Stanley <joel@jms.id.au>
2020-05-05ARM: dts: aspeed: rainier: Add gpio line namesAndrew Geissler
Name the GPIOs to help userspace work with them. The names describe the functionality the lines provide, not the net or ball name. This makes it easier to share userspace code across different systems and makes the use of the lines more obvious. Signed-off-by: Andrew Geissler <geisonator@yahoo.com> Signed-off-by: Joel Stanley <joel@jms.id.au>
2020-05-05ARM: dts: aspeed: tacoma: Add gpio line namesJoel Stanley
Add names for some of the GPIOs that are used in Tacoma. Signed-off-by: Joel Stanley <joel@jms.id.au>
2020-05-05ARM: dts: aspeed: zaius: Add gpio line namesAndrew Geissler
Name the GPIOs to help userspace work with them. The names describe the functionality the lines provide, not the net or ball name. This makes it easier to share userspace code across different systems and makes the use of the lines more obvious. Signed-off-by: Andrew Geissler <geissonator@yahoo.com> Acked-by: Andrew Jeffery <andrew@aj.id.au> Signed-off-by: Joel Stanley <joel@jms.id.au>
2020-05-05ARM: dts: aspeed: romulus: Add gpio line namesAndrew Geissler
Name the GPIOs to help userspace work with them. The names describe the functionality the lines provide, not the net or ball name. This makes it easier to share userspace code across different systems and makes the use of the lines more obvious. Signed-off-by: Andrew Geissler <geissonator@yahoo.com> Signed-off-by: Joel Stanley <joel@jms.id.au>
2020-05-05ARM: dts: aspeed: witherspoon: Add gpio line namesAndrew Geissler
Name the GPIOs to help userspace work with them. The names describe the functionality the lines provide, not the net or ball name. This makes it easier to share userspace code across different systems and makes the use of the lines more obvious. Signed-off-by: Andrew Geissler <geissonator@yahoo.com> Reviewed-by: Joel Stanley <joel@jms.id.au> Acked-by: Andrew Jeffery <andrew@aj.id.au> Signed-off-by: Joel Stanley <joel@jms.id.au>
2020-05-05ARM: dts: aspeed: ast2600: Set arch timer always-onEddie James
According to ASPEED, FTTMR010 is not intended to be used in the AST2600. The arch timer should be used, but Linux doesn't enable high-res timers without being assured that the arch timer is always on, so set that property in the devicetree. The FTTMR010 device is described by set to disabled. This fixes highres timer support for AST2600. Fixes: 2ca5646b5c2f ("ARM: dts: aspeed: Add AST2600 and EVB") Signed-off-by: Eddie James <eajames@linux.ibm.com> Reviewed-by: Joel Stanley <joel@jms.id.au> Signed-off-by: Joel Stanley <joel@jms.id.au>
2020-05-05ARM: dts: aspeed: tacoma: Add GPIOs for FSIJoel Stanley
GPIO Q7 is no longer used for air/water. It is repurposed on Tacoma to indicate internal FSI (low) vs cabled (high). GPIO B0 controls the muxing of FSI to the cable (low) or internal pins (high). Acked-by: Andrew Jeffery <andrew@aj.id.au> Signed-off-by: Joel Stanley <joel@jms.id.au>
2020-05-05ARM: dts: aspeed: mihawk: Change the name of ledsBen Pai
Change the name of power, fault and rear-id. Remove the two leds. Signed-off-by: Ben Pai <Ben_Pai@wistron.com> Signed-off-by: Joel Stanley <joel@jms.id.au>
2020-05-05ARM: dts: aspeed: rainier: Remove regulatorsMatthew Barth
Regulators will be dynamically configured and monitored from userspace. Signed-off-by: Matthew Barth <msbarth@linux.ibm.com> Reviewed-by: Eddie James <eajames@linux.ibm.com> Reviewed-by: Jim Wright <wrightj@linux.vnet.ibm.com> Signed-off-by: Joel Stanley <joel@jms.id.au>
2020-05-05ARM: dts: aspeed: rainier: Add host FSI descriptionJoel Stanley
This adds the description of the Power CPUs that are attached to the BMC. Without this userspace will see the '/dev/scom66' style layout. Reviewed-by: Eddie James <eajames@linux.ibm.com> Signed-off-by: Joel Stanley <joel@jms.id.au>
2020-05-05ARM: dts: aspeed: ast2600evb: Enable FSI masterJoel Stanley
Use the first FSI master. Signed-off-by: Joel Stanley <joel@jms.id.au>
2020-05-05ARM: dts: aspeed: tacoma: Add gpio-key definitionsEddie James
Add gpio-keys for various signals on Tacoma. Signed-off-by: Eddie James <eajames@linux.ibm.com> Acked-by: Andrew Jeffery <andrew@aj.id.au> Signed-off-by: Joel Stanley <joel@jms.id.au>
2020-05-05ARM: dts: aspeed: rainier: Set PCA9552 pin typesMatthew Barth
All 16 pins of the PCA9552 at 7-bit address 0x61 should be set as type GPIO. Signed-off-by: Matthew Barth <msbarth@linux.ibm.com> Signed-off-by: Joel Stanley <joel@jms.id.au>
2020-05-05ARM: dts: aspeed: rainier: Enable VUART2Andrew Jeffery
The second VUART is used to expose multiplexed, non-hypervisor consoles. Signed-off-by: Andrew Jeffery <andrew@aj.id.au> Signed-off-by: Joel Stanley <joel@jms.id.au>
2020-05-05ARM: dts: aspeed: ast2400: Add video engine supportAlexander Filippov
Add a node to describe the video engine on AST2400. These changes were copied from aspeed-g5.dtsi Signed-off-by: Alexander Filippov <a.filippov@yadro.com> Reviewed-by: Andrew Jeffery <andrew@aj.id.au> Signed-off-by: Joel Stanley <joel@jms.id.au>
2020-05-05ARM: dts: aspeed: tacoma: Enable eMMC controllerGuenter Roeck
Enabling emmc without enabling its controller doesn't do any good. Enable its controller as well to make it work. Cc: Andrew Jeffery <andrew@aj.id.au> Cc: Joel Stanley <joel@jms.id.au> Signed-off-by: Guenter Roeck <linux@roeck-us.net> Signed-off-by: Joel Stanley <joel@jms.id.au>
2020-05-05ARM: dts: aspeed: tiogapass: Add gpio line namesVijay Khemka
Added GPIO line names for all gpio used in tiogapass platform, these line names will be used by libgpiod to control GPIOs Signed-off-by: Vijay Khemka <vijaykhemka@fb.com> Reviewed-by: Joel Stanley <joel@jms.id.au> Signed-off-by: Joel Stanley <joel@jms.id.au>
2020-05-05ARM: dts: aspeed: tiogapass: Add IPMB deviceVijay Khemka
Adding IPMB devices for facebook tiogapass platform. Signed-off-by: Vijay Khemka <vijaykhemka@fb.com> Reviewed-by: Joel Stanley <joel@jms.id.au> Signed-off-by: Joel Stanley <joel@jms.id.au>
2020-05-05ARM: dts: aspeed: ast2600: Add Video Engine nodeJae Hyun Yoo
The AST2600 has Video Engine so add it. Signed-off-by: Jae Hyun Yoo <jae.hyun.yoo@linux.intel.com> Acked-by: Joel Stanley <joel@jms.id.au> Signed-off-by: Joel Stanley <joel@jms.id.au>
2020-05-05ARM: dts: aspeed: ast2600: Add SCU interrupt controllersEddie James
Add nodes for the interrupt controllers provided by the SCU. Signed-off-by: Eddie James <eajames@linux.ibm.com> Reviewed-by: Andrew Jeffery <andrew@aj.id.au> Signed-off-by: Joel Stanley <joel@jms.id.au>
2020-05-05ARM: dts: aspeed: ast2500: Add SCU interrupt controllerEddie James
Add a node for the interrupt controller provided by the SCU. Signed-off-by: Eddie James <eajames@linux.ibm.com> Reviewed-by: Andrew Jeffery <andrew@aj.id.au> Signed-off-by: Joel Stanley <joel@jms.id.au>
2020-05-04ARM: dts: socfpga: Add fpga2hps and fpga2sdram bridgesSteffen Trumtrar
Add the remaining two bridges on the Cyclone-V SoCFPGA SoCs. Signed-off-by: Steffen Trumtrar <s.trumtrar@pengutronix.de> Signed-off-by: Dinh Nguyen <dinguyen@kernel.org>
2020-05-04ARM: dts: socfgpa: set bridges status to disabledSteffen Trumtrar
The hps-to-fpga bridges can't be used, when the FPGA is not programmed. Set the default state to disabled and leave enabling them to the board-specific dts files. Although this changes behavior, there are no in-tree users of the bridges, so this won't break anything. Signed-off-by: Steffen Trumtrar <s.trumtrar@pengutronix.de> Signed-off-by: Dinh Nguyen <dinguyen@kernel.org>
generated by cgit (git 2.34.1) at 2025-09-19 09:59:35 +0000